KR890011316A - Alarm sound output circuit using tone sender - Google Patents

Alarm sound output circuit using tone sender Download PDF

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Publication number
KR890011316A
KR890011316A KR870014512A KR870014512A KR890011316A KR 890011316 A KR890011316 A KR 890011316A KR 870014512 A KR870014512 A KR 870014512A KR 870014512 A KR870014512 A KR 870014512A KR 890011316 A KR890011316 A KR 890011316A
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KR
South Korea
Prior art keywords
circuit
signal
control
output
buffer circuit
Prior art date
Application number
KR870014512A
Other languages
Korean (ko)
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KR910000353B1 (en
Inventor
이병학
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019870014512A priority Critical patent/KR910000353B1/en
Publication of KR890011316A publication Critical patent/KR890011316A/en
Application granted granted Critical
Publication of KR910000353B1 publication Critical patent/KR910000353B1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/08Indicating faults in circuits or apparatus
    • H04M3/14Signalling existence of persistent "off-hook" condition
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/02Calling substations, e.g. by ringing

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Devices For Supply Of Signal Current (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

내용 없음No content

Description

톤센더를 이용한 경보음 송출회로Alarm sound output circuit using tone sender

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 따른 경보음 송출회로 블럭도.3 is a block diagram of an alarm sound transmitting circuit according to the present invention.

제4도는 본 발명의 따른 제3도의 구체회로도.4 is a detailed circuit diagram of FIG. 3 in accordance with the present invention.

Claims (1)

중앙처리장치를 구비한 교환기 시스템의 가입자의 경보 메세지 공급회로에 있어서, 상기 중앙처리장치로부터 톤코멘드 데이타를 받아 디코딩하는 톤코멘드 디코딩회로(200)와, 다이얼링과 메세지의 기능을 선택하는 기능 확장 스위칭회로(300)와, 소정 클럭신호를 카운트하여 동기신호를 발생하는 클럭동기 회로(700)와, 상기 클럭동기회로(700)의 출력신호의 카운트 신호로 소정타임슬롯을 발생하는 타임슬롯카운터(800)와, 아나로브 메세지 신호의 디지탈 변화에 따른 소정 샘플링 제어 데이타를 고정 데이타를 내장하여 상기 타임슬롯 카운터(800)의 타임출력에 따라 억세스하여 소정 주기의 샘플링 펄스를 발생하는 제어메모리(900)와, 상기 제어메모리(900)의 샘플링 출력 제어신호 데이타를 버퍼링하는 제어버퍼회로(1000)와, 리세트 제어단의 입력 리세트 신호에 의해 상기 클럭동기회로(700), 타임슬롯카운터(800), 제어메모리(900), 제어버퍼회로(1000)를 리세트시키는 리세트회로(1200)와, 경보음 메세지 신호를 발생하는 경보음 메세지 발생부(600)와, 상기 경보음 메세지 발생부(600)의 아나로그 신호를 상기 제어버퍼회로(1000)의 출력 제어 신호에 따라 샘플링 앤드 홀드로 디지탈 데이타로 변환하여 출력하는 아나로그/디지탈변환부(500)와, 상기 제어버퍼회로(1000)의 출력에 의해 상기 아나로그/디지탈 변환기(500)의 출력을 버퍼링하는 시분할 다중화(TDM)버퍼회로(400)와, 상기 기능 확장 스위치회로(300)의 선택에 따라 상기 시분할 다중화 버퍼회로(400)의 출력과 PCM데이타를 선택하여 출력하는 시분할 다중화 버스 스위칭회로(100)로 구성됨을 특징으로 하는 회로.An alarm message supply circuit for subscribers of an exchange system having a central processing unit, comprising: a tone command decoding circuit (200) for receiving and decoding tone command data from the central processing unit, and function expansion switching for selecting dialing and message functions A circuit 300, a clock synchronization circuit 700 for counting a predetermined clock signal to generate a synchronization signal, and a time slot counter 800 for generating a predetermined time slot as a count signal of an output signal of the clock synchronization circuit 700. And a control memory 900 for storing predetermined sampling control data according to a digital change of an ana-lobe message signal and accessing them according to the time output of the timeslot counter 800 to generate sampling pulses of a predetermined period. A control buffer circuit 1000 for buffering the sampling output control signal data of the control memory 900, and an input reset of the reset control stage. A reset circuit 1200 for resetting the clock synchronization circuit 700, the time slot counter 800, the control memory 900, and the control buffer circuit 1000 by a call, and an alarm for generating an alarm sound message signal. Analog signal for converting the analog signal of the sound message generating unit 600 and the alarm sound message generating unit 600 into digital data with sampling and hold according to the output control signal of the control buffer circuit 1000 and outputting the analog data. A time division multiplexing (TDM) buffer circuit 400 for buffering the output of the analog / digital converter 500 by the digital converter 500, the output of the control buffer circuit 1000, and the function expansion switch circuit. And a time division multiplexing bus switching circuit (100) for selecting and outputting the output of the time division multiplexing buffer circuit (400) and PCM data according to the selection of (300). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870014512A 1987-12-18 1987-12-18 Alarming tone sending circuit by tone sender KR910000353B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870014512A KR910000353B1 (en) 1987-12-18 1987-12-18 Alarming tone sending circuit by tone sender

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870014512A KR910000353B1 (en) 1987-12-18 1987-12-18 Alarming tone sending circuit by tone sender

Publications (2)

Publication Number Publication Date
KR890011316A true KR890011316A (en) 1989-08-14
KR910000353B1 KR910000353B1 (en) 1991-01-24

Family

ID=19267087

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870014512A KR910000353B1 (en) 1987-12-18 1987-12-18 Alarming tone sending circuit by tone sender

Country Status (1)

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KR (1) KR910000353B1 (en)

Also Published As

Publication number Publication date
KR910000353B1 (en) 1991-01-24

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