KR920017506A - Μ-Law, A-law mutual conversion circuit by tradeoff between hardware logic and research table - Google Patents

Μ-Law, A-law mutual conversion circuit by tradeoff between hardware logic and research table Download PDF

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Publication number
KR920017506A
KR920017506A KR1019910001971A KR910001971A KR920017506A KR 920017506 A KR920017506 A KR 920017506A KR 1019910001971 A KR1019910001971 A KR 1019910001971A KR 910001971 A KR910001971 A KR 910001971A KR 920017506 A KR920017506 A KR 920017506A
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South Korea
Prior art keywords
law
data
terminal
hardware logic
time slot
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KR1019910001971A
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Korean (ko)
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KR940006010B1 (en
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임동수
김재평
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박성규
대우통신 주식회사
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Priority to KR1019910001971A priority Critical patent/KR940006010B1/en
Publication of KR920017506A publication Critical patent/KR920017506A/en
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Publication of KR940006010B1 publication Critical patent/KR940006010B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

내용 없음No content

Description

하드웨어로직 및 조사 테이블 방식 절충에 의한 μ-Law, A-Law의 상호 변환 회로Μ-Law, A-Law Mutual Conversion Circuit by Hardware Logic and Lookup Table

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도의 (가)(나)는 본 발명의 시분할 스위치 회로내의 μ-Law, A-Law의 상호 변환 블록 구성도로서, (가)는 타국으로 송출시 μ-Law/A-Law의 변환 위치도. (나)는 타극으로 수신하는 μ-Law/A-Law의 변환위치도.(A) (b) of FIG. 1 is a block diagram of the mutual conversion block of μ-Law and A-Law in the time division switch circuit of the present invention, and (a) the conversion position of μ-Law / A-Law when sent to other station. Degree. (B) shows the conversion position of μ-Law / A-Law received by other pole.

제2도는 본 발명의 하드웨어로직에 의한 μ-Law, A-Law의 상호변환 구성도.2 is a diagram showing the inter-conversion configuration of μ-Law and A-Law by the hardware logic of the present invention.

Claims (4)

전전자 교환기에 있어서, 가입자 채널 교환기능이 수용되는 시분할 스위치에서 타임슬록 별로 μ-Law, A-Law 상호 변환이 이루어지게 한 μ-Law, A-Law 변환부(1) 및 타임슬롯 교환용 콘트롤 메모리부(2)로 구성한 시분할 스위치 회로부(10)와, 트렁크(20)로 구성함을 특징으로 하는 하드웨어로직 및 조사 테이블 방식 절충에 의한 μ-Law, A-Law의 상호 변환 회로.In the electronic switchboard, the μ-Law, A-Law conversion unit (1) and time slot exchange control for converting μ-Law and A-Law to each time slot in a time-division switch that accommodates subscriber channel exchange function A time-division switch circuit section (10) composed of a memory section (2), and a trunk (20), characterized in that the mutual conversion circuit of µ-Law, A-Law by hardware logic and look-up table method compromise. 제1항에 있어서, 하드웨어로직에 의한 μ-Law, A-Law의 상호 변환구성도는, 음성 데이터 입력 래치부(A)와, μ-Law, A-Law 변환시 μ-Law, A-Law 데이터를 상호 전환시키는 전환 회로부(INS)와, 전환된 μ-A 데이터를 출력하는 음성 데이터 출력 래치부(B)로 구성함을 특징으로 하는 하드웨어로직 및 조사 테이블 방식 절충에 의한 μ-Law, A-Law의 상호 변환 회로.The method of claim 1, wherein the micro-Law and A-Law by the conversion of the hardware logic structure, the audio data input latch unit (A), and the μ-Law, A-Law data conversion during the μ-Law, A-Law data Μ-Law, A- by tradeoff of the hardware logic and the look-up table method, characterized in that it is composed of a switching circuit section INS for mutually converting the INS and a voice data output latch section B for outputting the converted µ-A data. Law's interconversion circuit. 제2항에 있어서, 조사테이블 방식에 의한 μ-Law, A-Law의 상호 변환구성도는, 타국과 송수신 되는 음성 PCM 데이터들을 어드레스별로 저장하여 출력하는 피롬(PROM)과, 상기 피롬(PROM)에 저장된 음성 PCM데이터를 타임슬롯별로 μ/A상호 변환이 이루어지게 한 타임슬롯 콘트롤(3)과, 음성 PCM 데이터를 출력하는 버퍼(4)로 구성함을 특징으로 하는 하드웨어로직 및 조사 테이블 방식 절충에 의한 μ-Law, A-Law의 상호 변환 회로.According to claim 2, the conversion table of the μ-Law, A-Law by the look-up table method, PROM (PROM) for storing and outputting voice PCM data transmitted and received to and from another station for each address, and the PROM (PROM) The hardware logic and the look-up table method compromise, comprising a time slot control (3) for converting the voice PCM data stored in the time slot into μ / A inter-conversion and a buffer (4) for outputting the voice PCM data. Μ-Law, A-Law mutual conversion circuit. 제3항에 있어서, μ-Law, A-Law의 변환 및 감쇄기능을 위한 상기 타임슬롯 콘트롤(3)은 각 프로세서를 디피 램(DP RAM)의 입력데이타단자(ID) 및 라이트 어드레스단자(WA)에서 연결하고, 각 타이머를 순차 카운터(SC)의 프레임 펄스 단자(FP) 및 클록단자(CK)에 연결하고, 상기 순차 카운터(SC)가 디피 램(DP RAM)의 리드 어드레스단자(RA)에 연결된 상기 디 피 램(DP RAM)의 리드 어드레서단자(RA)에 연결된 상기 디피 램(DP RAM)의 출력에 데이터단자(OD)를 타임 슬록 콘트롤 데이터 단자에 연결하여 구성함을 특징으로 하는 하드 웨어로직 및 조사 테이블 방식 절충에 의한 μ-Law, A-Law의 상호 변환 회로.[4] The time slot control 3 for converting and attenuating [mu] -Law and A-Law functions according to claim 3, wherein each processor is configured to input an input data terminal ID and a write address terminal WA of a disc RAM. ), Each timer is connected to the frame pulse terminal FP and the clock terminal CK of the sequential counter SC, and the sequential counter SC is a read address terminal RA of the DP RAM. And a data terminal (OD) connected to a time slot control data terminal at an output of the DP (DP RAM) connected to a read address terminal (RA) of the DP (DP RAM) connected to the terminal. Μ-Law and A-Law mutual conversion circuits due to hardware logic and look-up table trade-offs. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910001971A 1991-02-05 1991-02-05 Conversion method between u-law and a-law KR940006010B1 (en)

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KR1019910001971A KR940006010B1 (en) 1991-02-05 1991-02-05 Conversion method between u-law and a-law

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Application Number Priority Date Filing Date Title
KR1019910001971A KR940006010B1 (en) 1991-02-05 1991-02-05 Conversion method between u-law and a-law

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KR920017506A true KR920017506A (en) 1992-09-26
KR940006010B1 KR940006010B1 (en) 1994-06-30

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100315187B1 (en) * 1999-10-18 2001-11-26 윤종용 Method to communicate between μ-law communication system and A-law communication system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0147147B1 (en) * 1995-04-18 1998-08-17 김주용 Method and apparatus of data reception via dual data highway in a fully electronic-exchanger

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100315187B1 (en) * 1999-10-18 2001-11-26 윤종용 Method to communicate between μ-law communication system and A-law communication system

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KR940006010B1 (en) 1994-06-30

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