KR890009088A - Clock generator circuit of the duty cycle - Google Patents

Clock generator circuit of the duty cycle Download PDF

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Publication number
KR890009088A
KR890009088A KR1019870012558A KR870012558A KR890009088A KR 890009088 A KR890009088 A KR 890009088A KR 1019870012558 A KR1019870012558 A KR 1019870012558A KR 870012558 A KR870012558 A KR 870012558A KR 890009088 A KR890009088 A KR 890009088A
Authority
KR
South Korea
Prior art keywords
duty cycle
divider
clock generator
generator circuit
terminal
Prior art date
Application number
KR1019870012558A
Other languages
Korean (ko)
Other versions
KR900006821B1 (en
Inventor
이원영
Original Assignee
삼성전자 주식회사
안시환
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사, 안시환 filed Critical 삼성전자 주식회사
Priority to KR1019870012558A priority Critical patent/KR900006821B1/en
Publication of KR890009088A publication Critical patent/KR890009088A/en
Application granted granted Critical
Publication of KR900006821B1 publication Critical patent/KR900006821B1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electric Clocks (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

내용 없음No content

Description

듀터싸이클의 클럭발생회로Clock generator circuit of the duty cycle

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 회로도.1 is a circuit diagram of the present invention.

제2도는 듀터사이클 저정스위치에 의한 플립플롭의 동작상태를 도시한 도면.2 is a diagram showing an operating state of the flip-flop by the ducycle cycle storage switch.

Claims (1)

기본발진기(1)와 리셋스위치(RESET)가 연결된 분주기(2)의 데이트단자(DD-DA)에는 분주지정스위치(B1-B4)를 각각 연결하고, 상기 분주기(2)의 단자(Roc)를 인버터(Ⅰ)로써 로드단자()에 연결하며, 상기 분주기(2)의 출력단자(Q)에는 J-K플립플롭(F/F1-F/F5)을 차례로 연결하고, 듀터싸이클 지정스위치 (A1-A5)를 상기 J-K플립플롭(F/F1-F/F5)의 클리어단자()와 프리셋단자()에 선택적으로 연결하여서 구성시킴을 특징으로 하는 듀터싸이클의 클럭발생회로. A divider designation switch (B 1 -B 4 ) is connected to the data terminals D D -D A of the divider 2 connected to the basic oscillator 1 and the reset switch RESET, respectively, and the divider 2 Load terminal (Roc) of Inverter as inverter (I) ) JK flip-flop (F / F 1- F / F 5 ) in order to the output terminal (Q) of the divider (2), the duty cycle designation switch (A 1- A 5 ) Clear terminal of JK flip-flop (F / F 1 -F / F 5 ) ) And preset terminal ( The clock generation circuit of the duty cycle, characterized in that configured selectively connected to). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870012558A 1987-11-07 1987-11-07 Clock generating circuit of duty-cycle KR900006821B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870012558A KR900006821B1 (en) 1987-11-07 1987-11-07 Clock generating circuit of duty-cycle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870012558A KR900006821B1 (en) 1987-11-07 1987-11-07 Clock generating circuit of duty-cycle

Publications (2)

Publication Number Publication Date
KR890009088A true KR890009088A (en) 1989-07-13
KR900006821B1 KR900006821B1 (en) 1990-09-21

Family

ID=19265871

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870012558A KR900006821B1 (en) 1987-11-07 1987-11-07 Clock generating circuit of duty-cycle

Country Status (1)

Country Link
KR (1) KR900006821B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100390152B1 (en) * 1996-04-25 2003-09-19 주식회사 하이닉스반도체 Circuit for correcting duty cycle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100390152B1 (en) * 1996-04-25 2003-09-19 주식회사 하이닉스반도체 Circuit for correcting duty cycle

Also Published As

Publication number Publication date
KR900006821B1 (en) 1990-09-21

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