KR890008663A - Picture and Character Video Pattern Selection Circuit of CRT Display - Google Patents

Picture and Character Video Pattern Selection Circuit of CRT Display Download PDF

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Publication number
KR890008663A
KR890008663A KR870012641A KR870012641A KR890008663A KR 890008663 A KR890008663 A KR 890008663A KR 870012641 A KR870012641 A KR 870012641A KR 870012641 A KR870012641 A KR 870012641A KR 890008663 A KR890008663 A KR 890008663A
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KR
South Korea
Prior art keywords
output
bit
gate
picture
inputting
Prior art date
Application number
KR870012641A
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Korean (ko)
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KR900002793B1 (en
Inventor
홍현석
Original Assignee
안시환
삼성전자 주식회사
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Priority to KR1019870012641A priority Critical patent/KR900002793B1/en
Publication of KR890008663A publication Critical patent/KR890008663A/en
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Publication of KR900002793B1 publication Critical patent/KR900002793B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/153—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using cathode-ray tubes

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Processing Of Color Television Signals (AREA)
  • Studio Circuits (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

내용 없음No content

Description

CRT디스플레이의 그림과 문자비데오패턴 선택회로Picture and Character Video Pattern Selection Circuit of CRT Display

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 2 도는 본 발명의 그림과 문자 비데오 패턴 선택회로도.2 is a drawing and character video pattern selection circuit diagram of the present invention.

제 3 도는 제 2 도의 회로에 입출력되는 신호파형도.3 is a signal waveform diagram input and output to the circuit of FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10,20 : 레지스터 30,40 : 멀티플렉서10,20: Register 30,40: Multiplexer

50-59 : 논리게이트50-59: Logic Gate

Claims (2)

패턴발생부와 그림색데이터 변환부 및 그림데이터 인식부를 포함하여 이루어진 CRT디스플레이의 인터페이스 회로에 있어서, 상기 그림색 데이터변환부의 색데이터(GC1-GC3) 및 패턴발생부의 화면표시구간 신호(DIS)를 입력하는 4비트 레지스터(10)와 패턴발생부의 문자색 상반전신호(REV) 및 문자색데이터 (CD1-CD3)가 입력되는 익스클루시브 오아게이트(50-52)와 노아게이트 (54)를 논리식 가 되도록 연결하고, 상기 논리식에 따른 출력과 그림선택신호(GS)를 논리합하는 오아게이트(53)의 출력과 상기 익스클루시브 오아게이트(50-52)의 출력을 입력할 4비트 레지스터(20)는 도트클럭(CLK)에 의해 동기되고 리세트신호로 클리어 되게 연결하고, 상기4비트 레지스터(10)(20)의 각 입출력을 공통으로 입력하는 노아게이트(55)와 오아게이트 (56)의 출력 및 4비트 레지스터(10)(20)의 각 2비트 출력을 입력하는 2비트 출력용 멀티플렉서(30)와, 4비트 레지스터(10)(20)의 각 1비트출력과 상기 노아게이트(55) 및 오아게이트 (56)의 출력을 입력하는 1비트출력용 멀티플렉서(40)은 선택출력되는 신호를 각각 입력하고 또한 다른단자에 레지스터 (10)의 입출력이 공통으로 입력되도록 한 오아게이트(57-59)와 연결 되어 상기 오아게이트(57-59)에서 비데오색데이터(VS1-VS3)가 출력되도록 연결한 것을 특징으로 하는 CRE디스플레이의 그림과 문자비데오 패턴선택회로.In the interface circuit of the CRT display including a pattern generator, a picture color data converter, and a picture data recognizer, the color data (GC 1 -GC 3 ) of the picture color data converter and the screen display interval signal (DIS) of the pattern generator Exclusive OA gate (50-52) and Noa gate (54), to which the 4-bit register 10 for inputting (), the character color phase inversion signal (REV) of the pattern generator, and the character color data (CD 1 to CD 3 ) are input. Logical expression And a 4-bit register 20 for inputting the output of the oragate 53 and the output of the exclusive oracle 50-52 that are ORed together with the output according to the logic equation and the picture selection signal GS. Is connected to be synchronized by the dot clock CLK and cleared with the reset signal, and the outputs of the noar gate 55 and the ora gate 56 which commonly input the input / output of the 4-bit registers 10 and 20 in common. And a 2-bit multiplexer 30 for inputting each 2-bit output of the 4-bit registers 10 and 20, each of the 1-bit outputs of the 4-bit registers 10 and 20, and the noar gate 55 and the OR. The 1-bit output multiplexer 40 for inputting the output of the gate 56 is connected to an oragate 57-59 which inputs a signal to be output as a select output and inputs and outputs of the register 10 to other terminals in common. the bidet autumnal data from the Iowa gate (57-59) (VS 1 -VS 3 ) CRE picture display, characterized in that the output connection so that characters and video pattern selector. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870012641A 1987-11-10 1987-11-10 Video pattern selecting circuit for crt display of picture and character KR900002793B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870012641A KR900002793B1 (en) 1987-11-10 1987-11-10 Video pattern selecting circuit for crt display of picture and character

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870012641A KR900002793B1 (en) 1987-11-10 1987-11-10 Video pattern selecting circuit for crt display of picture and character

Publications (2)

Publication Number Publication Date
KR890008663A true KR890008663A (en) 1989-07-12
KR900002793B1 KR900002793B1 (en) 1990-04-30

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870012641A KR900002793B1 (en) 1987-11-10 1987-11-10 Video pattern selecting circuit for crt display of picture and character

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KR (1) KR900002793B1 (en)

Also Published As

Publication number Publication date
KR900002793B1 (en) 1990-04-30

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