KR890000659Y1 - Control circuit for the speed of motors - Google Patents

Control circuit for the speed of motors Download PDF

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Publication number
KR890000659Y1
KR890000659Y1 KR2019860001045U KR860001045U KR890000659Y1 KR 890000659 Y1 KR890000659 Y1 KR 890000659Y1 KR 2019860001045 U KR2019860001045 U KR 2019860001045U KR 860001045 U KR860001045 U KR 860001045U KR 890000659 Y1 KR890000659 Y1 KR 890000659Y1
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voltage
output
speed
integrator
signal
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KR870012770U (en
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박상조
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삼성전자주식회사
정재은
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Electric Motors In General (AREA)

Abstract

내용 없음.No content.

Description

모타의 속도 제어회로Motor speed control circuit

제1도는 본 고안의 블럭도.1 is a block diagram of the present invention.

제2도는 본 고안의 상세한 회로도.2 is a detailed circuit diagram of the present invention.

*도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

R1-R23: 저항 VR1,VR2: 가변저항R 1 -R 23 : resistance VR 1 , VR 2 : variable resistance

OP1-OP6: 연산 증폭기 D1-D4: 다이오드OP 1 -OP 6 : Operational Amplifiers D 1 -D 4 : Diodes

C1-C3: 콘덴서C 1 -C 3 : Capacitor

본 고안은 모타의 속도제어회로에 관한 것으로서,특히 카메라 줌렌즈(ZOOM LENS)등에 사용되는 소형 모타의 속도 제어 회로에 관한 것이다.The present invention relates to a speed control circuit of a motor, and more particularly, to a speed control circuit of a small motor used in a camera zoom lens or the like.

종래에는 소형 모타의 속도 제어시 모타의 지시속도와 모타의 현재속도의 오차값이 커서 모타 속도의 과출력이 발생하는 단점이 있었다.In the related art, when the speed of a small motor is controlled, an error value between the motor's indicating speed and the motor's current speed is large, resulting in an overpower of the motor speed.

따라서 본 고안의 목적은 상기 결점을 해결하기 위해 안출한 것으로서,모타 속도의 오차 제한 회로와 π-형 증폭회로로 구성된 속도제한 회로에 의해서 모타의 지시 속도와 검출속도의 오차값과,속도의 과출력이 최소화된 회로를 제공하는데 있다.Therefore, the object of the present invention is to solve the above-mentioned drawbacks, and the error value of the motor's indicated speed and the detected speed by the speed limit circuit composed of the motor speed error limiting circuit and the π-type amplifier circuit, To provide a circuit with a minimum output.

이하,첨부된 도면에 의거하여 본 고안의 실시예를 상세히 설명하면 다음과 같다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in detail.

제1도에 도시된 블럭도에서 오차 제한 회로(GCC)는 입력신호에 따라 동작되는 양전압 제한부(A)와 음전압 제한부(B)로 구성되고, π형 증폭회로(PLA)는 음전압 적분기(C)와 양전압 적분기(D)및 비교부(E),그리고 증폭부(F)로 구성된다.In the block diagram shown in FIG. 1, the error limiting circuit GCC includes a positive voltage limiting unit A and a negative voltage limiting unit B operated according to an input signal, and the π-type amplifying circuit PLA is negative. It consists of a voltage integrator (C), a positive voltage integrator (D), a comparator (E), and an amplifier (F).

두 입력신호를 비교부(E)에서 비교하여 양(+)전압이 출력시 양전압 제한부(A)에서 출력된 전압이 양전압 적분기(D)에 입력되어 적분신호로 출력되고,비교부(E)의 출력과 결합하는 증폭부(F)를 거쳐 속도 제한 신호를 출력한다.When the two input signals are compared by the comparator E, when the positive voltage is output, the voltage output from the positive voltage limiter A is input to the positive voltage integrator D and output as an integrated signal. A speed limit signal is output through an amplifier F coupled to the output of E).

만일 비교부(E)의 출력이 음(-)전압일때 음 전압 제한부(B)에서 출력된 신호가 음전압 적분기(C)를 거쳐 비교부(E)에서 출력된 신호가 음전압 적분기(C)를 거쳐 비교부(E)의 출력과 결합하는 증폭부(F)를 거쳐서 속도제한 신호를 출력한다.If the output of the comparator E is a negative voltage, the signal output from the negative voltage limiter B passes through the negative voltage integrator C, and the signal output from the comparator E becomes the negative voltage integrator C. The speed limit signal is output through the amplifier F coupled to the output of the comparator E through the reference signal.

제2도는 본 고안의 상세한 회로도로서,모타의 지시 속도(Wr)와 검출속도(Wf)의 오차값이 즉 전압의 차이가 너무 커지는 것을 제한하는 오차 제한 회로(GCC)의 양전압 제한부(A)는 저항(R1,R2)을 거친 전원을 입력하고 입, 출력단자에 저항(R3)과 가변저항을 직렬로,그리고 제너다이오드(ZD)를 병렬로 연결하여 부궤환시킨 연산 증폭기(OP1)로 구성한다.2 is a detailed circuit diagram of the present invention, in which a positive voltage limiting part of an error limiting circuit (GCC) restricts an error value between a motor's indicated speed (W r ) and a detected speed (W f ) from becoming too large. (A) inputs power through resistors (R 1 , R 2 ), negative feedback by connecting resistor (R 3 ) and variable resistor in series, and Zener diode (ZD) in parallel to input and output terminals. It is composed of an amplifier (OP 1).

음전압 제한부(B)는 연산증폭기(OP1)의 출력신호가 저항(R4)을 거쳐 입력하고, 입, 출력단자에 저항(R5)을 연결하여 부궤환 시킨 연산증폭기(OP2)로 구성한다.A negative voltage limiting section (B) comprises an operational amplifier (OP 1) the output signal is a resistance (R 4) to which via input, input, feedback unit by connecting a resistor (R 5) to the output terminal operational amplifier (OP 2) It consists of.

그리고 모타의 지시속도(Wr)와 검출속도(Wf)의 오차값을 제어하여 속도에 비례하는 전압을 출력하는 π-형 증폭회로(PLA)의 음전압적분기(C)는 다이오드(D1)와 저항(R6)을 거친 연산증폭기(OP2)의 출신호를 입력하고,접지된 입력단자와 출력단자에 저항(R10)과 콘덴서(C1)을 병렬로 연결하여 부궤환시킨 연산증폭기(OP3)로 구성한다.양전압 적분기(D)는 저항(R7,R8)을 거친 연산증폭기(OP3)의 입력신호와 다이오드(D2),저항(R9)을 거친 연산증폭기(OP1)의 출력신호를 결합하여 입력하고,접지된 입력단자와 출력단자에 저항(R11)과 콘덴서(C2)를 병렬로 연결하여 부궤환시킨 연산증폭기(OP4)로 구성한다.The negative voltage integrator C of the π-type amplification circuit PLA which controls the error value between the motor's indicated speed W r and the detected speed W f and outputs a voltage proportional to the speed is the diode D 1. ) And the return signal of the operational amplifier (OP 2 ) passing through the resistor (R 6 ) and negative feedback by connecting the resistor (R 10 ) and the capacitor (C 1 ) in parallel to the grounded input terminal and output terminal. shall consist of an amplifier (OP 3). positive voltage integrator (D) is a resistor (R 7, R 8) operation via the input signal and a diode (D 2), resistance (R 9) of the rough operational amplifier (OP 3) the Combining and outputting the output signal of the amplifier (OP 1 ), and consists of an operational amplifier (OP 4 ) by connecting a resistor (R 11 ) and a capacitor (C 2 ) in parallel to the grounded input terminal and the output terminal in parallel. .

증폭부(F)는 다이오드(D4)와 저항(R13)을 거친 연산증폭기(OP4)의 출력신호를 저항(R12)과 다이오드(D3)를 통하여 연산증폭기(OP3)의 출력단에 인가하거나,저항(R12)을 거친 출력신호를 저항(R22)을 거쳐서 입력되는 신호와 결합헤서 입력하며,입,출력단자에 저항(R23)으로 부궤환시킨 연산증폭기(OP6)로 구성한다.The amplifier F transmits the output signal of the operational amplifier OP 4 which has passed through the diode D 4 and the resistor R 13 to the output terminal of the operational amplifier OP 3 through the resistor R 12 and the diode D 3 . to the application, or the resistance (R 12) input through the coarse output signal a resistor (R 22) coupled to the signal input heseo and portions which feedback operational amplifier with a resistance (R 23) to the input and output terminal (OP 6) It consists of.

비교부(E)는 저항(R14,R15)과 접지된 콘덴서(C3)및 저항(R16)을 거친 모타 지시속도 신호(Wr)와,저항(R19,R20)과 가변저항(R20)을 거친 모타 검출속도 신호(Wf)가 결합하여 입력되고,다른 단자에는 접지된 저항(R17)과 연결하며,(R18)을 부궤환시킨 연산증폭기(OP5)로 구성된다.The comparator E includes a motor indicating speed signal W r through resistors R 14 and R 15 , a grounded capacitor C 3 and a resistor R 16 , and resistors R 19 and R 20 . The motor detection speed signal (W f ) passing through the resistor (R 20 ) is inputted, the other terminal is connected to the grounded resistor (R 17 ), and the operational amplifier (OP 5 ) with negative feedback (R 18 ). It is composed.

다음은 상술한 본 고안의 회로동작을 설명한 것이다.The following describes the circuit operation of the present invention described above.

모타의 지시 속도 신호(Wr)와 회전되는 모타의 검출속도 신호(Wf)가 π형 증폭회로(PIA)의 비교부(E)에 입력되어 두 신호를 비교하여 그 차이값을 출력하는 연산증폭기(OP5)에서,그 연산증폭기(OP5)의 출력전압이 양(+)일 경우에 즉 지시 속도(Wr)가 검출속도(Wf)보다 클때 양전압 제한부(A)의 제너다이오드(ZD)에 의해 클램프(Clamp)되어서 연산증폭기(OP1)의 출력신호가 양전압 적분기(D)의 다이오드(D2)와 저항(R9)을 거쳐서 연산증폭기(OP4)에 입력된다.The motor's indicated speed signal (W r ) and the motor's detected speed signal (W f ) are input to the comparator (E) of the π-type amplification circuit (PIA) to compare the two signals and output the difference value. amplifier (OP 5) in, in that the operational amplifier (OP 5), the output voltage is positive in the case of that is directed speed (W r), the detected speed is greater positive voltage limit unit (a) than that (W f) of the Zener Clamped by the diode ZD, the output signal of the operational amplifier OP 1 is input to the operational amplifier OP 4 via the diode D 2 of the positive voltage integrator D and the resistor R 9 . .

이때 연산증폭기(OP4)는 적분회로로 동작되어서 입력신호가 적분되어 출력하고,이 출력신호는 다이오드(D4)와 저항(R13,R21)을 거쳐서 연산증폭기(OP5)에서 출력된 신호와 결합되어 연산증폭기(OP6)에 입력된다.At this time, the operational amplifier OP 4 is operated as an integrating circuit so that the input signal is integrated and output, and this output signal is output from the operational amplifier OP 5 via the diode D 4 and the resistors R 13 and R 21 . The signal is combined with the signal and input to the operational amplifier OP 6 .

따라서 연산증폭기(OP6)의 출력전압이 모터의 속도를 제어하는 속도제어 신호(Wo)가 된다.Therefore, the output voltage of the operational amplifier OP 6 becomes the speed control signal Woo that controls the speed of the motor.

그러나 비교부(E)의 연산증폭기(OP5)에서 출력되는 출력전압이 음(-)일 경우에는 즉 지시 속도(Wr)가 검출속도(Wf)보다 작을때 음전압 제한부(E)의 연산증폭기(OP2)의 출력신호가 다이오드(D1)와 저항(R6)을 거쳐서 음전압 적분기(C)의 연산증폭기(OP3)에 입력된다.However, when the output voltage output from the operational amplifier OP 5 of the comparator E is negative, that is, when the indicating speed W r is smaller than the detection speed W f , the negative voltage limiter E the output signal of the operational amplifier (OP 2) is input to the operational amplifier (OP 3) of the diode (D 1) and the negative through a resistance (R 6) voltage integrator (C).

이때 연산증폭기(OP3)는 적분회로(RC회로)로 동작되어 입력신호가 적분되어 출력하고, 이 출력신호는 다이오드(D3)와 저항(R12,R22)을 거쳐서 연산증폭기(OP5)에서 출력한 음(-)의 출력전압과 결합하여 증폭부(F)의 연산증폭기(OP6)에 입력되며, 속도 제어 신호(Wo)를 출력한다.At this time, the operational amplifier (OP 3) has an integrating circuit configured to work as a (RC circuit) is the input signal is the integral output, and this output signal is a diode (D 3) and a resistor (R 12, R 22) the operational amplifier (OP 5 via the In combination with the negative output voltage output from the ()) is input to the operational amplifier (OP 6 ) of the amplifier (F), and outputs the speed control signal (Wo).

따라서 상술한 본 고안에 의하면 오차 제한 회로와 형 증폭회로로 구성하여 모타 속도제어 정밀성을 향상시키는 장점이 있다.Therefore, according to the present invention described above, there is an advantage of improving the motor speed control accuracy by configuring the error limiting circuit and the type amplifier circuit.

Claims (1)

비교부(E)의 출력전압이 양(+)전압일때 전원 전압을 양전압 적분기(D)에 인가하는 양전압 제한부(A)와 비교부(E)의 출력전압이 음(-)전압일때 전원 전압을 음전압 적분기(C)에 인가하는 음전압 제한부(B)로 구성한 오차 제한 회로(GCC)와,상기 오차 제한회로(GCC)에서 인가하는 신호에 따라 적분회로로 동작되는 음전압 적분기(C)와 양전압 적분기(D),모타의 지시 속도 신호(Wr)와 검출속도(Wf)를 비교하여 출력된 전압을 적분기(C)(D)에 인가하는 비교부(E)와,비교부에서 출력된 전압을 적분기(C)(D)에서 출력된 전압과 결합하여 모타의 속도 제어 신호를 출력하는 증폭부(F)로 구성한π형 증폭회로(PIA)로 이루어진 것을 특징으로 하는 모타의 속도 제어회로.When the output voltage of the comparator E is a positive voltage The positive voltage limiter A for applying the power supply voltage to the positive voltage integrator D and the output voltage of the comparator E are negative voltages. An error limiting circuit (GCC) consisting of a negative voltage limiting unit (B) for applying a power supply voltage to the negative voltage integrator (C), and a negative voltage integrator operating as an integrating circuit according to a signal applied from the error limiting circuit (GCC) (C) and the positive voltage integrator (D), the comparison unit (E) for applying the output voltage to the integrator (C) (D) by comparing the motor's indicated speed signal (W r ) and the detection speed (W f ) and , Π-type amplifying circuit (PIA) consisting of an amplifier (F) for outputting a motor speed control signal by combining the voltage output from the comparator with the voltage output from the integrator (C) (D) Motor speed control circuit.
KR2019860001045U 1986-01-31 1986-01-31 Control circuit for the speed of motors KR890000659Y1 (en)

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KR2019860001045U KR890000659Y1 (en) 1986-01-31 1986-01-31 Control circuit for the speed of motors

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Application Number Priority Date Filing Date Title
KR2019860001045U KR890000659Y1 (en) 1986-01-31 1986-01-31 Control circuit for the speed of motors

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KR870012770U KR870012770U (en) 1987-08-05
KR890000659Y1 true KR890000659Y1 (en) 1989-03-11

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