KR880012027A - Serial-to-parallel and parallel-to-serial shared converter - Google Patents

Serial-to-parallel and parallel-to-serial shared converter Download PDF

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Publication number
KR880012027A
KR880012027A KR870002595A KR870002595A KR880012027A KR 880012027 A KR880012027 A KR 880012027A KR 870002595 A KR870002595 A KR 870002595A KR 870002595 A KR870002595 A KR 870002595A KR 880012027 A KR880012027 A KR 880012027A
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KR
South Korea
Prior art keywords
serial
parallel
data
input
mut
Prior art date
Application number
KR870002595A
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Korean (ko)
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KR890004319B1 (en
Inventor
변형구
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한형수
삼성전자 주식회사
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Application filed by 한형수, 삼성전자 주식회사 filed Critical 한형수
Priority to KR1019870002595A priority Critical patent/KR890004319B1/en
Publication of KR880012027A publication Critical patent/KR880012027A/en
Application granted granted Critical
Publication of KR890004319B1 publication Critical patent/KR890004319B1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

내용 없음No content

Description

직-병렬 및 병-직렬 공용 번환회로Series-parallel and bottle-serial common circuit

제1도는 직렬 데이터를 병렬 데이터로 변환시키는 종래의 직-병렬 변환기.1 is a conventional serial-to-parallel converter for converting serial data into parallel data.

제2도는 제1도의 동작을 설명하기 위한 중요 부분의 입출력 파형을 도시한 도면.FIG. 2 is a diagram showing input and output waveforms of important parts for explaining the operation of FIG.

제3도는 병렬 데이터를 직렬 데이터로 변환시키는 병-직렬 변환기를 도시한 도면.3 shows a parallel-to-serial converter for converting parallel data into serial data.

내용 없음No content

Claims (1)

입력단자(S)(P)에 인가되는 데이터를 입력선택 신호(P/S)에 의해서 선택하여 멀티플렉싱하는 멀티플렉서(MUT1-MUT8)의 출력을 입력 데이터로 하여 클럭펄스(CK)에 의해 시프트 시키는 D형 플립플롭(FF1-FF8)과, 상기한 D형 플립플롭(FF1-FF8)에서 출력되는 데이터를 받아 래치클럭펄스(CLK)에 의해서 래치시키는 래치부(LAT)와, 병렬 데이터를 직렬 데이터로 변환시키거나 반대로 직렬 데이터를 병렬 데이터로 변환시킬 때 입력단에 들어오는 데이터와 충돌을 방지하기 위한 수단으로 사용되는 버퍼(B0-B8)등을 구비하여 이루어진 것을 특징으로 하는 직-병렬 및 병-직렬 공용 변환회로.Shift by clock pulse CK, using the output of the multiplexer (MUT 1 to MUT 8 ) which selects and multiplexes the data applied to the input terminals S and P by the input selection signal P / S as input data. A D-type flip-flop (FF 1 -FF 8 ), a latch portion (LAT) receiving the data outputted from the D-type flip-flop (FF 1 -FF 8 ) and latching it by a latch clock pulse (CLK), And a buffer (B 0 -B 8 ), which is used as a means for preventing collision with data coming into an input terminal when converting parallel data into serial data or vice versa. Serial-to-parallel and parallel-to-serial common conversion circuits. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870002595A 1987-03-21 1987-03-21 Parallel/series convertor KR890004319B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870002595A KR890004319B1 (en) 1987-03-21 1987-03-21 Parallel/series convertor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870002595A KR890004319B1 (en) 1987-03-21 1987-03-21 Parallel/series convertor

Publications (2)

Publication Number Publication Date
KR880012027A true KR880012027A (en) 1988-10-31
KR890004319B1 KR890004319B1 (en) 1989-10-30

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ID=19260188

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870002595A KR890004319B1 (en) 1987-03-21 1987-03-21 Parallel/series convertor

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KR (1) KR890004319B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100340058B1 (en) * 1998-06-27 2002-07-18 박종섭 Transferring apparatus for bus signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100340058B1 (en) * 1998-06-27 2002-07-18 박종섭 Transferring apparatus for bus signal

Also Published As

Publication number Publication date
KR890004319B1 (en) 1989-10-30

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