KR870003464A - Multitrack Modulation Circuits of Digital Audio Equipment - Google Patents
Multitrack Modulation Circuits of Digital Audio Equipment Download PDFInfo
- Publication number
- KR870003464A KR870003464A KR1019850007022A KR850007022A KR870003464A KR 870003464 A KR870003464 A KR 870003464A KR 1019850007022 A KR1019850007022 A KR 1019850007022A KR 850007022 A KR850007022 A KR 850007022A KR 870003464 A KR870003464 A KR 870003464A
- Authority
- KR
- South Korea
- Prior art keywords
- multitrack
- digital audio
- audio equipment
- modulation circuits
- gate
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/09—Digital recording
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제3도는 본 발명의 회로도.3 is a circuit diagram of the present invention.
제4도는 본 발명의 회로도를 구동시키기 위한 콘트롤 회로.4 is a control circuit for driving a circuit diagram of the present invention.
제5도는 본 발명 회로도의 각부 타임챠트.5 is a time chart of each part of the circuit diagram of the present invention.
10:변조회로 12:2진카운터 13:12진카운터 14:데코더 FF1:플립플롭 A1,A2,A3…:앤드게이트 OR1,OR2,OR3…:오아게이트 P/S:병직렬회로 BU1,BU2,BU3:버퍼 20:변조부 21,22:프레임버퍼 23,24:싱크발생부 25:랫치10: Modulation circuit 12: Binary counter 13: 12 Bin counter 14: Decoder FF 1 : Flip flops A 1 , A 2 , A 3 . : AND gate OR 1 , OR 2 , OR 3 . : Iowa gate P / S: parallel-to-serial circuit BU 1, BU 2, BU 3 : buffer 20: modulation unit 21, 22: a frame buffer 23, 24: sink generating part 25: latch
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019850007022A KR890001897B1 (en) | 1985-09-25 | 1985-09-25 | Modulation circuit of digital audio tape |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019850007022A KR890001897B1 (en) | 1985-09-25 | 1985-09-25 | Modulation circuit of digital audio tape |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870003464A true KR870003464A (en) | 1987-04-17 |
KR890001897B1 KR890001897B1 (en) | 1989-05-30 |
Family
ID=19242871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019850007022A KR890001897B1 (en) | 1985-09-25 | 1985-09-25 | Modulation circuit of digital audio tape |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR890001897B1 (en) |
-
1985
- 1985-09-25 KR KR1019850007022A patent/KR890001897B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR890001897B1 (en) | 1989-05-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20030512 Year of fee payment: 15 |
|
LAPS | Lapse due to unpaid annual fee |