KR860015290U - Data loss prevention circuit when synchronous signal is damaged - Google Patents

Data loss prevention circuit when synchronous signal is damaged

Info

Publication number
KR860015290U
KR860015290U KR2019850005969U KR850005969U KR860015290U KR 860015290 U KR860015290 U KR 860015290U KR 2019850005969 U KR2019850005969 U KR 2019850005969U KR 850005969 U KR850005969 U KR 850005969U KR 860015290 U KR860015290 U KR 860015290U
Authority
KR
South Korea
Prior art keywords
damaged
data loss
synchronous signal
prevention circuit
loss prevention
Prior art date
Application number
KR2019850005969U
Other languages
Korean (ko)
Other versions
KR890004227Y1 (en
Inventor
장이한
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019850005969U priority Critical patent/KR890004227Y1/en
Publication of KR860015290U publication Critical patent/KR860015290U/en
Application granted granted Critical
Publication of KR890004227Y1 publication Critical patent/KR890004227Y1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/008—Recording on, or reproducing or erasing from, magnetic tapes, sheets, e.g. cards, or wires
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
KR2019850005969U 1985-05-20 1985-05-20 Data missing circuit KR890004227Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019850005969U KR890004227Y1 (en) 1985-05-20 1985-05-20 Data missing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019850005969U KR890004227Y1 (en) 1985-05-20 1985-05-20 Data missing circuit

Publications (2)

Publication Number Publication Date
KR860015290U true KR860015290U (en) 1986-12-30
KR890004227Y1 KR890004227Y1 (en) 1989-06-26

Family

ID=19242311

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019850005969U KR890004227Y1 (en) 1985-05-20 1985-05-20 Data missing circuit

Country Status (1)

Country Link
KR (1) KR890004227Y1 (en)

Also Published As

Publication number Publication date
KR890004227Y1 (en) 1989-06-26

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Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
LAPS Lapse due to unpaid annual fee