KR810001711B1 - 선형 전하 결합소자의 동작방법 - Google Patents
선형 전하 결합소자의 동작방법 Download PDFInfo
- Publication number
- KR810001711B1 KR810001711B1 KR7703128A KR770003128A KR810001711B1 KR 810001711 B1 KR810001711 B1 KR 810001711B1 KR 7703128 A KR7703128 A KR 7703128A KR 770003128 A KR770003128 A KR 770003128A KR 810001711 B1 KR810001711 B1 KR 810001711B1
- Authority
- KR
- South Korea
- Prior art keywords
- charge
- ccd
- input
- potential well
- signal
- Prior art date
Links
- 239000002800 charge carrier Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 9
- 230000004044 response Effects 0.000 claims description 5
- 230000001902 propagating effect Effects 0.000 claims description 3
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 description 16
- 238000009792 diffusion process Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000005036 potential barrier Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 230000000644 propagated effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 230000001502 supplementing effect Effects 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 230000003612 virological effect Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/891—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0198—Integrating together multiple components covered by H10D44/00, e.g. integrating charge coupled devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
- H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
- H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
- H10D89/819—Bias arrangements for gate electrodes of FETs, e.g. RC networks or voltage partitioning circuits
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
Claims (1)
- 제1신호레벨 V1과 제2신호레벨 V2사이의 제1입력신호 범위에서 비교적 비직선적이고, 제2신호레벨 V2와 제3신호레벨사이의 제2입력신호 범위에서 비교적 직선적인 생성된 전하 캐리어수 대 입력신호전압의 입력전위 우물 이송 함수를 갖는 형태의 CCD를 동작시키기 위한 방법에 있어서, 제2신호 레벨 V2에서 입력신호에 반응하여 생성될 전하 캐어의 수에 해당하는 레벨에서 바이어스 전하를 입력전위 우물에 위치시키고,긴 폭이 0에서 (V3-V2)의 범위안에 있게되는 입력신호에 비례하는 수많은 전하 캐리어를 입력전위 우물안의 바이어스 전하에 부가하고,부이어스 전하신호를 초과한느 전하의 부분만을 전위 우물로부터 넘쳐 나가게 하고,최대 입력신호레벨 V3-V2에 따라 전하를 축적할 수 있는 충분한 용량을 갖는 입력전위 우물보다 더 작은 용량의 전위 우물에 넘쳐 지나가는 전하를 전파시킴으로써 넘쳐지나가는 전하를 CCD의 길이방향으로 이동시키는 단계등으로 구성됨을 특징으로 하는 선형전하 결합소자의 자동작방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR7703128A KR810001711B1 (ko) | 1977-12-30 | 1977-12-30 | 선형 전하 결합소자의 동작방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR7703128A KR810001711B1 (ko) | 1977-12-30 | 1977-12-30 | 선형 전하 결합소자의 동작방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR810001711B1 true KR810001711B1 (ko) | 1981-10-27 |
Family
ID=19205526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR7703128A KR810001711B1 (ko) | 1977-12-30 | 1977-12-30 | 선형 전하 결합소자의 동작방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR810001711B1 (ko) |
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1977
- 1977-12-30 KR KR7703128A patent/KR810001711B1/ko active
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PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19771230 |
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