KR20260025317A - 반도체 장치 및 반도체 장치의 제작 방법 - Google Patents
반도체 장치 및 반도체 장치의 제작 방법Info
- Publication number
- KR20260025317A KR20260025317A KR1020257042150A KR20257042150A KR20260025317A KR 20260025317 A KR20260025317 A KR 20260025317A KR 1020257042150 A KR1020257042150 A KR 1020257042150A KR 20257042150 A KR20257042150 A KR 20257042150A KR 20260025317 A KR20260025317 A KR 20260025317A
- Authority
- KR
- South Korea
- Prior art keywords
- insulating layer
- layer
- region
- conductive layer
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2023-099552 | 2023-06-16 | ||
| JP2023099552 | 2023-06-16 | ||
| PCT/IB2024/055638 WO2024256943A1 (ja) | 2023-06-16 | 2024-06-10 | 半導体装置、及び半導体装置の作製方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20260025317A true KR20260025317A (ko) | 2026-02-24 |
Family
ID=93851439
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020257042150A Pending KR20260025317A (ko) | 2023-06-16 | 2024-06-10 | 반도체 장치 및 반도체 장치의 제작 방법 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPWO2024256943A1 (https=) |
| KR (1) | KR20260025317A (https=) |
| CN (1) | CN121286117A (https=) |
| WO (1) | WO2024256943A1 (https=) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8643010B2 (en) * | 2010-04-21 | 2014-02-04 | Sharp Kabushiki Kaisha | Semiconductor device, method for fabricating the same, active matrix substrate, and display device |
| JP5716445B2 (ja) * | 2011-02-21 | 2015-05-13 | 富士通株式会社 | 縦型電界効果トランジスタとその製造方法及び電子機器 |
| JP2013042117A (ja) * | 2011-07-15 | 2013-02-28 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
| TWI685113B (zh) * | 2015-02-11 | 2020-02-11 | 日商半導體能源研究所股份有限公司 | 半導體裝置及其製造方法 |
| JP2017168760A (ja) * | 2016-03-18 | 2017-09-21 | 株式会社ジャパンディスプレイ | 半導体装置 |
| JP7623864B2 (ja) * | 2021-03-22 | 2025-01-29 | 武漢天馬微電子有限公司 | 薄膜トランジスタ基板 |
-
2024
- 2024-06-10 JP JP2025526884A patent/JPWO2024256943A1/ja active Pending
- 2024-06-10 KR KR1020257042150A patent/KR20260025317A/ko active Pending
- 2024-06-10 WO PCT/IB2024/055638 patent/WO2024256943A1/ja not_active Ceased
- 2024-06-10 CN CN202480037820.XA patent/CN121286117A/zh active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JPWO2024256943A1 (https=) | 2024-12-19 |
| WO2024256943A1 (ja) | 2024-12-19 |
| CN121286117A (zh) | 2026-01-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| Q12 | Application published |
Free format text: ST27 STATUS EVENT CODE: A-1-1-Q10-Q12-NAP-PG1501 (AS PROVIDED BY THE NATIONAL OFFICE) |