KR20250113451A - 부재, 부재의 제조 방법, 감광성 수지 조성물, 및, 반도체 부재 - Google Patents

부재, 부재의 제조 방법, 감광성 수지 조성물, 및, 반도체 부재

Info

Publication number
KR20250113451A
KR20250113451A KR1020257020313A KR20257020313A KR20250113451A KR 20250113451 A KR20250113451 A KR 20250113451A KR 1020257020313 A KR1020257020313 A KR 1020257020313A KR 20257020313 A KR20257020313 A KR 20257020313A KR 20250113451 A KR20250113451 A KR 20250113451A
Authority
KR
South Korea
Prior art keywords
group
pattern
preferable
insulating pattern
formula
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
KR1020257020313A
Other languages
English (en)
Korean (ko)
Inventor
유타 야마카와
Original Assignee
후지필름 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지필름 가부시키가이샤 filed Critical 후지필름 가부시키가이샤
Publication of KR20250113451A publication Critical patent/KR20250113451A/ko
Pending legal-status Critical Current

Links

Classifications

    • H01L23/5283—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/027—Non-macromolecular photopolymerisable compounds having carbon-to-carbon double bonds, e.g. ethylenic compounds
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/027—Non-macromolecular photopolymerisable compounds having carbon-to-carbon double bonds, e.g. ethylenic compounds
    • G03F7/032—Non-macromolecular photopolymerisable compounds having carbon-to-carbon double bonds, e.g. ethylenic compounds with binders
    • G03F7/037—Non-macromolecular photopolymerisable compounds having carbon-to-carbon double bonds, e.g. ethylenic compounds with binders the binders being polyamides or polyimides
    • H01L21/4846—
    • H01L21/7684—
    • H01L21/76877—
    • H01L23/485—
    • H01L23/532—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062—Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Materials For Photolithography (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020257020313A 2022-12-28 2023-12-22 부재, 부재의 제조 방법, 감광성 수지 조성물, 및, 반도체 부재 Pending KR20250113451A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2022212155 2022-12-28
JPJP-P-2022-212155 2022-12-28
PCT/JP2023/046200 WO2024143210A1 (ja) 2022-12-28 2023-12-22 部材、部材の製造方法、感光性樹脂組成物、及び、半導体部材

Publications (1)

Publication Number Publication Date
KR20250113451A true KR20250113451A (ko) 2025-07-25

Family

ID=91717797

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020257020313A Pending KR20250113451A (ko) 2022-12-28 2023-12-22 부재, 부재의 제조 방법, 감광성 수지 조성물, 및, 반도체 부재

Country Status (5)

Country Link
JP (1) JPWO2024143210A1 (https=)
KR (1) KR20250113451A (https=)
CN (1) CN120476469A (https=)
TW (1) TW202445758A (https=)
WO (1) WO2024143210A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026048730A1 (ja) * 2024-08-30 2026-03-05 富士フイルム株式会社 接合体、接合体の製造方法、感光性樹脂組成物、及び、半導体デバイス

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019090946A (ja) 2017-11-15 2019-06-13 日立化成株式会社 ネガ型感光性樹脂組成物及び半導体装置部材の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3455442B2 (ja) * 1998-10-30 2003-10-14 日本電信電話株式会社 配線構造の製造方法
JP2001044198A (ja) * 1999-07-27 2001-02-16 Sony Corp 半導体装置およびその製造方法
JP2003209104A (ja) * 2002-01-15 2003-07-25 Hitachi Chemical Dupont Microsystems Ltd 半導体装置及びその材料
JP6225585B2 (ja) * 2012-10-29 2017-11-08 日立化成デュポンマイクロシステムズ株式会社 耐熱性樹脂組成物、該樹脂組成物を用いたパターン硬化膜の製造方法及び電子部品
JP6435860B2 (ja) * 2012-11-05 2018-12-19 大日本印刷株式会社 配線構造体
JPWO2017081922A1 (ja) * 2015-11-11 2018-08-23 東レ株式会社 半導体装置およびその製造方法
TWI894339B (zh) * 2020-08-25 2025-08-21 日商富士軟片股份有限公司 硬化性樹脂組成物、硬化物、積層體、硬化物之製造方法及半導體元件

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019090946A (ja) 2017-11-15 2019-06-13 日立化成株式会社 ネガ型感光性樹脂組成物及び半導体装置部材の製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
비특허문헌 1: Advances in Photosensitive Polymer Based Damascene RDL Processes: Toward Submicrometer Pitches With More Metal Layers, 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), pp340-346

Also Published As

Publication number Publication date
WO2024143210A1 (ja) 2024-07-04
TW202445758A (zh) 2024-11-16
JPWO2024143210A1 (https=) 2024-07-04
CN120476469A (zh) 2025-08-12

Similar Documents

Publication Publication Date Title
KR20230148224A (ko) 네거티브형 감광성 수지 조성물, 경화물, 적층체, 경화물의 제조 방법, 및, 반도체 디바이스
WO2024095884A1 (ja) 樹脂組成物、硬化物、積層体、硬化物の製造方法、積層体の製造方法、半導体デバイスの製造方法、及び、半導体デバイス
KR20250113446A (ko) 적층체의 제조 방법, 감광성 수지 조성물, 및, 반도체 부재의 제조 방법
EP4596608A1 (en) Resin composition, cured product, laminate, method for producing cured product, method for producing laminate, method for producing semiconductor device, and semiconductor device
KR20250056254A (ko) 막의 제조 방법, 감광성 수지 조성물, 경화물의 제조 방법, 경화물, 및 적층체
KR20250055604A (ko) 수지 조성물, 경화물, 적층체, 경화물의 제조 방법, 적층체의 제조 방법, 반도체 디바이스의 제조 방법, 및, 반도체 디바이스
KR20240110029A (ko) 적층체, 디바이스, 수지 조성물, 경화물의 제조 방법, 적층체의 제조 방법, 및, 디바이스의 제조 방법
KR20240157714A (ko) 경화물의 제조 방법, 반도체 디바이스의 제조 방법, 처리액, 및, 수지 조성물
KR20250113451A (ko) 부재, 부재의 제조 방법, 감광성 수지 조성물, 및, 반도체 부재
WO2022176869A1 (ja) 永久膜の製造方法、積層体の製造方法、及び、半導体デバイスの製造方法
KR20250114053A (ko) 부재, 부재의 제조 방법, 감광성 수지 조성물, 및, 반도체 부재
KR102933491B1 (ko) 감광성 수지 조성물, 경화물, 적층체, 경화물의 제조 방법, 적층체의 제조 방법, 반도체 디바이스의 제조 방법, 및, 반도체 디바이스
KR20250078499A (ko) 수지 조성물, 경화물, 적층체, 경화물의 제조 방법, 적층체의 제조 방법, 반도체 디바이스의 제조 방법, 및, 반도체 디바이스
KR20250040991A (ko) 수지 조성물, 경화물, 적층체, 경화물의 제조 방법, 적층체의 제조 방법, 반도체 디바이스의 제조 방법, 및, 반도체 디바이스
WO2024101266A1 (ja) 樹脂組成物、硬化物、積層体、硬化物の製造方法、積層体の製造方法、半導体デバイスの製造方法、及び、半導体デバイス
WO2022210226A1 (ja) 樹脂組成物、硬化物、積層体、硬化物の製造方法、及び、半導体デバイス、並びに、化合物
KR20250110271A (ko) 적층체의 제조 방법, 반도체 부재의 제조 방법, 감광성 수지 조성물, 적층체, 반도체 부재, 및, 수지 조성물
WO2026048730A1 (ja) 接合体、接合体の製造方法、感光性樹脂組成物、及び、半導体デバイス
WO2026048731A1 (ja) 接合体、接合体の製造方法、感光性樹脂組成物、及び、半導体デバイス
KR20250042161A (ko) 수지 조성물, 경화물, 적층체, 경화물의 제조 방법, 적층체의 제조 방법, 반도체 디바이스의 제조 방법, 및, 반도체 디바이스
KR20250039447A (ko) 수지 조성물, 경화물, 적층체, 경화물의 제조 방법, 적층체의 제조 방법, 반도체 디바이스의 제조 방법, 및, 반도체 디바이스
WO2024101295A1 (ja) 硬化物の製造方法、積層体の製造方法、半導体デバイスの製造方法、及び、半導体デバイス
WO2024090460A1 (ja) 樹脂組成物、硬化物、積層体、硬化物の製造方法、積層体の製造方法、半導体デバイスの製造方法、及び、半導体デバイス
WO2025070302A1 (ja) 樹脂組成物、及び再配線層用層間絶縁膜の製造方法
WO2026048734A1 (ja) 接合体の製造方法、半導体部材の製造方法、感光性樹脂組成物、積層体、半導体部材、及び、樹脂組成物

Legal Events

Date Code Title Description
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

Q12 Application published

Free format text: ST27 STATUS EVENT CODE: A-1-1-Q10-Q12-NAP-PG1501 (AS PROVIDED BY THE NATIONAL OFFICE)

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

D21 Rejection of application intended

Free format text: ST27 STATUS EVENT CODE: A-1-2-D10-D21-EXM-PE0902 (AS PROVIDED BY THE NATIONAL OFFICE)

PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13 Pre-grant limitation requested

Free format text: ST27 STATUS EVENT CODE: A-2-3-E10-E13-LIM-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11 Amendment of application requested

Free format text: ST27 STATUS EVENT CODE: A-2-2-P10-P11-NAP-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000