KR20250005122A - 다이 칩핑을 제거하기 위한 다이 에지 보호 - Google Patents

다이 칩핑을 제거하기 위한 다이 에지 보호 Download PDF

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Publication number
KR20250005122A
KR20250005122A KR1020247034056A KR20247034056A KR20250005122A KR 20250005122 A KR20250005122 A KR 20250005122A KR 1020247034056 A KR1020247034056 A KR 1020247034056A KR 20247034056 A KR20247034056 A KR 20247034056A KR 20250005122 A KR20250005122 A KR 20250005122A
Authority
KR
South Korea
Prior art keywords
die
protection layer
protective layer
wafer
sidewalls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
KR1020247034056A
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English (en)
Korean (ko)
Inventor
사미르 선일 바다브카르
창한 호비 윤
파라그쿠마르 아제이바이 타데사르
노선 박
다니엘 대익 김
Original Assignee
퀄컴 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20250005122A publication Critical patent/KR20250005122A/ko
Pending legal-status Critical Current

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Classifications

    • H01L23/562
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • H01L21/304
    • H01L21/78
    • H01L23/3171
    • H01L23/3185
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00Grinding, lapping or polishing of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/121Arrangements for protection of devices protecting against mechanical damage
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/141Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being on at least the sidewalls of the semiconductor body

Landscapes

  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
KR1020247034056A 2022-04-27 2023-02-24 다이 칩핑을 제거하기 위한 다이 에지 보호 Pending KR20250005122A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/661,029 2022-04-27
US17/661,029 US20230352423A1 (en) 2022-04-27 2022-04-27 Die edge protection to eliminate die chipping
PCT/US2023/063196 WO2023212440A1 (en) 2022-04-27 2023-02-24 Die edge protection to eliminate die chipping

Publications (1)

Publication Number Publication Date
KR20250005122A true KR20250005122A (ko) 2025-01-09

Family

ID=85706815

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020247034056A Pending KR20250005122A (ko) 2022-04-27 2023-02-24 다이 칩핑을 제거하기 위한 다이 에지 보호

Country Status (7)

Country Link
US (1) US20230352423A1 (https=)
EP (1) EP4515592A1 (https=)
JP (1) JP2025515434A (https=)
KR (1) KR20250005122A (https=)
CN (1) CN119173998A (https=)
TW (1) TW202410179A (https=)
WO (1) WO2023212440A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118843312A (zh) * 2023-04-23 2024-10-25 长江存储科技有限责任公司 存储器及其制作方法、存储系统

Family Cites Families (26)

* Cited by examiner, † Cited by third party
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US7338836B2 (en) * 2003-11-05 2008-03-04 California Institute Of Technology Method for integrating pre-fabricated chip structures into functional electronic systems
US7566634B2 (en) * 2004-09-24 2009-07-28 Interuniversitair Microelektronica Centrum (Imec) Method for chip singulation
US20080197474A1 (en) * 2007-02-16 2008-08-21 Advanced Chip Engineering Technology Inc. Semiconductor device package with multi-chips and method of the same
US20080197478A1 (en) * 2007-02-21 2008-08-21 Wen-Kun Yang Semiconductor device package with die receiving through-hole and connecting through-hole and method of the same
US7525185B2 (en) * 2007-03-19 2009-04-28 Advanced Chip Engineering Technology, Inc. Semiconductor device package having multi-chips with side-by-side configuration and method of the same
US8183095B2 (en) * 2010-03-12 2012-05-22 Stats Chippac, Ltd. Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
US20120112336A1 (en) * 2010-11-05 2012-05-10 Guzek John S Encapsulated die, microelectronic package containing same, and method of manufacturing said microelectronic package
US9508623B2 (en) * 2014-06-08 2016-11-29 UTAC Headquarters Pte. Ltd. Semiconductor packages and methods of packaging semiconductor devices
US9711463B2 (en) * 2015-01-14 2017-07-18 Taiwan Semiconductor Manufacturing Co., Ltd. Dicing method for power transistors
US9459500B2 (en) * 2015-02-09 2016-10-04 Omnivision Technologies, Inc. Liquid crystal on silicon panels and associated methods
JP2016192509A (ja) * 2015-03-31 2016-11-10 Koa株式会社 チップ抵抗器
EP3332429B1 (en) * 2015-08-03 2023-10-18 Lumileds LLC Semiconductor light emitting device with reflective side coating
US9892989B1 (en) * 2016-12-08 2018-02-13 Nxp B.V. Wafer-level chip scale package with side protection
CN108695265A (zh) * 2017-04-11 2018-10-23 财团法人工业技术研究院 芯片封装结构及其制造方法
CN109300794B (zh) * 2017-07-25 2021-02-02 中芯国际集成电路制造(上海)有限公司 封装结构及其形成方法
US11361970B2 (en) * 2017-08-17 2022-06-14 Semiconductor Components Industries, Llc Silicon-on-insulator die support structures and related methods
US10410978B2 (en) * 2018-01-24 2019-09-10 Sanken Electric Co., Ltd. Semiconductor wafer and method for forming semiconductor
US11164848B2 (en) * 2019-06-20 2021-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method manufacturing the same
US11289396B2 (en) * 2019-09-29 2022-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Sensing component encapsulated by an encapsulation layer with a roughness surface having a hollow region
EP3823016A1 (en) * 2019-11-12 2021-05-19 Infineon Technologies AG Semiconductor package with a semiconductor die
KR102218988B1 (ko) * 2020-04-21 2021-02-23 (주)라이타이저 Led칩 전사용 감광성 전사 수지, 그 감광성 전사 수지를 이용한 led칩 전사 방법 및 이를 이용한 디스플레이 장치의 제조 방법
US11393720B2 (en) * 2020-06-15 2022-07-19 Micron Technology, Inc. Die corner protection by using polymer deposition technology
US11552074B2 (en) * 2020-06-15 2023-01-10 Taiwan Semiconductor Manufacturing Company, Ltd. Package structures and methods of fabricating the same
US11450581B2 (en) * 2020-08-26 2022-09-20 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit package and method
US12198998B2 (en) * 2021-12-09 2025-01-14 Nxp B.V. Dielectric sidewall protection and sealing for semiconductor devices in a in wafer level packaging process
US12228776B2 (en) * 2022-01-31 2025-02-18 Taiwan Semiconductor Manufacturing Co., Ltd. Package with integrated optical die and method forming same

Also Published As

Publication number Publication date
JP2025515434A (ja) 2025-05-15
WO2023212440A1 (en) 2023-11-02
TW202410179A (zh) 2024-03-01
US20230352423A1 (en) 2023-11-02
CN119173998A (zh) 2024-12-20
EP4515592A1 (en) 2025-03-05

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Legal Events

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PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000