KR20240036299A - Apparatus and method for testing performance according to voltage fluctuations - Google Patents

Abstract

The present invention sets a power pattern for each test item according to the input interface, power supply, and user input received through the input interface, and tests by applying power to the target device according to the power pattern set for each test item through the power supply device. It is characterized by including a processor that performs a test for each item and stores and outputs the results of the test for each test item.

Description

Power fluctuation test apparatus and method {APPARATUS AND METHOD FOR TESTING PERFORMANCE ACCORDING TO VOLTAGE FLUCTUATIONS}

The present invention relates to a power fluctuation testing apparatus and method, and more specifically, to a power fluctuation testing apparatus and method that can perform a test to confirm the performance of a device according to power fluctuation.

Depending on the power status of the vehicle, the voltage input to the controller provided in the vehicle may change. Therefore, prior to commercialization of the controller, tests are performed to determine whether the controller operates normally even in situations where power fluctuates. This test is performed by applying a pre-standardized power waveform to the controller and having the tester check the status of the controller according to the application through measuring equipment. However, in the case of this conventional test method, not only does it take a considerable amount of time to perform the test, but there is a possibility that human error may occur in the process of checking the status of the controller through measuring equipment.

The background technology of the present invention is disclosed in Korean Patent Publication No. 10-1950268 (February 14, 2019) entitled ‘Apparatus and method for verifying junction block circuit for vehicles’.

The present invention was conceived to solve the above-described problems, and an object of one aspect of the present invention is to provide a power fluctuation test apparatus and method that can perform a test to confirm the performance of a device according to power fluctuations.

A power fluctuation test device according to one aspect of the present invention includes an input interface; power supply; And setting a power pattern for each test item according to the user input received through the input interface, and performing a test for each test item while applying power to the target device according to the power pattern set for each test item through the power supply device. and a processor that stores and outputs the results of testing for each test item.

In the present invention, the processor generates and stores at least one power pattern segment according to a first user input received through the input interface, and the stored at least one power pattern segment according to a second user input received through the input interface. A power pattern for an arbitrary test item is set by selecting at least one of the power pattern segments and combining the selected at least one power pattern segment.

In the present invention, the processor sets at least one input target signal and a check target signal according to a user input received through the input interface, inputs the set at least one input target signal to the target device, and It is characterized by performing a test on an arbitrary test item by detecting at least one set confirmation target signal from the target device.

In the present invention, the processor sets a suitability criterion for the confirmation target signal according to a user input input through the input interface, and compares the detected confirmation target signal with the set suitability criteria to determine the confirmation target signal. It is characterized by determining whether the signal is suitable or not.

A power fluctuation test method according to an aspect of the present invention includes the steps of a processor setting a power pattern for each test item according to a user input through an input interface; performing a test for each test item, by the processor, while applying power to the target device according to a power pattern set for each test item through a power supply device; and storing and outputting, by the processor, a result of performing a test for each test item.

According to one aspect of the present invention, the present invention can quickly and easily perform a test to check the performance of a device according to power fluctuations.

According to one aspect of the present invention, the reliability of the test can be improved by automating the test to check the performance of the device according to power fluctuations.

Meanwhile, the effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description below.

1 is a configuration diagram showing a power fluctuation test device according to an embodiment of the present invention.
Figure 2 is an exemplary diagram showing a power fluctuation test device according to an embodiment of the present invention.
Figure 3 is a flowchart showing a power fluctuation test method according to an embodiment of the present invention.
4 to 8 are exemplary diagrams showing a user interface according to an embodiment of the present invention.

Hereinafter, a power fluctuation testing device and method according to an embodiment of the present invention will be described in detail with reference to the attached drawings. In this process, the thickness of lines or sizes of components shown in the drawing may be exaggerated for clarity and convenience of explanation. In addition, the terms described below are terms defined in consideration of functions in the present invention, and may vary depending on the intention or custom of the user or operator. Therefore, definitions of these terms should be made based on the content throughout this specification.

Figure 1 is a configuration diagram showing a power fluctuation test device according to an embodiment of the present invention, and Figure 2 is an exemplary diagram showing a power fluctuation test device according to an embodiment of the present invention.

Referring to Figures 1 and 2, the power fluctuation test device according to an embodiment of the present invention includes a main body 10, a rack 20, a connector 30, a power supply device 40, an input interface 50, It may include an output interface 60, memory 70, and processor 80. The power fluctuation test device according to an embodiment of the present invention may further include various components in addition to the components shown in FIG. 1, or some of the above components may be omitted.

The main body 10 provides space for housing a rack 20, a connector 30, a power supply 40, an input interface 50, an output interface 60, a memory 70, and a processor 80. can do.

The rack 20 may provide a space where the target device is stored. Here, the target device is a device under test (DUT), which may refer to an object whose performance is to be checked according to power fluctuations. For example, the target device may be a junction box.

Input terminals of the target device and output terminals of the target device may be connected to the connector 30. That is, the target device and the power fluctuation test device according to the present embodiment are electrically connected through the connector 30, so that an input channel, an output channel, and a communication channel are formed between the target device and the power fluctuation test device according to the present embodiment. You can.

The power supply 40 may apply power having a specific pattern to the target device under the control of the processor 80, which will be described later. According to one embodiment, the power supply device 40 may include first to third power supply devices. The first power supply device may be a power supply device for applying a constant voltage. The second and third power supply devices may be power supply devices for applying a voltage waveform. As such, this embodiment can supply various types of power using the first to third power supply devices. Additionally, this embodiment can simultaneously apply a plurality of voltages to the target device using the first to third power supply devices.

The input interface 50 may receive user input from the outside (eg, a user). According to one embodiment, the input interface 50 may include an input device such as a keyboard or mouse, and may receive various information required in the process of testing the performance of the target device according to power fluctuations.

The output interface 60 can output information to the outside. According to one embodiment, the output interface 60 may include an output device such as a display or LED, and may output various information calculated in the process of testing the performance of the target device according to power fluctuations. According to one embodiment, the output interface 60 may output the results of monitoring the output channel, input channel, and communication channel of the target device to the user. According to one embodiment, the output interface 60 is an output channel (e.g., power output channel, IPS output channel, signal output channel, PWM channel, ANALOG output channel, etc.), input channel, and communication channel (e.g., CAN) of the target device. , LIN, Ethernet, etc.), and can output signals (e.g., HIGH signal, LOW signal, etc.) corresponding to the status of the channel through the plurality of LEDs.

The memory 70 may store various information required during the operation of the processor 80. Additionally, the memory 70 may store various information calculated during the operation of the processor 80.

Processor 80 may be operatively connected to a connector, power supply 40, input interface 50, output interface 60, and memory 70. The processor 80 may be implemented as a central processing unit (CPU), a micro controller unit (MCU), or a system on chip (SoC), and may run an operating system or application to run a plurality of devices connected to the processor 80. It can control hardware or software components, perform various data processing and calculations, execute at least one command stored in the memory 70, and store the execution result data in the memory 70. You can.

The processor 80 sets a power pattern for each test item according to the user input received through the input interface 50, and applies power to the target device through the power supply 40 according to the power pattern set for each test item. You can perform tests for each test item and save and output the results of the test for each test item.

Figure 3 is a flowchart showing a power fluctuation testing method according to an embodiment of the present invention, and Figures 4 to 8 are exemplary diagrams showing a user interface according to an embodiment of the present invention. Hereinafter, a power fluctuation test method according to an embodiment of the present invention will be described with reference to FIGS. 3 to 8. Meanwhile, some of the processes described later may be performed in an order different from the order described later or may be omitted.

First, the processor 80 may set a power pattern for each test item according to the first and second user inputs received through the input interface 50 (S301). According to one embodiment, the processor 80 generates at least one power pattern segment according to the first user input received through the input interface 50 and stores it in the memory 70, and the input interface 50 ), select at least one of the at least one power pattern segment stored in the memory 70 according to the second user input received through, and combine the selected at least one power pattern segment to create a power pattern for any test item. You can set it.

Here, the first user input is information input from the user to generate a power pattern, and may include information about the voltage waveform over time. The power pattern may be composed of a combination of power pattern segments. The power pattern segment may be a regular waveform such as SIGN, SQUARE, TRIANGLE, RAMP, EXPO, etc., or it may be an irregular waveform created by the user. The second user input is information input from the user to generate a power pattern from power pattern segments, and may include information about a combination of power pattern segments for each test item. The processor 80 may repeatedly perform the process of generating a power pattern by combining power pattern segments selected according to the second user input for each test item.

This embodiment may provide a user interface, as shown in FIG. 4, so that a user can create a power pattern. Users can edit or create arbitrary power patterns through the user interface. Through the user interface, users can load power pattern segments that have already been created from outside, create new power patterns by combining various types of power pattern segments, check power patterns created in real time, and configure power pattern segments. You can also check the list of power pattern segments.

Meanwhile, in the above-described embodiment, it is described that the power pattern is set based on user input, but the power pattern of the actual battery can be input from the outside, and the input power pattern can be used to test the target device.

Next, the processor 80 may set at least one input target signal for each test item according to the third user input received through the input interface 50 (S303). Here, the third user input is information input from the user to set the input target signal, and may include information about the signal that must be input to the target device to perform the test (i.e., input target signal). The processor 80 may repeatedly perform the process of setting at least one input target signal according to the third user input for each test item. The input target signal may be a digital signal or an analog signal. Additionally, the input target signal may be a communication message (e.g. CAN, LIN, Ethernet signal). Various types of signals for controlling the target device may correspond to the input target signal. Meanwhile, at this stage, the processor 80 can set an input channel or communication channel to be used for inputting the input target signal.

Subsequently, the processor 80 may set at least one confirmation target signal for each test item according to the fourth user input received through the input interface 50 (S305). Here, the fourth user input is information input from the user to set the signal to be confirmed, and may include information about the signal to be confirmed from the target device through a test (i.e., signal to be confirmed). The processor 80 may repeatedly perform the process of setting at least one signal to be confirmed according to the fourth user input for each test item. The signal to be confirmed may be a digital signal or an analog signal. Additionally, the signal to be checked may be a communication message (e.g. CAN, LIN, Ethernet signal). Various types of signals output from the target device may correspond to signals to be confirmed. Meanwhile, at this stage, the processor 80 can set an output channel or communication channel to be used to output the signal to be confirmed.

Next, the processor 80 may set a suitability criterion for the signal to be confirmed for each test item according to the fifth user input received through the input interface 50 (S307). Here, the fifth user input is information input from the user to set the suitability judgment criteria, and includes information on the criteria for determining whether the signal to be confirmed output from the target device is suitable (whether it meets the design specifications). It can be included. The processor 80 may repeatedly perform the process of setting compliance criteria for each signal to be confirmed according to the fifth user input for each test item.

This embodiment may provide a user interface, as shown in FIG. 5, so that the user can set input target signals, confirmation target signals, and suitability criteria for each test item. The user can set the input target signal, confirmation target signal, and suitability criteria for each test item through the user interface.

Next, the processor 80 can perform tests for each test item (S309). According to one embodiment, the processor 80 applies a set power pattern to the target device, inputs at least one set input target signal to the target device, detects at least one set check target signal from the target device, and detects Tests for arbitrary test items can be performed by comparing each of at least one target signal to be confirmed with a set compliance criterion to determine whether each target signal is suitable. That is, the processor 80 applies the power pattern to the target device according to the settings, inputs the input target signal to the target device according to the settings, and the check target signal of the target device generated according to the input of the input target signal is Testing for each test item can be performed by checking whether it satisfies preset standards.

This embodiment may provide a user interface, as shown in FIG. 6, so that the user can check the test progress in real time. Through the user interface, users can check the progress status of the test (progress status, progress time, number of inspection items, etc.), test progress results, output of signals to be confirmed, etc. for each test item.

Subsequently, the processor 80 may store and output the results of testing for each test item (S311). That is, the processor 80 can output the output result of the signal to be confirmed for each test item, the result of the suitability decision for the signal to be confirmed, the time required to perform the test, etc. through the output interface 60 so that the user can check it. Additionally, the processor 80 may organize and store the test results for each test item in the form of an electronic document.

This embodiment may provide a user interface, as shown in FIG. 7, so that the user can check the results of testing for each test item. Users can check the results of the test by test item through the user interface.

Meanwhile, before step S309, a manual test process may be performed to check the status of the target device. Since the purpose of the present invention is to check the performance of the target device according to power fluctuations, it must be assumed that the target device operates normally when stable power is supplied to the target device. Therefore, before performing the test, it is necessary to check whether the target device operates normally in a situation where a stable power source is applied to the target device. The processor 80 performs a process of comparing the signal to be confirmed (i.e., the output of the target device) with the corresponding suitability criterion in a situation where stable power is supplied through manual testing for each signal to be confirmed, so that each signal to be confirmed is By checking whether the output is normal, you can check whether the target device is operating normally in a situation where stable power is supplied to the target device.

This embodiment may provide a user interface, as shown in FIG. 8, so that the user can check the manual testing process. Users can check the manual testing process through the user interface. Additionally, the user can directly check the output of the target device according to arbitrary power application through the user interface.

As described above, the power fluctuation testing apparatus and method according to an embodiment of the present invention can quickly and easily perform a test to check the performance of the device according to the power fluctuation. Additionally, the power fluctuation testing device and method according to an embodiment of the invention can improve test reliability by automating tests to check device performance according to power fluctuations.

Implementations described herein may be implemented, for example, as a method or process, device, software program, data stream, or signal. Although discussed only in the context of a single form of implementation (eg, only as a method), implementations of the features discussed may also be implemented in other forms (eg, devices or programs). The device may be implemented with appropriate hardware, software, firmware, etc. The method may be implemented in a device such as a processor, which generally refers to a processing device that includes a computer, microprocessor, integrated circuit, or programmable logic device. Processors also include communication devices such as computers, cell phones, portable/personal digital assistants (“PDAs”) and other devices that facilitate communication of information between end-users.

The present invention has been described with reference to the embodiments shown in the drawings, but these are merely illustrative, and those skilled in the art will recognize that various modifications and other equivalent embodiments can be made therefrom. You will understand. Therefore, the true technical protection scope of the present invention should be determined by the scope of the patent claims below.

10: main body 20: rack
30: Connector 40: Power supply device
50: input interface 60: output interface
70: Memory 80: Processor

Claims (8)

input interface;
power supply; and
Set a power pattern for each test item according to the user input received through the input interface, and perform a test for each test item while applying power to the target device according to the power pattern set for each test item through the power supply device. , a processor that stores and outputs the results of testing for each test item;
A power fluctuation test device comprising:
According to clause 1,
The processor generates and stores at least one power pattern segment according to a first user input received through the input interface, and generates and stores the stored at least one power pattern segment according to a second user input received through the input interface. A power fluctuation test device that sets a power pattern for an arbitrary test item by selecting at least one of the selected power pattern segments and combining the selected at least one power pattern segment.
According to clause 1,
The processor sets at least one input target signal and a confirmation target signal according to a user input received through the input interface, inputs the set at least one input target signal to the target device, and sets the at least one input target signal to the target device. A power fluctuation test device characterized in that it performs a test on an arbitrary test item by detecting a signal to be confirmed from the target device.
According to clause 3,
The processor sets a suitability criterion for the signal to be confirmed according to the user input input through the input interface, and compares the detected signal to be confirmed with the set criterion to determine whether the signal to be confirmed is suitable. A power fluctuation test device characterized in that it determines.
Setting, by the processor, a power pattern for each test item according to a user input input through an input interface;
performing a test for each test item, by the processor, while applying power to the target device according to a power pattern set for each test item through a power supply device; and
storing and outputting, by the processor, results of testing for each test item;
A power fluctuation test method comprising:
According to clause 5,
The setting step is,
generating and storing, by the processor, at least one power pattern segment according to a first user input received through the input interface;
selecting, by the processor, at least one of the stored power patterns according to a second user input through the input interface; and
combining, by the processor, the selected at least one power pattern segment;
A power fluctuation test method comprising:
According to clause 5,
The steps performed above are:
setting, by the processor, at least one input target signal and a confirmation target signal according to a user input received through the input interface;
inputting, by the processor, the set at least one input target signal to the target device; and
detecting, by the processor, the set at least one confirmation target signal from the target device;
A power fluctuation test method comprising:
According to clause 7,
The steps performed above are:
setting, by the processor, a suitability criterion for the signal to be confirmed according to a user input input through the input interface; and
Comparing, by the processor, the detected signal to be confirmed with the set compliance criterion to determine whether the signal to be confirmed is suitable;
A power fluctuation test method further comprising:

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