CN217213018U - Aging detection circuit and aging detection device for DTM board - Google Patents
Aging detection circuit and aging detection device for DTM board Download PDFInfo
- Publication number
- CN217213018U CN217213018U CN202123442889.3U CN202123442889U CN217213018U CN 217213018 U CN217213018 U CN 217213018U CN 202123442889 U CN202123442889 U CN 202123442889U CN 217213018 U CN217213018 U CN 217213018U
- Authority
- CN
- China
- Prior art keywords
- board
- dtm
- interface
- dut
- dio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The utility model provides a DTM board aging detection circuit and a DTM board aging detection device, wherein the DTM board of the DTM board aging detection circuit is respectively connected with a load circuit and a signal detection circuit; a switch board of the DTM board is respectively connected with a DUT interface and a DIO interface, a load circuit is connected with the DUT interface, and the DIO interface is connected with a signal detection circuit; the DTM board receives a DUT aging detection instruction transmitted by the upper computer, outputs an electrical signal to the load circuit, and transmits a DUT output signal detected by the switch board to the upper computer; or the DTM board receives a DIO aging detection instruction transmitted by the upper computer, outputs an electric signal to the signal detection circuit and transmits a DIO output signal detected by the switch board to the upper computer. The utility model discloses can carry out DUT aging testing, DIO aging testing to the DTM board respectively, realize the aging testing to the DTM board fast, the test is simple, with low costs, is convenient for reject the poor stability's DTM board, has improved the accuracy of test result.
Description
Technical Field
The utility model relates to a DTM board test field especially relates to an ageing detection circuitry of DTM board and ageing detection device of DTM board.
Background
After the electronic equipment is assembled, the electronic equipment needs to be subjected to full-function testing to determine whether the electronic equipment is a good product, when the electronic equipment is tested, the electronic equipment is often connected with a DTM (function test board), and a test signal is input into the electronic equipment through the DTM to detect conditions of open circuits, short circuits, incorrectly contacted parts and the like possibly existing in the electronic equipment and perform performance testing, so that the identification of the good product or the defective product is quickly realized.
In order to ensure the accuracy of the test result, a corresponding performance test needs to be performed on the DTM board, however, in the prior art, the performance test does not include an aging test on the DTM board, so that the problem that the stability of the DTM board is poor due to aging is not considered, and the accuracy of the test result is affected.
SUMMERY OF THE UTILITY MODEL
In order to overcome prior art's not enough, the utility model provides a DTM board aging detection circuit and DTM board aging detection device, the DUT interface with the DTM board, the DIO interface respectively with load circuit, signal detection circuit connection, after to the aging detection instruction of receiving the host computer, correspond input aging detection signal to load circuit or signal detection circuit, detect the DUT interface through the switch board, the signal of DIO interface output, give the aging detection of host computer in order to realize the DTM board with this signal transmission, can carry out the DUT aging detection to the DTM board respectively, the aging detection of DIO, realize the aging test to the DTM board fast, the test is simple, and is with low costs, be convenient for reject the poor DTM board of stability, the accuracy of test result has been improved.
In order to solve the above problem, the utility model discloses a technical scheme do: the DTM board aging detection circuit includes: the DTM board is respectively connected with the load circuit and the signal detection circuit; the DTM board comprises a switch board, a DUT interface and a DIO interface, the switch board is respectively connected with the DUT interface and the DIO interface, the load circuit is connected with the DUT interface, and the DIO interface is connected with the signal detection circuit; the DTM board receives a DUT aging detection instruction transmitted by an upper computer, outputs an electrical signal to the load circuit and transmits a DUT output signal detected by the switch board to the upper computer; or the DTM board receives a DIO aging detection instruction transmitted by the upper computer, outputs an electric signal to the signal detection circuit and transmits a DIO output signal detected by the switch board to the upper computer.
Further, the DTM board aging detection circuit further comprises a first relay and a second relay, wherein the first relay is respectively connected with the DUT interface and the load circuit, and the second relay is respectively connected with the DIO interface and the signal detection circuit.
Further, the DTM board further comprises a switching interface, the switching interface is connected with the first relay and the second relay, and the DTM board outputs signals for switching the first relay and the second relay through the switching interface.
Further, the DUT interface is a 34pin horn interface, and the DIO interface is a 37pin DP interface.
Further, the DTM board also comprises a USB interface, and the DTM board is connected with the upper computer through the USB interface.
Based on the same inventive concept, the utility model also provides a DTM board aging detection device, DTM board aging detection device includes host computer, DTM board aging detection circuit, the host computer with DTM board aging detection circuit is connected for to DTM board aging detection circuit output aging detection instruction and receipt DTM board aging detection circuit feedback's signal, aging detection instruction includes DUT aging detection instruction, DIO aging detection instruction; the DTM board aging detection circuit includes: the DTM board is respectively connected with the load circuit and the signal detection circuit; the DTM board comprises a switch board, a DUT interface and a DIO interface, the switch board is respectively connected with the DUT interface and the DIO interface, the load circuit is connected with the DUT interface, and the DIO interface is connected with the signal detection circuit; the DTM board receives a DUT aging detection instruction transmitted by the upper computer, outputs a DUT aging detection signal to the load circuit, and transmits the DUT output signal detected by the switch board to the upper computer; or the DTM board receives a DIO aging detection instruction transmitted by the upper computer, outputs a DIO aging detection signal to the signal detection circuit, and transmits a DIO output signal detected by the switch board to the upper computer.
Further, the DTM board aging detection circuit further comprises a first relay and a second relay, wherein the first relay is respectively connected with the DUT interface and the load circuit, and the second relay is respectively connected with the DIO interface and the signal detection circuit.
Further, the DTM board further comprises a switching interface, the switching interface is connected with the first relay and the second relay, and the DTM board outputs signals for switching the first relay and the second relay through the switching interface.
Further, the DUT interface is a 34pin horn interface, and the DIO interface is a 37pin DP interface.
Further, the DTM board also comprises a USB interface, and the DTM board is connected with the upper computer through the USB interface.
Compared with the prior art, the beneficial effects of the utility model reside in that: the test method comprises the steps of connecting a DUT interface and a DIO interface of the DTM board with a load circuit and a signal detection circuit respectively, correspondingly inputting aging detection signals to the load circuit or the signal detection circuit after receiving aging detection instructions of an upper computer, detecting the signals output by the DUT interface and the DIO interface through a switch board, transmitting the signals to the upper computer to realize aging detection of the DTM board, carrying out DUT aging detection and DIO aging detection on the DTM board respectively, rapidly realizing aging test on the DTM board, being simple in test and low in cost, facilitating rejection of the DTM board with poor stability, and improving accuracy of test results.
Drawings
FIG. 1 is a diagram of the structure of an embodiment of the DTM board aging detection circuit of the present invention;
FIG. 2 is a diagram illustrating interface definitions of an embodiment of a DUT interface in a DTM board aging detection circuit according to the present invention;
FIG. 3 is an interface definition diagram of an embodiment of a DIO interface in the DTM board aging detection circuit of the present invention;
FIG. 4 is a diagram illustrating an embodiment of the device for detecting aging of a DTM board according to the present invention;
FIG. 5 is a program editing interface diagram of one embodiment of DUT aging tests in the DTM board aging detection apparatus of the present invention;
fig. 6 is a program editing interface diagram of an embodiment of DIO aging testing in the DTM board aging detection apparatus of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and the detailed description, and it should be noted that the embodiments or technical features described below can be arbitrarily combined to form a new embodiment without conflict.
Referring to fig. 1-3, fig. 1 is a structural diagram of an embodiment of the DTM board aging detection circuit of the present invention; FIG. 2 is a diagram illustrating interface definitions of an embodiment of a DUT interface in a DTM board aging detection circuit according to the present invention; fig. 3 is an interface definition diagram of an embodiment of a DIO interface in the DTM board aging detection circuit of the present invention. The aging detection circuit of the DTM board of the present invention is described in detail with reference to fig. 1 to 3.
In this embodiment, the DTM board aging detection circuit includes: the DTM board is respectively connected with the load circuit and the signal detection circuit; the DTM board comprises a switch board, a DUT (device Under test), a device to be tested) interface and a DIO (digital load) interface, the switch board is respectively connected with the DUT interface and the DIO interface, the load circuit is connected with the DUT interface, and the DIO interface is connected with the signal detection circuit; the DTM board receives a DUT aging detection instruction transmitted by the upper computer, outputs an electrical signal to the load circuit, and transmits a DUT output signal detected by the switch board to the upper computer; or the DTM board receives a DIO aging detection instruction transmitted by the upper computer, outputs an electric signal to the signal detection circuit and transmits a DIO output signal detected by the switch board to the upper computer. The DUT interface is also connected with the DUT circuit, and the DIO interface is also connected with the DIO circuit.
The switch board detects voltage and current at two ends of the load circuit or the signal detection circuit to obtain output signals of the DUT interface and the DIO interface, and the upper computer respectively realizes aging test of the DUT circuit and the DIO circuit by using the output signals. The DUT POWER supply is burn-in tested by supplying POWER to the load circuit.
In a specific embodiment, the switch board is a 64pin horn interface, the DIO interface is a 34pin horn interface, and the DUT interface is a 37pin DP interface.
In this embodiment, the DTM board aging detection circuit further includes a first relay and a second relay, the first relay is respectively connected to the DUT interface and the load circuit, and the second relay is respectively connected to the DIO interface and the signal detection circuit. The first relay and the second relay respectively control the on-off of the current in the load circuit and the signal detection circuit.
In this embodiment, in order to implement switching between the DUT burn-in test and the DIO burn-in test, the DTM board further includes a switching interface, the switching interface is connected to the first relay and the second relay, and the DTM board outputs a signal for switching between the first relay and the second relay through the switching interface.
In a specific embodiment, the switching interface is a General-purpose input/output (GPIO) interface, and the interface has a 20pin connection port, and the GPIO interface inputs electrical signals to the first relay and the second relay to control the switching operation of the first relay and the second relay.
In this embodiment, the DTM board further includes a USB interface, and the DTM board is connected to the upper computer through the USB interface.
Wherein, the USB interface can be any one of Type-A interface, Type-B interface, TYPE Micro-B interface, Type-C interface.
In other embodiments, the DTM board CAN also be connected with the upper computer through an RS-485 interface, a CAN interface and other bus interfaces.
In this embodiment, the upper computer is a computer, and the computer sends an aging test instruction to the DTM board according to the programmed program to control the DTM board to perform an aging test. In other embodiments, the upper computer may also be a mobile phone, a server, a tablet computer, an electronic device testing tool, or other devices that can be used to receive test data of the DTM board and calculate stability of the DTM board according to the data.
In a specific embodiment, the upper computer is connected with a DTM board through USB communication, the DTM board is provided with a 34pin ox horn interface DIO interface and a 37pin DP interface DUT interface, the 37pin DP interface is connected with the DUT circuit and is externally connected with the DUT load circuit, and the voltage and the current of the load circuit are measured through the output voltage of the DTM board, so that the DUT POWER POWER supply is subjected to aging test. The switch board is used for measuring DUT output voltage and DIO signal voltage, and 34pin ox horn interface is connected with the DIO circuit to external signal detection circuit measures the output level of DIO interface through the switch board.
Has the advantages that: the utility model discloses a DTM board ageing detection circuitry is with the DUT interface of DTM board, the DIO interface respectively with load circuit, signal detection circuit connects, after receiving the ageing detection instruction of host computer, correspond the ageing detection signal of input to load circuit or signal detection circuit, detect the DUT interface through the switch board, the signal of DIO interface output, give the ageing detection of host computer in order to realize the DTM board with this signal transmission, can carry out the DUT ageing detection to the DTM board respectively, the DIO ageing detection, realize the ageing test to the DTM board fast, the test is simple, and is low in cost, be convenient for reject the poor DTM board of stability, the accuracy of test result has been improved.
Based on the same inventive concept, the present invention further provides a DTM board aging detection apparatus, please refer to fig. 4-6, fig. 4 is a structural diagram of an embodiment of the DTM board aging detection apparatus of the present invention; FIG. 5 is a program editing interface diagram of one embodiment of DUT aging tests in the DTM board aging detection apparatus of the present invention; fig. 6 is a program editing interface diagram of an embodiment of DIO aging test in the DTM board aging detection apparatus of the present invention, and is described with reference to fig. 4-6 for the DTM board aging detection apparatus of the present invention.
In this embodiment, the DTM board aging detection apparatus includes an upper computer and a DTM board aging detection circuit, the upper computer is connected to the DTM board aging detection circuit and is configured to output an aging detection instruction to the DTM board aging detection circuit and receive a signal fed back by the DTM board aging detection circuit, the aging detection instruction includes a DUT aging detection instruction and a DIO aging detection instruction; the DTM board aging detection circuit includes: the DTM board is connected with the load circuit and the signal detection circuit respectively; the DTM board comprises a switch board, a DUT interface and a DIO interface, the switch board is respectively connected with the DUT interface and the DIO interface, the load circuit is connected with the DUT interface, and the DIO interface is connected with the signal detection circuit; the DTM board receives a DUT aging detection instruction transmitted by the upper computer, outputs a DUT aging detection signal to the load circuit, and transmits the DUT output signal detected by the switch board to the upper computer; or the DTM board receives a DIO aging detection instruction transmitted by the upper computer, outputs a DIO aging detection signal to the signal detection circuit, and transmits a DIO output signal detected by the switch board to the upper computer.
The switch board detects voltage and current at two ends of the load circuit or the signal detection circuit to obtain output signals of the DUT interface and the DIO interface, and the upper computer respectively realizes aging test of the DUT circuit and the DIO circuit by using the output signals. The DUT POWER supply is burn-in tested by supplying POWER to the load circuit.
In a specific embodiment, the switch board is a 64pin horn interface, the DUT interface is a 34pin horn interface, and the DIO interface is a 37pin DP interface.
In this embodiment, the DTM board aging detection circuit further includes a first relay and a second relay, the first relay is respectively connected to the DUT interface and the load circuit, and the second relay is respectively connected to the DIO interface and the signal detection circuit. The first relay and the second relay respectively control the on-off of the current in the load circuit and the signal detection circuit.
In this embodiment, in order to implement switching between the DUT burn-in test and the DIO burn-in test, the DTM board further includes a switching interface, the switching interface is connected to the first relay and the second relay, and the DTM board outputs a signal for switching between the first relay and the second relay through the switching interface.
In a specific embodiment, the switching interface is a General-purpose input/output (GPIO) interface, and the interface has a 20pin connection port, and the GPIO interface inputs electrical signals to the first relay and the second relay to control the switching operation of the first relay and the second relay.
In this embodiment, the DTM board further includes a USB interface, and the DTM board is connected to the upper computer through the USB interface.
Wherein, the USB interface can be any one of Type-A interface, Type-B interface, TYPE Micro-B interface, Type-C interface.
In other embodiments, the DTM board CAN also be connected with the upper computer through an RS-485 interface, a CAN interface and other bus interfaces.
In this embodiment, the upper computer is a computer, and the computer sends an aging test instruction to the DTM board according to the programmed program to control the DTM board to perform an aging test. In other embodiments, the upper computer may also be a mobile phone, a server, a tablet computer, an electronic device testing tool, or other devices capable of receiving test data of the DTM board and calculating stability of the DTM board according to the data.
In a specific embodiment, the upper computer is connected with a DTM board through USB communication, the DTM board is provided with a 34pin ox horn interface DIO interface and a 37pin DP interface DUT interface, the 37pin DP interface is connected with the DUT circuit and is externally connected with the DUT load circuit, and the voltage and the current of the load circuit are measured through the output voltage of the DTM board, so that the DUT POWER POWER supply is subjected to aging test. The switch board is used for measuring DUT output voltage and DIO signal voltage, and 34pin ox horn interface is connected with the DIO circuit to external signal detection circuit measures the output level of DIO interface through the switch board.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A DTM board degradation detection circuit, comprising: the DTM board is respectively connected with the load circuit and the signal detection circuit;
the DTM board comprises a switch board, a DUT interface and a DIO interface, the switch board is respectively connected with the DUT interface and the DIO interface, the load circuit is connected with the DUT interface, and the DIO interface is connected with the signal detection circuit;
the DTM board receives a DUT aging detection instruction transmitted by an upper computer, outputs an electric signal to the load circuit and transmits a DUT output signal detected by the switch board to the upper computer;
or the DTM board receives a DIO aging detection instruction transmitted by the upper computer, outputs an electric signal to the signal detection circuit, and transmits a DIO output signal detected by the switch board to the upper computer.
2. The DTM board degradation detection circuit of claim 1, wherein the DTM board degradation detection circuit further comprises a first relay and a second relay, the first relay is connected to the DUT interface and the load circuit, respectively, and the second relay is connected to the DIO interface and the signal detection circuit, respectively.
3. The DTM board degradation detection circuit of claim 2, wherein the DTM board further comprises a switching interface, and wherein the DTM board outputs a signal through the switching interface to switch the first relay and the second relay.
4. The DTM board degradation detection circuit of claim 1, wherein the DIO interface is a 34pin ox horn interface and the DUT interface is a 37pin DP interface.
5. The DTM board aging detection circuit of claim 1, wherein the DTM board further comprises a USB interface, and wherein the DTM board is connected to the upper computer through the USB interface.
6. The DTM board aging detection device is characterized by comprising an upper computer and a DTM board aging detection circuit, wherein the upper computer is connected with the DTM board aging detection circuit and is used for outputting an aging detection instruction to the DTM board aging detection circuit and receiving a signal fed back by the DTM board aging detection circuit, and the aging detection instruction comprises a DUT aging detection instruction and a DIO aging detection instruction;
the DTM board aging detection circuit includes: the DTM board is respectively connected with the load circuit and the signal detection circuit;
the DTM board comprises a switch board, a DUT interface and a DIO interface, the switch board is respectively connected with the DUT interface and the DIO interface, the load circuit is connected with the DUT interface, and the DIO interface is connected with the signal detection circuit;
the DTM board receives a DUT aging detection instruction transmitted by the upper computer, outputs a DUT aging detection signal to the load circuit, and transmits the DUT output signal detected by the switch board to the upper computer;
or the DTM board receives a DIO aging detection instruction transmitted by the upper computer, outputs a DIO aging detection signal to the signal detection circuit, and transmits a DIO output signal detected by the switch board to the upper computer.
7. The DTM board degradation detection apparatus of claim 6, wherein the DTM board degradation detection circuit further comprises a first relay and a second relay, the first relay is connected to the DUT interface and the load circuit, respectively, and the second relay is connected to the DIO interface and the signal detection circuit, respectively.
8. The DTM board degradation detection apparatus of claim 7, wherein the DTM board further comprises a switching interface, and the DTM board outputs a signal for switching the first relay and the second relay through the switching interface.
9. The DTM board degradation detection apparatus of claim 6, wherein the DUT interface is a 34pin horn interface and the DIO interface is a 37pin DP interface.
10. The DTM board degradation detection device of claim 6, wherein the DTM board further comprises a USB interface, and the DTM board is connected to the upper computer through the USB interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123442889.3U CN217213018U (en) | 2021-12-30 | 2021-12-30 | Aging detection circuit and aging detection device for DTM board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123442889.3U CN217213018U (en) | 2021-12-30 | 2021-12-30 | Aging detection circuit and aging detection device for DTM board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217213018U true CN217213018U (en) | 2022-08-16 |
Family
ID=82788408
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202123442889.3U Active CN217213018U (en) | 2021-12-30 | 2021-12-30 | Aging detection circuit and aging detection device for DTM board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217213018U (en) |
-
2021
- 2021-12-30 CN CN202123442889.3U patent/CN217213018U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7609081B2 (en) | Testing system and method for testing an electronic device | |
| CN100409020C (en) | Time-domain reflectometer for connecting network cable at test end | |
| US20130108065A1 (en) | Methods for invoking testing using reversible connectors | |
| CN103198033A (en) | Apparatus and method of identifying a USB or an MHL device | |
| CN108572310B (en) | Circuit testing method | |
| TW201350877A (en) | Auxiliary test circuit and chip and circuit board using the same | |
| CN105738797A (en) | Mainboard testing assembly and testing method | |
| CN207396620U (en) | Have both the tester of fast charge test and voltage conversion | |
| CN111239617A (en) | Control method and device for charge and discharge test, storage medium and system | |
| TWI662821B (en) | System and method for testing a radio frequency transceiver by controlling test flow via an induced interrupt | |
| CN104569673B (en) | Test circuit, method and apparatus | |
| CN105846263A (en) | USB adapter cable, charging testing method and charging testing system of mobile terminal | |
| CN217213018U (en) | Aging detection circuit and aging detection device for DTM board | |
| CN217385736U (en) | MCU's ATE equipment and system thereof | |
| CN217561648U (en) | Testing device and system | |
| CN213581207U (en) | Automatic testing machine with signal processing function | |
| CN113009223B (en) | Impedance measuring method | |
| CN204439793U (en) | Radio-frequency (RF) switch proving installation | |
| CN104969568A (en) | Circuit, terminal and earphone for detecting the key movements of the headset | |
| CN210376638U (en) | Device for testing electrical parameters of power supply of CIR equipment module | |
| CN113281639A (en) | Board card testing device, system and method | |
| KR100448840B1 (en) | Apparatus for Measuring Multi-Channel Impedance for Use in Testing Secondary Battery | |
| CN100485631C (en) | Motherboard function test board | |
| CN218633960U (en) | WiFi module test system and device | |
| CN108693435B (en) | Testing device and method for universal serial bus C-type adapter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |