CN114356683A - Coverage rate fusion method and device, computer equipment and storage medium - Google Patents

Coverage rate fusion method and device, computer equipment and storage medium Download PDF

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CN114356683A
CN114356683A CN202111643969.7A CN202111643969A CN114356683A CN 114356683 A CN114356683 A CN 114356683A CN 202111643969 A CN202111643969 A CN 202111643969A CN 114356683 A CN114356683 A CN 114356683A
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coverage rate
fusion
report
coverage
reports
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索健
王正
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Beijing Aixin Technology Co ltd
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Beijing Aixin Technology Co ltd
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Abstract

The embodiment of the application discloses a coverage fusion method and device, computer equipment and a storage medium. The method comprises the following steps: generating test cases of each module in the chip to be tested based on a target verification plan of the chip to be tested, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases; carrying out test simulation processing according to each test case to obtain a plurality of test data; inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, wherein the coverage rate reports are stored in different paths and comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports; and carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report. According to the embodiment of the application, the low-power-consumption coverage rate measuring report and the non-low-power-consumption coverage rate measuring report can be fused together through the fusion tool, and the obtained target coverage rate report can reflect the complete full-chip coverage rate condition.

Description

Coverage rate fusion method and device, computer equipment and storage medium
Technical Field
The present application relates to the field of chip verification technologies, and in particular, to a coverage fusion method and apparatus, a computer device, and a storage medium.
Background
With the rapid development of semiconductor technology and the improvement of chip operating frequency, the power consumption of the chip increases rapidly, and the increase of the power consumption will lead to the increase of the heat productivity of the chip and the reduction of the reliability. Therefore, power consumption has become an important consideration in integrated circuit design. In order to make the product more competitive, the requirements for chip design have been shifted from the pure pursuit of high performance and small area to the comprehensive requirements for performance, area and power consumption.
Chip design usually includes chip verification, which is to verify whether the designed logic code meets the expected requirements and meets the originally defined specifications.
The chip comprises a plurality of modules, and when the chip is verified, the chip comprises a low-power consumption test case and a non-low-power consumption test case, and the industry generally does not consider that the low-power consumption coverage rate is fused to a report of the non-low-power consumption coverage rate, so that the obtained coverage rate report cannot reflect the complete full-chip coverage rate.
Disclosure of Invention
The embodiment of the application provides a coverage fusion method, a coverage fusion device, computer equipment and a storage medium, and a coverage report which can reflect the complete full-chip coverage condition can be obtained.
In a first aspect, an embodiment of the present application provides a coverage fusion method, which includes: generating test cases of each module in a chip to be tested based on a target verification plan of the chip to be tested, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases;
carrying out test simulation processing according to each test case to obtain a plurality of test data;
inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, wherein the coverage rate reports are stored in different paths and comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports;
and carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report.
In a second aspect, an embodiment of the present application further provides a coverage fusion apparatus, which includes:
the system comprises a generating unit, a verification unit and a verification unit, wherein the generating unit is used for generating test cases of all modules in a chip to be tested based on a target verification plan of the chip to be tested, and the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases;
the simulation unit is used for carrying out test simulation processing according to each test case to obtain a plurality of test data;
the input unit is used for inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, the coverage rate reports are stored in different paths, and the coverage rate reports comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports;
and the fusion unit is used for carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report.
In a third aspect, an embodiment of the present application further provides a computer device, which includes a memory and a processor, where the memory stores a computer program, and the processor implements the above method when executing the computer program.
In a fourth aspect, the present application also provides a computer-readable storage medium, in which a computer program is stored, the computer program including program instructions, which when executed by a processor, implement the above method.
The embodiment of the application provides a coverage fusion method and device, computer equipment and a storage medium. Wherein the method comprises the following steps: generating test cases of each module in a chip to be tested based on a target verification plan of the chip to be tested, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases; carrying out test simulation processing according to each test case to obtain a plurality of test data; inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, wherein the coverage rate reports are stored in different paths and comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports; and carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report. According to the embodiment of the application, the low-power-consumption coverage rate measuring report and the non-low-power-consumption coverage rate measuring report can be fused together through the fusion tool, and the obtained target coverage rate report can reflect the complete full-chip coverage rate condition.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a coverage fusion method provided in an embodiment of the present application;
fig. 2 is a schematic view of a simulation scenario provided in an embodiment of the present application;
fig. 3 is a schematic sub-flow chart of a coverage fusion method provided in the embodiment of the present application;
fig. 4 is a schematic flowchart of a coverage fusion method according to another embodiment of the present application;
FIG. 5 is a schematic block diagram of a coverage fusion apparatus provided in an embodiment of the present application;
FIG. 6 is a schematic block diagram of a coverage fusion apparatus according to another embodiment of the present application;
fig. 7 is a schematic block diagram of a computer device provided in an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification of the present application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
The embodiment of the application provides a coverage fusion method and device, computer equipment and a storage medium.
The execution main body of the coverage rate fusion method may be the coverage rate fusion device provided in the embodiment of the present application, or a computer device integrated with the coverage rate fusion device, where the coverage rate fusion device may be implemented in a hardware or software manner, the computer device may be a terminal or a server, and the terminal may be a smart phone, a tablet computer, a palm computer, or a notebook computer.
The coverage rate fusion method provided by the application needs to fuse the coverage rate reports of each module together, and one important reason for fusing the coverage rate reports of each module together is that the test case of the module not only covers the module itself, but also covers a common logic circuit, such as a general register at the top layer of a System On Chip (SOC), power consumption management, a bus path, a port and the like, and possibly also covers a path for accessing a System memory and a Central Processing Unit (CPU). Only the module level test cases of the IP cannot cover these contents, and the IP system level test cases on the SOC are also needed to be covered at the same time. The coverage rate reports of the test cases of all the modules on the SOC are fused together, so that the large and complete full-chip coverage rate condition can be reflected. This patent describes the flow of fusion (merge flow) and provides a debugging method for problems encountered in fusion.
Fig. 1 is a schematic flow chart of a coverage fusion method provided in an embodiment of the present application. As shown in fig. 1, the method includes the following steps S110-140.
S110, generating test cases of all modules in the chip to be tested based on a target verification plan of the chip to be tested, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases.
The target verification plan is a verification plan set by a user, the verification plans are different, created test cases may also be different, and corresponding test cases are created for the conditions of low power consumption and non-low power consumption in the embodiment.
And S120, performing test simulation processing according to each test case to obtain a plurality of test data.
Specifically, simulation test processing is performed on the corresponding module in the chip to be tested according to each test case, and test data in the test process is collected.
And S130, inputting the plurality of test data into a verification platform to obtain a coverage rate report of each module.
After the test data are obtained, inputting the test data into a preset verification platform, and respectively obtaining coverage rate reports of each module, wherein the coverage rate reports are stored in different paths, and the coverage rate reports comprise a low-power-consumption coverage rate report and a non-low-power-consumption coverage rate report.
And S140, carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report.
After all the modules are tested and corresponding coverage rate reports are obtained, the corresponding coverage rate reports are pulled from a plurality of paths storing the coverage rate reports through a fusion tool, and the pulled coverage rate reports are fused to obtain target coverage rate reports.
In addition, the present embodiment provides a debugging method for the problems encountered in the fusion, and the following provides 4 coverage reports of the problems encountered in the fusion and the corresponding debugging method:
problem 1, coverage report corrupted:
in the fusion process, an error report is obtained, whether multiple (such as twice) coverage rate reports run in the same folder is judged through the error report, and if the multiple coverage rate reports run is determined, corresponding parameters in the fusion tool are modified.
Problem 2, when a Unified Power Format (UPF) and a non-UPF are fused, the signal names do not match (UPF is used for low Power verification):
in a multi-power domain chip, there are two similar test cases, a low power test case and a non-low power test case. And in the low-power consumption test case, a UPF file is used in simulation, and the UPF contains information related to electrical management. In coverage fusion, two-part coverage reports need to be fused together.
At this time, when analyzing the error report, it is detected whether the coverage object matches, if not, the tool is used for special command debugging:
for example, using a format text can report the two coverage reports as text where they do not match:
%urg-dir 1.vdb -report BASE -format text
%urg-dir 2.vdb -report INPUT -format text
wherein "BASE" and "INTPUT" are the folder names used to receive the output result, and the obtained result includes modiinfo.
By comparing the BASE signal and the INTPUT signal, different numbers of signals are obtained, different signals are further analyzed, and finally the fusion tool is debugged according to the analysis result.
Problem 3, fuse coverage data of different chips
As shown in FIG. 2, in a simulation, we may need to pass data between instantiations (chips) of two SOCduts. One chip sends and another chip receives. Linking two chips in the following way, the general need to fuse coverage reports of two chips.
Coverage has a mapping option to map two similar duts, the urg command contains parameters to map the command. And debugging the fusion tool through the parameters of the mapping command.
Problem 4, because Register Transfer Level (RTL) mismatch is caused by the' ifdef macro;
as before, a signal mismatch is encountered and a format text is used to find where it differs. The reason for mismatch is found, and when the _ RFTRX macro definition exists, more than 6 signals are included according to the found mismatch reason. In this case, the fusion tool may be debugged using the flex _ mergetoggle process.
For example: referring to fig. 3, in some embodiments, step S140 includes:
and S141, detecting whether an error report occurs in the fusion process of the coverage rate report.
And S142, if an error report occurs in the fusion process of the coverage rate report, debugging the parameters of the fusion tool according to the error report to obtain the debugged fusion tool.
If the error report has a mismatch signal, carrying out format conversion processing on the mismatch signal through a preset format text to obtain a converted signal; analyzing the reasons for mismatching of the converted signals; and debugging the parameters of the fusion tool according to the mismatching reason.
And S143, updating the parameters of the debugged fusion tool by using the verification platform, and fusing the coverage rate reports of the modules by using the debugged fusion tool with the updated parameters to obtain the target coverage rate report.
The specific fusion process is as follows: determining a file structure of the coverage report for each module; and performing fusion processing on the coverage rate report of each module through the fusion tool according to the file structure of the coverage rate report to obtain the target coverage rate report.
Fig. 4 is a schematic flowchart of a coverage fusion method according to another embodiment of the present application. As shown in fig. 4, the coverage fusion method of the present embodiment includes steps S210 to S260. Steps S210 to S240 are similar to steps S110 to S140 in the above embodiments, and are not described herein again. The added steps S250 to S260 in the present embodiment are explained in detail below.
And S250, receiving a coverage rate checking instruction of the chip to be checked.
And when the user needs to check the coverage rate report of the chip to be checked, sending a coverage rate checking instruction to the coverage rate fusion device through the user terminal.
And S260, outputting the target coverage rate report according to the coverage rate viewing instruction.
And after receiving the coverage rate checking instruction, the coverage rate fusion device directly shows the target coverage rate report to the user or sends the target coverage rate report to the corresponding user terminal.
Wherein, when obtaining the coverage rate:
the compile command increments the-cm _ dir and-cm _ name options as follows:
vcs-cm-dir<dir_name>-cm_came<cov_name><other coverage options><other compileoptions>;
the emulation command increments-cm _ name as follows:
Simv-cm_name<cov_name><other coverage options><other simulation options>;
fusion coverage is reported as follows:
urg -dir BASE.vdb INPUT1.vdb INPUT2.vdb-dbname OUTUPT.vdb-report report_files;
open coverage report, two ways:
Verdi-cov-covdir OUTPUT.vdb
Firefox report_files/dashboard.html;
in the embodiment, based on a target verification plan of a chip to be tested, test cases of modules in the chip to be tested are generated, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases; carrying out test simulation processing according to each test case to obtain a plurality of test data; inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, wherein the coverage rate reports are stored in different paths and comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports; and carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report. According to the embodiment of the application, the low-power-consumption coverage rate measuring report and the non-low-power-consumption coverage rate measuring report can be fused together through the fusion tool, and the obtained target coverage rate report can reflect the complete full-chip coverage rate condition.
Fig. 5 is a schematic block diagram of a coverage fusion apparatus provided in an embodiment of the present application. As shown in fig. 5, the present application also provides a coverage fusion apparatus corresponding to the above coverage fusion method. The coverage fusion device comprises a unit for executing the coverage fusion method, and the device can be configured in a desktop computer, a tablet computer, a portable computer, and other terminals. Specifically, referring to fig. 5, the coverage fusion apparatus includes a generation unit 501, a simulation unit 502, an input unit 50, and a fusion unit 504.
The generating unit 501 is configured to generate test cases of each module in a chip to be tested based on a target verification plan of the chip to be tested, where the test cases include a low-power-consumption test case and a non-low-power-consumption test case;
a simulation unit 502, configured to perform test simulation processing according to each test case to obtain multiple test data;
an input unit 503, configured to input a plurality of test data into a verification platform to obtain coverage reports of each module, where the coverage reports are stored in different paths, and the coverage reports include a low-power-consumption coverage report and a non-low-power-consumption coverage report;
and a fusion unit 504, configured to perform fusion processing on the coverage rate report of each module through a preset fusion tool, so as to obtain a target coverage rate report.
In some embodiments, the fusion unit 504 is specifically configured to:
detecting whether an error report occurs in the fusion process of the coverage rate report;
if an error report occurs in the fusion process of the coverage rate report, debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool;
and updating the parameters of the fusion tool by using the verification platform, and fusing the coverage rate reports of the modules by using the fusion tool after updating the parameters after the test to obtain the target coverage rate report.
In some embodiments, when the step of debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool is executed by the fusion unit 504, the step is specifically configured to:
if the error report has a mismatch signal, carrying out format conversion processing on the mismatch signal through a preset format text to obtain a converted signal;
analyzing the reasons for mismatching of the converted signals;
and debugging the parameters of the fusion tool according to the mismatching reason.
In some embodiments, the fusion unit 504 is specifically configured to:
determining a file structure of the coverage report for each module;
and performing fusion processing on the coverage rate report of each module through the fusion tool according to the file structure of the coverage rate report to obtain the target coverage rate report.
Fig. 6 is a schematic block diagram of a coverage fusion apparatus according to another embodiment of the present application. As shown in fig. 6, the coverage fusion apparatus of the present embodiment is the above embodiment, and a receiving unit 505 and an output unit 506 are added.
A receiving unit 505, configured to receive a coverage checking instruction of the chip to be checked;
an output unit 506, configured to output the target coverage report according to the coverage checking instruction.
It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation processes of the coverage rate fusion apparatus and each unit may refer to the corresponding descriptions in the foregoing method embodiments, and for convenience and brevity of description, no further description is provided herein.
The coverage fusion means may be implemented in the form of a computer program that is executable on a computer device as shown in fig. 7.
Referring to fig. 7, fig. 7 is a schematic block diagram of a computer device according to an embodiment of the present application. The computer device 700 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of a plurality of servers.
Referring to fig. 7, the computer device 700 includes a processor 702, memory, and a network interface 705 coupled via a system bus 701, where the memory may include a non-volatile storage medium 703 and an internal memory 704.
The non-volatile storage medium 703 may store an operating system 7031 and a computer program 7032. The computer program 7032 comprises program instructions that, when executed, cause the processor 702 to perform a coverage fusion method.
The processor 702 is configured to provide computing and control capabilities to support the operation of the overall computer device 700.
The internal memory 704 provides an environment for the execution of a computer program 7032 on the non-volatile storage medium 703, which computer program 7032, when executed by the processor 702, causes the processor 702 to perform a coverage fusion method.
The network interface 705 is used for network communication with other devices. Those skilled in the art will appreciate that the architecture shown in fig. 7 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing device 700 to which the disclosed aspects apply, as a particular computing device 700 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
Wherein the processor 702 is configured to run a computer program 7032 stored in the memory to perform the steps of:
generating test cases of each module in a chip to be tested based on a target verification plan of the chip to be tested, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases;
carrying out test simulation processing according to each test case to obtain a plurality of test data;
inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, wherein the coverage rate reports are stored in different paths and comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports;
and carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report.
In some embodiments, when the step of fusing the coverage rate reports of the modules by using a preset fusion tool to obtain a target coverage rate report is implemented by the processor 702, the following steps are specifically implemented:
detecting whether an error report occurs in the fusion process of the coverage rate report;
if an error report occurs in the fusion process of the coverage rate report, debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool;
and updating the parameters of the fusion tool by using the debugged verification platform, and performing fusion processing on the coverage rate report of each module through the fusion tool to obtain the target coverage rate report.
In some embodiments, when the processor 702 implements the step of debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool, the following steps are specifically implemented:
if the error report has a mismatch signal, carrying out format conversion processing on the mismatch signal through a preset format text to obtain a converted signal;
analyzing the reasons for mismatching of the converted signals;
and debugging the parameters of the fusion tool according to the mismatching reason.
In some embodiments, when the step of fusing the coverage rate reports of the modules by using a preset fusion tool to obtain a target coverage rate report is implemented by the processor 702, the following steps are specifically implemented:
determining a file structure of the coverage report for each module;
and performing fusion processing on the coverage rate report of each module through the fusion tool according to the file structure of the coverage rate report to obtain the target coverage rate report.
In some embodiments, after the step of implementing the fusion processing on the coverage reports of the modules by the preset fusion tool to obtain the target coverage report, the processor 702 further implements the following steps:
receiving a coverage rate checking instruction of the chip to be checked;
and outputting the target coverage rate report according to the coverage rate viewing instruction.
It should be understood that, in the embodiment of the present Application, the Processor 702 may be a Central Processing Unit (CPU), and the Processor 702 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.
Accordingly, the present application also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program comprises program instructions. The program instructions, when executed by the processor, cause the processor to perform the steps of:
generating test cases of each module in a chip to be tested based on a target verification plan of the chip to be tested, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases;
carrying out test simulation processing according to each test case to obtain a plurality of test data;
inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, wherein the coverage rate reports are stored in different paths and comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports;
and carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report.
In some embodiments, when the processor executes the program instruction to implement the step of performing fusion processing on the coverage reports of the modules by using a preset fusion tool to obtain a target coverage report, the following steps are specifically implemented:
detecting whether an error report occurs in the fusion process of the coverage rate report;
if an error report occurs in the fusion process of the coverage rate report, debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool;
and updating the parameters of the debugged fusion tool by using the verification platform, and fusing the coverage rate reports of the modules by using the debugged fusion tool with the updated parameters to obtain the target coverage rate report.
In some embodiments, when the processor executes the program instruction to implement the step of debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool, the following steps are specifically implemented:
if the error report has a mismatch signal, carrying out format conversion processing on the mismatch signal through a preset format text to obtain a converted signal;
analyzing the reasons for mismatching of the converted signals;
and debugging the parameters of the fusion tool according to the mismatching reason.
In some embodiments, when the processor executes the program instruction to implement the step of performing fusion processing on the coverage reports of the modules by using a preset fusion tool to obtain a target coverage report, the following steps are specifically implemented:
determining a file structure of the coverage report for each module;
and performing fusion processing on the coverage rate report of each module through the fusion tool according to the file structure of the coverage rate report to obtain the target coverage rate report.
In some embodiments, after the step of executing the program instructions to implement the fusion processing of the coverage reports of the modules by a preset fusion tool to obtain a target coverage report, the processor further implements the following steps:
receiving a coverage rate checking instruction of the chip to be checked;
and outputting the target coverage rate report according to the coverage rate viewing instruction.
The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.
The steps in the method of the embodiment of the application can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the application can be combined, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present application may be substantially or partially implemented in the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application.
While the invention has been described with reference to specific embodiments, the scope of the invention is not limited thereto, and those skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the invention. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A coverage fusion method, comprising:
generating test cases of each module in a chip to be tested based on a target verification plan of the chip to be tested, wherein the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases;
carrying out test simulation processing according to each test case to obtain a plurality of test data;
inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, wherein the coverage rate reports are stored in different paths and comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports;
and carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report.
2. The method according to claim 1, wherein the fusing the coverage reports of the modules by a preset fusing tool to obtain a target coverage report, comprises:
detecting whether an error report occurs in the fusion process of the coverage rate report;
if an error report occurs in the fusion process of the coverage rate report, debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool;
and updating the parameters of the debugged fusion tool by using the verification platform, and fusing the coverage rate reports of the modules by using the debugged fusion tool with the updated parameters to obtain the target coverage rate report.
3. The method according to claim 2, wherein the debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool comprises:
if the error report has a mismatch signal, carrying out format conversion processing on the mismatch signal through a preset format text to obtain a converted signal;
analyzing the reasons for mismatching of the converted signals;
and debugging the parameters of the fusion tool according to the mismatching reason.
4. The method according to claim 1, wherein the fusing the coverage reports of the modules by a preset fusing tool to obtain a target coverage report, comprises:
determining a file structure of the coverage report for each module;
and performing fusion processing on the coverage rate report of each module through the fusion tool according to the file structure of the coverage rate report to obtain the target coverage rate report.
5. The method according to any one of claims 1 to 5, wherein after the fusion processing is performed on the coverage report of each module through a preset fusion tool to obtain a target coverage report, the method further comprises:
receiving a coverage rate checking instruction of the chip to be checked;
and outputting the target coverage rate report according to the coverage rate viewing instruction.
6. A coverage fusion apparatus, comprising:
the system comprises a generating unit, a verification unit and a verification unit, wherein the generating unit is used for generating test cases of all modules in a chip to be tested based on a target verification plan of the chip to be tested, and the test cases comprise low-power-consumption test cases and non-low-power-consumption test cases;
the simulation unit is used for carrying out test simulation processing according to each test case to obtain a plurality of test data;
the input unit is used for inputting a plurality of test data into a verification platform to obtain coverage rate reports of each module, the coverage rate reports are stored in different paths, and the coverage rate reports comprise low-power-consumption coverage rate reports and non-low-power-consumption coverage rate reports;
and the fusion unit is used for carrying out fusion processing on the coverage rate report of each module through a preset fusion tool to obtain a target coverage rate report.
7. The coverage fusion device of claim 1, wherein the fusion unit is specifically configured to:
detecting whether an error report occurs in the fusion process of the coverage rate report;
if an error report occurs in the fusion process of the coverage rate report, debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool;
and updating the parameters of the debugged fusion tool by using the verification platform, and fusing the coverage rate reports of the modules by using the debugged fusion tool with the updated parameters to obtain the target coverage rate report.
8. The coverage fusion apparatus of claim 7, wherein the fusion unit, when executing the step of debugging the parameters of the fusion tool according to the error report to obtain a debugged fusion tool, is specifically configured to:
if the error report has a mismatch signal, carrying out format conversion processing on the mismatch signal through a preset format text to obtain a converted signal;
analyzing the reasons for mismatching of the converted signals;
and debugging the parameters of the fusion tool according to the mismatching reason.
9. A computer arrangement, characterized in that the computer arrangement comprises a memory having stored thereon a computer program and a processor implementing the method according to any of claims 1-5 when executing the computer program.
10. A computer-readable storage medium, characterized in that the storage medium stores a computer program comprising program instructions which, when executed by a processor, implement the method according to any one of claims 1-5.
CN202111643969.7A 2021-12-29 2021-12-29 Coverage rate fusion method and device, computer equipment and storage medium Pending CN114356683A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114861594A (en) * 2022-07-08 2022-08-05 英诺达(成都)电子科技有限公司 Low-power-consumption verification method, device, equipment and storage medium of chip
CN116090380A (en) * 2023-04-07 2023-05-09 无锡麟聚半导体科技有限公司 Automatic method and device for verifying digital integrated circuit, storage medium and terminal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114861594A (en) * 2022-07-08 2022-08-05 英诺达(成都)电子科技有限公司 Low-power-consumption verification method, device, equipment and storage medium of chip
CN116090380A (en) * 2023-04-07 2023-05-09 无锡麟聚半导体科技有限公司 Automatic method and device for verifying digital integrated circuit, storage medium and terminal

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