KR20240013097A - 브리지를 통해 결합된 통합 디바이스들을 포함한 패키지 - Google Patents

브리지를 통해 결합된 통합 디바이스들을 포함한 패키지 Download PDF

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Publication number
KR20240013097A
KR20240013097A KR1020237036533A KR20237036533A KR20240013097A KR 20240013097 A KR20240013097 A KR 20240013097A KR 1020237036533 A KR1020237036533 A KR 1020237036533A KR 20237036533 A KR20237036533 A KR 20237036533A KR 20240013097 A KR20240013097 A KR 20240013097A
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South Korea
Prior art keywords
integrated device
interconnections
bridge
metallization
under bump
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Pending
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KR1020237036533A
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English (en)
Korean (ko)
Inventor
홍 복 위
애니켓 파틸
지지에 왕
마커스 수
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퀄컴 인코포레이티드
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Publication of KR20240013097A publication Critical patent/KR20240013097A/ko
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    • H01L25/0655
    • HELECTRICITY
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    • H01L23/3185
    • H01L23/5385
    • H01L23/5389
    • H01L23/585
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    • H10W20/00Interconnections in chips, wafers or substrates
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    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
KR1020237036533A 2021-05-24 2022-04-25 브리지를 통해 결합된 통합 디바이스들을 포함한 패키지 Pending KR20240013097A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/328,666 US20220375838A1 (en) 2021-05-24 2021-05-24 Package comprising integrated devices coupled through a bridge
US17/328,666 2021-05-24
PCT/US2022/026200 WO2022250821A1 (en) 2021-05-24 2022-04-25 Package comprising integrated devices coupled through a bridge

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KR20240013097A true KR20240013097A (ko) 2024-01-30

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KR1020237036533A Pending KR20240013097A (ko) 2021-05-24 2022-04-25 브리지를 통해 결합된 통합 디바이스들을 포함한 패키지

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US (1) US20220375838A1 (https=)
EP (1) EP4348711A1 (https=)
JP (1) JP2024521546A (https=)
KR (1) KR20240013097A (https=)
CN (1) CN117136436A (https=)
BR (1) BR112023023632A2 (https=)
WO (1) WO2022250821A1 (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12355000B2 (en) 2020-11-10 2025-07-08 Qualcomm Incorporated Package comprising a substrate and a high-density interconnect integrated device
US12469811B2 (en) 2021-03-26 2025-11-11 Qualcomm Incorporated Package comprising wire bonds coupled to integrated devices
KR102914981B1 (ko) * 2021-06-14 2026-01-21 삼성전자주식회사 반도체 패키지
KR20230011659A (ko) * 2021-07-14 2023-01-25 삼성전자주식회사 반도체 패키지 및 그의 제조 방법

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