KR20230156342A - 반도체 디바이스의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법 - Google Patents

반도체 디바이스의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법 Download PDF

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Publication number
KR20230156342A
KR20230156342A KR1020237030747A KR20237030747A KR20230156342A KR 20230156342 A KR20230156342 A KR 20230156342A KR 1020237030747 A KR1020237030747 A KR 1020237030747A KR 20237030747 A KR20237030747 A KR 20237030747A KR 20230156342 A KR20230156342 A KR 20230156342A
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South Korea
Prior art keywords
layer
metal
nucleation
alkyl
patterned substrate
Prior art date
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Pending
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KR1020237030747A
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English (en)
Korean (ko)
Inventor
카이-훙 유
시솅 창
잉 트리켓
에릭 치-팡 리우
윤 한
헤난 장
코리 와즈다
로버트 디 클락
게릿 제이 뢰싱크
갸나란잔 파타나이크
히로아키 니이미
Original Assignee
도쿄엘렉트론가부시키가이샤
도쿄 일렉트론 유.에스. 홀딩스, 인크.
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Publication date
Application filed by 도쿄엘렉트론가부시키가이샤, 도쿄 일렉트론 유.에스. 홀딩스, 인크. filed Critical 도쿄엘렉트론가부시키가이샤
Publication of KR20230156342A publication Critical patent/KR20230156342A/ko
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H01L21/76826—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • H01L21/76871—
    • H01L21/76879—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/057—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by selectively depositing, e.g. by using selective CVD or plating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/0595—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by using multiple deposition steps separated by etching steps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020237030747A 2021-03-16 2022-03-07 반도체 디바이스의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법 Pending KR20230156342A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202163161909P 2021-03-16 2021-03-16
US63/161,909 2021-03-16
PCT/US2022/019152 WO2022197479A1 (en) 2021-03-16 2022-03-07 Method for filling recessed features in semiconductor devices with a low-resistivity metal

Publications (1)

Publication Number Publication Date
KR20230156342A true KR20230156342A (ko) 2023-11-14

Family

ID=83284091

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020237030747A Pending KR20230156342A (ko) 2021-03-16 2022-03-07 반도체 디바이스의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법

Country Status (5)

Country Link
US (1) US12237216B2 (https=)
JP (1) JP7781360B2 (https=)
KR (1) KR20230156342A (https=)
TW (1) TW202242964A (https=)
WO (1) WO2022197479A1 (https=)

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001053023A (ja) 1999-08-11 2001-02-23 Tokyo Electron Ltd 半導体装置の製造方法及び製造装置
KR101558428B1 (ko) * 2009-03-03 2015-10-20 삼성전자주식회사 반도체 장치의 형성 방법
JP2011216862A (ja) 2010-03-16 2011-10-27 Tokyo Electron Ltd 成膜方法及び成膜装置
JP5654794B2 (ja) 2010-07-15 2015-01-14 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8945305B2 (en) * 2010-08-31 2015-02-03 Micron Technology, Inc. Methods of selectively forming a material using parylene coating
CN105336680B (zh) * 2014-08-13 2020-02-11 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制作方法和电子装置
CN105762109B (zh) * 2014-12-19 2019-01-25 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
US10643893B2 (en) * 2016-06-29 2020-05-05 International Business Machines Corporation Surface area and Schottky barrier height engineering for contact trench epitaxy
US10629478B2 (en) * 2017-08-22 2020-04-21 International Business Machines Corporation Dual-damascene formation with dielectric spacer and thin liner
US10867905B2 (en) * 2017-11-30 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structures and methods of forming the same
US11018053B2 (en) * 2018-06-29 2021-05-25 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure with material modification and low resistance plug
US10923393B2 (en) * 2018-09-24 2021-02-16 Taiwan Semiconductor Manufacturing Co., Ltd. Contacts and interconnect structures in field-effect transistors
CN112805818B (zh) * 2018-10-10 2024-10-18 东京毅力科创株式会社 用低电阻率金属填充半导体器件中的凹陷特征的方法

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Publication number Publication date
US12237216B2 (en) 2025-02-25
JP2024511023A (ja) 2024-03-12
JP7781360B2 (ja) 2025-12-08
US20220301930A1 (en) 2022-09-22
WO2022197479A1 (en) 2022-09-22
TW202242964A (zh) 2022-11-01

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