KR20230030150A - Semiconductor light-emitting diode and manufacturing method thereof - Google Patents

Abstract

Provided are a semiconductor light emitting diode and a manufacturing method thereof. According to various embodiments, a semiconductor light emitting diode includes: a first electrode; a first conductivity type semiconductor layer on the first electrode; an active layer on the first conductivity-type semiconductor layer; a second conductivity type semiconductor layer on the active layer; and at least one second electrode on the second conductivity type semiconductor layer. The first conductivity type semiconductor layer may be divided into regions of different thicknesses. Therefore, it is possible to provide a vertical structure LED with improved light efficiency.

Description

Semiconductor light emitting diode and manufacturing method thereof

Various embodiments relate to semiconductor light-emitting diodes (LEDs) and methods of manufacturing the same, and more particularly, to improved efficiency light-emitting diodes and methods of manufacturing the same.

A light emitting diode (hereinafter, also referred to as an LED) is a device that emits light by converting electrical energy into light energy in a pn junction semiconductor structure, and is widely used as a light source for displays and lighting. The wavelength of light emitted from the LED is determined by the energy band gap of the LED active layer material. Various LED materials that emit light in the visible, infrared, and ultraviolet regions have been developed. In particular, GaN, InGaN, and AlGaN-based materials are used as materials for blue, green, and ultraviolet LEDs. In LED, the power conversion efficiency or wall-plug efficiency that converts the injected electric energy into light energy and emits it to the outside increases the power conversion efficiency or wall-plug efficiency, and the junction temperature by efficiently dissipating the heat generated by the LED to the outside It is important to lower

LEDs can be largely classified into horizontal structures and vertical structures according to the shape in which current is injected. In the horizontal structure LED, the p-type electrode and the n-type electrode are arranged side by side so that the current flows in the horizontal direction. Although it has the advantage of being simple to manufacture, it is difficult to efficiently dissipate heat, so it is mainly applied to low-power LEDs. In the vertical structure LED, the p-type electrode and the n-type electrode are vertically arranged so that the current flows in the vertical direction, and the heat generated from the pn junction can be efficiently dissipated through a heat sink, which is applicable to high-power LEDs. It is becoming.

The shape of the vertical structure LED is basically formed on a metal heat sink, and heat can be efficiently discharged through the heat sink having excellent thermal conductivity, so that the operating temperature of the device can be maintained low. In the vertical structure LED, by applying a highly reflective metal material to the lower electrode, light incident from the active layer to the lower electrode is sent upward with high reflectance. In the vertical structure LED, light extraction efficiency can be increased by efficiently emitting light to the outside of the LED chip through the introduction of such a highly reflective lower electrode. However, in the vertical structure LED, when the light emitted from the active layer and the light emitted from the lower electrode escape to the outside of the chip, some of them are covered by the upper electrode and cannot escape. Due to the light blocking effect of the upper electrode, the light extraction efficiency of the LED is limited.

In a vertical structure LED, a current blocking layer (CBL) (hereinafter, may also be referred to as CBL) is often introduced to uniformly spread current in a horizontal direction. In CBL, a non-conductive material such as SiO ₂ is usually placed under the active layer at the same horizontal position as the upper electrode to prevent direct injection of current from the upper electrode to the lower electrode so that the current spreads uniformly in the active layer.

By introducing CBL in the vertical structure LED, the problem of blocking light in the upper electrode can be improved to some extent. Since the light emitted from the active layer located directly below the upper electrode is highly likely to be blocked by the upper electrode, by positioning the CBL so that no current is injected into this region, no light is emitted from directly below the upper electrode. The light occlusion problem can be improved. However, when the CBL is introduced in the vertical structure LED, the cross-sectional area through which the current flows is reduced, so the electrical resistance increases, and as a result, the operating voltage of the device rises, which has the effect of reducing the photoelectric conversion efficiency.

Therefore, there is a need for a method capable of improving the problem of light blocking by the upper electrode without introducing CBL in the vertical structure LED.

Korean Registered Patent Publication No. 10-1534846, registered on July 1, 2015 Korean Registered Patent Publication No. 10-1220419, registered on January 3, 2013

Various embodiments propose a vertical structure LED with improved light efficiency by improving light blocking by an upper electrode and a manufacturing method thereof.

A semiconductor light emitting diode according to various embodiments includes a first electrode, a first conductivity type semiconductor layer on the first electrode, an active layer on the first conductivity type semiconductor layer, a second conductivity type semiconductor layer on the active layer, and the first conductivity type semiconductor layer on the first electrode. At least one second electrode is included on the two conductivity type semiconductor layers, and the first conductivity type semiconductor layer may be divided into regions of different thicknesses.

A method of manufacturing a semiconductor light emitting diode according to various embodiments includes stacking the second conductivity type semiconductor layer, the active layer, and the first conductivity type semiconductor layer, and forming the first conductivity type semiconductor layer to different thicknesses. It may include forming and depositing the first electrode and the second electrode.

According to various embodiments, a vertical structure LED may be implemented with improved efficiency. That is, in the vertical structure LED, the problem of blocking light by the upper electrode, that is, the second electrode, is improved, and through this, light efficiency can be improved. Specifically, as the first conductivity-type semiconductor layer of the vertical structure LED, for example, the p-type semiconductor layer, has a different thickness corresponding to the second electrode, the first conductivity-type semiconductor layer reflects from the lower electrode, that is, the first electrode. The intensity distribution according to the angle of light is adjusted, and thus, the problem of light blocking by the upper electrode can be improved.

1, 2 and 3 are diagrams for explaining a general vertical structure LED.
4 and 5 are diagrams schematically illustrating a general vertical structure LED and a light emitting form thereof.
6 and 7 are diagrams schematically illustrating a vertical structure LED and a light emitting form thereof according to various embodiments.
8 is a diagram illustrating a method of manufacturing a vertical structure LED according to various embodiments.
9 is a diagram for explaining performance of a vertical structure LED according to various embodiments.

Hereinafter, various embodiments of this document will be described with reference to the accompanying drawings.

1, 2 and 3 are diagrams for explaining a general vertical structure LED.

Referring to FIG. 1 , since the vertical structure LED has a lower electrode having high reflectivity, light emitted upward from the active layer and light reflected from the lower electrode cause interference. Constructive interference or destructive interference occurs according to the path difference between the two lights, and thus the intensity of light changes according to the angle at which the light is emitted. As shown in [Equation 1] below, if the electric field of light emitted upward from the active layer is E1 and the electric field of light emitted downward and reflected from the lower electrode is E2, the electric field E of the overlapping two lights is E1 +E2, and the light intensity is proportional to the square of E. Accordingly, a change occurs in light intensity distribution according to the distance and angle between the active layer and the reflective electrode.

For the actual GaN-based blue LED, the light intensity distribution according to the angle was calculated. The light intensity according to the distance d between the active layer _and the lower electrode is shown in FIG . As shown, it was calculated. At this time, a phase change (F) of 180 degrees when reflected from the lower electrode was also considered. It can be seen that depending on d , the difference in angle distribution is large. When d = 100 nm, the center (0 degree) is weak and around 60 degree is strong, whereas at d = 120 and 140 nm, it appears strong around 0 degree.

According to known simulation results, as shown in FIG. 3, in a vertical structure LED composed of Ag reflector/p-GaN/active layer/n-GaN, the p-GaN thickness (t _p ) is At 100 nm, light is strongly emitted in an upward direction, and at 60 nm or 140 nm, it can be seen that light is strongly emitted in an oblique direction at an angle of 40 degrees or more from a vertical line. It was expected that the problem of light blocking by the upper electrode in the vertical structure LED could be improved by using the change in the emission pattern according to the p-GaN thickness.

4 and 5 are diagrams schematically showing a general vertical structure LED 10 and a form in which light is emitted.

4 and 5, a typical vertical structure LED 10 includes a first electrode 11, a first conductivity type semiconductor layer 12, an active layer 13, a second conductivity type semiconductor layer 14, and It is composed of the second electrode (15). The first electrode 11, the first conductivity type semiconductor layer 12, the active layer 13, the second conductivity type semiconductor layer 14, and the second electrode 15 are sequentially stacked along one direction. . The surface of the second conductivity type semiconductor layer 14 is patterned to efficiently extract light to the outside. A second electrode 15 is formed in a partial region of the second conductivity type semiconductor layer 14 . In general, the thickness of the first conductivity type semiconductor layer 12 is uniform.

When the distance between the first electrode 11 and the center of the active layer 13 is d1 in FIG. 4 and d2 greater than d1 in FIG. 5, light is emitted strongly in the vertical direction in FIG. 4 and obliquely in FIG. Let's assume that In FIG. 4, the light emitted from the area immediately below the second electrode 15 is blocked by the second electrode 15 and is not emitted to the outside, and in FIG. 5, the horizontal position of the second electrode 15 is slightly off to the left and right. It can be seen that the light emitted from the area is blocked by the second electrode 15 and is not emitted to the outside. That is, in both cases, a part of the light is blocked by the second electrode 15 and the light extraction efficiency is reduced.

When CBL is applied to the vertical structure LED 10 of FIG. 4 and a non-conductive material such as SiO ₂ is applied to a portion of the lower portion of the second electrode 15 to generate a CBL region (not shown), the CBL region generates light. Since light is emitted only in the outer region without being emitted, the problem of light blocking by the second electrode 15 can be solved to some extent. Therefore, in this case, the light extraction efficiency of light is expected to increase. However, since the current does not flow through the CBL region, the overall current flowing region is reduced, resulting in an increase in electrical resistance and an increase in the operating voltage of the LED 10 . Even if the light extraction efficiency is increased, the photoelectric conversion efficiency may not be improved if the voltage is increased.

6 and 7 are diagrams schematically illustrating a vertical structure LED 100 and a light emitting form thereof according to various embodiments.

Referring to FIGS. 6 and 7 , the vertical structure LED 100 according to various embodiments includes a first electrode 110, a first conductivity type semiconductor layer 120, an active layer 130, and a second conductivity type semiconductor layer. 140, and at least one second electrode 150. The first electrode 110, the first conductivity type semiconductor layer 120, the active layer 130, the second conductivity type semiconductor layer 140, and the second electrode 150 are sequentially stacked along one direction. . At this time, the first electrode 110 is a p-type ohmic contact electrode, the first conductivity-type semiconductor layer 120 is a p-type semiconductor layer, the second conductivity-type semiconductor layer 140 is an n-type semiconductor layer, The second electrode 150 may be an n-type ohmic contact electrode. For example, when fabricated with a GaN-based material, usually the first conductivity type semiconductor layer 120 is a p-type GaN layer, the active layer 130 is an InGaN layer, and the second conductivity type semiconductor layer 140 is an n-type GaN layer. It is a layer. For example, the active layer 130 is formed of Al _x Ga _y In _1-xy N (0≤x≤0.5, 0≤y≤1, x+y≥0.5) material, and the first conductivity type semiconductor layer 120 and the second conductivity-type semiconductor layer 140 are formed of Al _u Ga _v In _1-uv N (0≤u≤0.8, 0≤v≤1, u+v≥0.8) material.

According to various embodiments, at least one second electrode 150 is arranged on the second conductivity type semiconductor layer 140 . At this time, the surface of the second conductivity type semiconductor layer 140 is patterned to efficiently extract light to the outside. And, each second electrode 150 is formed in a partial area of the second conductivity type semiconductor layer 140 .

According to various embodiments, the first conductivity-type semiconductor layer 120 vertically includes at least one first region 121 respectively corresponding to at least one second electrode 150, and the rest, that is, the first region ( 121) It is divided into an outer second region 123. For example, a difference between the center positions of the second electrode 150 and the first region 121 corresponding to each other vertically is within a range of about -5 μm or more and about 5 μm or less. Here, the area of each first region 121 is, for example, within a range of 0.2 times or more and 5 times or less of the area A of the second electrode 150 corresponding vertically thereto. At this time, the thickness of each first region 121 is different from the thickness of the second region 123 . For example, the thickness of the first region 121 and the thickness of the second region 123 are within a range of 50 nm or more and 500 nm or less, respectively, and the thickness of the first region 121 and the thickness of the second region 123 are The difference in thickness is about 10 nm or more. Here, the sum of the widths of the first region 121 is smaller than the sum of the widths of the second region 123 .

According to an embodiment, as shown in FIG. 6 , the thickness d2 of the first region 121 is greater than the thickness d1 of the second region 123 (ie, d2 > d1). In this structure, in the second region 123, the light emitted from the active layer 130 and the light reflected from the first electrode 110 interfere and are mainly emitted in the vertical direction, and in the first region 121, The thickness d1 of the second region 123 and the thickness d2 of the first region 121 may be adjusted so that light is emitted obliquely. In this case, light emitted from all regions of the active layer 130 may be emitted to the outside of the LED 100 without being blocked by the second electrode 150 .

According to another embodiment, as shown in FIG. 7 , the thickness d3 of the first region 121 is smaller than the thickness d1 of the second region 123 (ie, d3 < d1). In this structure, the light emitted from the second region 123 is mainly emitted in a vertical direction, and the thickness d1 of the second region 123 and the second region 123 are emitted obliquely in the first region 121. The thickness d3 of the first region 121 may be adjusted. Even in this case, light emitted from all regions of the active layer 130 may be emitted to the outside of the LED 100 without being blocked by the second electrode 150 .

As described above, in the vertical structure LED 100 according to various embodiments, in all structures as shown in FIGS. 6 and 7, light emitted from the active layer 130 is directed toward the second electrode 150. Light can be efficiently emitted to the outside of the LED 100 without being covered. In addition, since current flows to all regions of the active layer 130, the voltage rise problem as in the structure to which CBL is applied does not occur, and thus the photoelectric conversion efficiency improvement effect of the LED 100 can be expected as a whole.

8 is a diagram illustrating a method of manufacturing a vertical structure LED 100 according to various embodiments.

Referring to FIG. 8 , first, in step 210, the second conductivity type semiconductor layer 140, the active layer 130, and the first conductivity type semiconductor layer 120 are sequentially stacked. At this time, on a substrate (not shown), the second conductivity type semiconductor layer 140, the active layer 130, and the first conductivity type semiconductor layer 120 are sequentially stacked. Next, in step 220, the first conductivity type semiconductor layer 120 is formed to different thicknesses. According to an embodiment, in step 210, the first conductivity type semiconductor layer 120 is stacked to a predetermined thickness d2, and in step 220, the first region 121 is formed in the first conductivity type semiconductor layer 120. The second region 123 except for is etched to have a predetermined different thickness d1. Here, after the first region 121 is defined in the first conductivity-type semiconductor layer 120 by a lithography technique, the second region 123 is etched. Accordingly, the first conductivity type semiconductor layer 120 is formed to have different thicknesses d1 and d2 as shown in FIG. 6 . According to another embodiment, in step 210, the first conductivity type semiconductor layer 120 is stacked to a predetermined thickness d1, and in step 220, the first region 121 is etched to have a predetermined thickness d3. do. Here, after the first region 121 is defined in the first conductivity type semiconductor layer 120 by a lithography technique, the first region 121 is etched. Accordingly, the first conductivity type semiconductor layer 120 is formed to have different thicknesses d1 and d3 as shown in FIG. 7 .

Next, in step 230, the first electrode 110 and the second electrode 150 are deposited. As described above, when the first conductivity type semiconductor layer 120 is formed, the first electrode 110 is deposited on the first conductivity type semiconductor layer 120 . Then, after the second conductivity type semiconductor layer 140 is separated from the substrate, a pattern is formed on the surface of the second conductivity type semiconductor layer 140 . Then, the second electrode 150 is deposited on a partial region of the second conductivity type semiconductor layer 140 so as to vertically correspond to the first region 121 of the first conductivity type semiconductor layer 120 . Accordingly, the LED 100 as shown in FIG. 6 or 7 is manufactured.

9 is a diagram for explaining performance of the vertical structure LED 100 according to various embodiments.

Referring to FIG. 9 , a simulation was performed to confirm an effect of improving light extraction efficiency of the vertical structure LED 100 according to various embodiments. The 3-dimensional FDTD (Finite-Difference Time-Domain) method was used for the simulation. Both the width of the second electrode 150 and the first region 121 are set to 5 μm, the thickness d1 of the second region 123 is set to 120 nm, and the thickness of the first region 121 ( The light extraction efficiency for each source point of the active layer 130 was simulated while changing d2 and d3). When the thickness d1 of the second region 123 is 120 nm, light reflected from the first electrode 110 is mainly emitted upward. The light extraction efficiency means a ratio of light emitted to the outside of the LED 100 among light emitted from a source point.

Looking at the simulation results, when Dd is the difference between the thickness d2 of the first region 121 and the thicknesses d1 and d3 of the second region 123, when Dd is 0, the second electrode 150 exists. It can be seen that the light extraction efficiency is very low in the region where x is 0 to 2 mm, that is, the light emitted in this region is blocked by the second electrode 150 . When Dd decreases from 0 or increases from 0 on the contrary, that is, when the first conductivity-type semiconductor layer 120 has different thicknesses, the area where the second electrode 150 exists, that is, the area where x is 0 to 2 mm It can be seen that the light extraction efficiency of the light emitted from the corresponding source point is improved. Through this, it is possible to confirm the light extraction efficiency improvement effect in the vertical structure LED 100 according to various embodiments.

According to various embodiments, the vertical structure LED 100 may be implemented to have improved efficiency. That is, in the vertical structure LED 100, the problem of light blocking by the upper electrode, that is, the second electrode 150 is improved, and light efficiency can be improved through this. Specifically, as the first conductivity-type semiconductor layer 120 of the vertical structure LED 100, for example, the p-type semiconductor layer has a different thickness corresponding to the second electrode 150, the first conductivity-type semiconductor layer 120 ), the intensity distribution according to the angle of the light reflected from the lower electrode, that is, the first electrode 110, is adjusted, and thus, the problem of light blocking by the second electrode 150 can be improved.

The vertical structure LED 100 according to various embodiments includes a first electrode 110, a first conductivity type semiconductor layer 120 on the first electrode 110, and an active layer on the first conductivity type semiconductor layer 120 ( 130), the second conductivity type semiconductor layer 140 on the active layer 130, and at least one second electrode 150 on the second conductivity type semiconductor layer 140.

According to various embodiments, the first conductivity type semiconductor layer 120 may be divided into regions 121 and 123 having different thicknesses.

According to various embodiments, the regions 121 and 123 may include at least one first region 121 corresponding to the second electrode 150 and the remaining second regions 123 .

According to various embodiments, the thickness of the first region 121 may be thicker or thinner than the thickness of the second region 123 .

According to various embodiments, the sum of the widths of the first region 121 may be smaller than the sum of the widths of the second region 123 .

According to various embodiments, the first electrode 110 is a p-type ohmic contact electrode, the first conductivity-type semiconductor layer 120 is a p-type semiconductor layer, and the second conductivity-type semiconductor layer 140 is an n-type semiconductor. layer, and the second electrode 150 may be an n-type ohmic contact electrode.

A method of manufacturing a vertical structure LED 100 according to various embodiments includes stacking a second conductivity type semiconductor layer 140, an active layer 130, and a first conductivity type semiconductor layer 120 (step 210). , forming the first conductivity-type semiconductor layer 120 with different thicknesses (step 220), and depositing the first electrode 110 and the second electrode 150 (step 230). .

According to one embodiment, forming the first conductivity-type semiconductor layer 120 with different thicknesses (step 220) includes defining a first region 121 in the first conductivity-type semiconductor layer 120; and etching the second region 123 in the first conductivity-type semiconductor layer 120 while maintaining the first region 121 .

According to another embodiment, forming the first conductivity-type semiconductor layer 120 to different thicknesses (step 220) includes defining a first region 121 in the first conductivity-type semiconductor layer 120; and etching the first region 121 in the first conductivity-type semiconductor layer 120 while maintaining the second region 123 .

According to various embodiments, the step (step 210) of stacking the second conductivity type semiconductor layer 140, the active layer 130, and the first conductivity type semiconductor layer 120, on the substrate, the second conductivity type A step of stacking the semiconductor layer 140 , the active layer 130 , and the first conductivity type semiconductor layer 120 may be included.

According to various embodiments, depositing the first electrode 110 and the second electrode 150 (step 230) may include depositing the first electrode 110 on the first conductivity type semiconductor layer 120. , And after separating the second conductivity type semiconductor layer 140 from the substrate, a second electrode 150 is deposited on a partial region of the second conductivity type semiconductor layer 140 corresponding to the first region 121. steps may be included.

Various embodiments of this document and terms used therein are not intended to limit the technology described in this document to a specific embodiment, and should be understood to include various modifications, equivalents, and/or substitutes of the embodiment. In connection with the description of the drawings, like reference numerals may be used for like elements. Singular expressions may include plural expressions unless the context clearly dictates otherwise. In this document, expressions such as "A or B", "at least one of A and/or B", "A, B or C" or "at least one of A, B and/or C" refer to all of the items listed together. Possible combinations may be included. Expressions such as "first," "second," "first," or "second" may modify the elements in any order or importance, and are used only to distinguish one element from another. The components are not limited. When a (e.g., first) element is referred to as being "(functionally or communicatively) connected" or "connected" to another (e.g., second) element, it is referred to as being "connected" to the other (e.g., second) element. It may be directly connected to the component or connected through another component (eg, a third component).

According to various embodiments, each of the components described above may include a single entity or a plurality of entities. According to various embodiments, one or more components or steps among the aforementioned components may be omitted, or one or more other components or steps may be added. Alternatively or additionally, a plurality of components may be integrated into one component. In this case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to integration.

Claims (10)

In the semiconductor light emitting diode,
A first electrode, a first conductivity type semiconductor layer on the first electrode, an active layer on the first conductivity type semiconductor layer, a second conductivity type semiconductor layer on the active layer, and at least one second conductivity type semiconductor layer on the second conductivity type semiconductor layer. contains electrodes;
The first conductivity type semiconductor layer,
divided into regions of different thicknesses,
Semiconductor light emitting diode.
According to claim 1,
These areas are
Including at least one first region corresponding to the second electrode, and the remaining second region,
Semiconductor light emitting diode.
According to claim 2,
The thickness of the first region is thicker or thinner than the thickness of the second region,
Semiconductor light emitting diode.
According to claim 2,
The sum of the widths of the first region is smaller than the sum of the widths of the second region.
Semiconductor light emitting diode.
According to claim 1,
The first electrode is a p-type ohmic contact electrode,
The first conductivity-type semiconductor layer is a p-type semiconductor layer,
The second conductivity-type semiconductor layer is an n-type semiconductor layer,
The second electrode is an n-type ohmic contact electrode,
Semiconductor light emitting diode.
In the manufacturing method of the semiconductor light emitting diode according to any one of claims 1 to 5,
stacking the second conductivity type semiconductor layer, the active layer, and the first conductivity type semiconductor layer;
forming the first conductivity type semiconductor layer to different thicknesses; and
Depositing the first electrode and the second electrode
including,
A method for manufacturing a semiconductor light emitting diode.
According to claim 6,
Forming the first conductivity-type semiconductor layer to different thicknesses,
defining the first region in the first conductivity type semiconductor layer; and
etching the second region in the first conductivity-type semiconductor layer while maintaining the first region;
including,
A method for manufacturing a semiconductor light emitting diode.
According to claim 6,
Forming the first conductivity-type semiconductor layer to different thicknesses,
defining the first region in the first conductivity type semiconductor layer; and
etching the first region in the first conductivity-type semiconductor layer while maintaining the second region;
including,
A method for manufacturing a semiconductor light emitting diode.
According to claim 6,
The step of stacking the second conductivity type semiconductor layer, the active layer, and the first conductivity type semiconductor layer,
stacking the second conductivity type semiconductor layer, the active layer, and the first conductivity type semiconductor layer on a substrate;
including,
A method for manufacturing a semiconductor light emitting diode.
According to claim 9,
Depositing the first electrode and the second electrode,
depositing the first electrode on the first conductivity type semiconductor layer; and
After separating the second conductivity type semiconductor layer from the substrate, depositing the second electrode on a partial region of the second conductivity type semiconductor layer corresponding to the first region.
including,
A method for manufacturing a semiconductor light emitting diode.

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