KR20210017966A - Source driver and display device controlling bias current - Google Patents

Abstract

One embodiment of the present invention relates to a source driver controlling a bias current, which controls the bias current of a buffer according to the distance between the source driver and a pixel on a data line and changes the position at which the bias current is set for each frame, thereby being capable of minimizing consumption of unnecessary power due to the bias current and improving blocking phenomenon.

Description

Source driver and display device controlling bias current {SOURCE DRIVER AND DISPLAY DEVICE CONTROLLING BIAS CURRENT}

The present embodiment relates to a source driver for controlling a bias current and a display device including the same.

The display device may include a panel, a source driver for driving the panel, and a timing controller for controlling driving of the source driver. The panel includes a plurality of pixels arranged horizontally and vertically to form a row and a column, and the arranged plurality of pixels are positioned on the panel like a matrix matrix. When a plurality of pixels are arranged in the horizontal direction, a row formed by the plurality of pixels is also referred to as a line.

The timing controller can transmit drive control data and image data to the source driver. The timing controller can control the driving timing for the panel of the source driver through the driving control data. The timing controller can transmit image data to the source driver.

The source driver can drive a plurality of pixels in one line at a time. The source driver may generate an image signal from image data to drive a plurality of pixels of the panel. The source driver may include a DAC (digital analog converter) and a buffer therein. The DAC can generate a data voltage that is an analog signal from image data. The buffer of the source driver channel is connected to a plurality of data lines vertically arranged on the panel. The buffer amplifies the data voltage and outputs the data voltage to the pixel through the data line of each channel.

The buffer may adjust a slew rate to a voltage output to a data line of a channel through a bias current. The buffer can receive a strong bias current and increase the slew rate. On the other hand, the buffer can receive a weak bias current and lower the slew rate.

Conventionally, the bias current is supplied to the buffer at a constant intensity regardless of the position of the pixel on the data line. That is, the buffer outputs each data voltage by using the same bias current to a pixel located on a data line close to the source driver or a pixel located on a data line far from the source driver. However, the use of a strong bias current to drive the distant pixel is unnecessary for driving the distant pixel. When a strong bias current is used to drive the pixels at the nearest point, excessive power consumption may be generated in the buffer. In addition, the power consumption of the buffer accounts for a significant portion of the power consumption of the entire source driver. Therefore, it is necessary to reduce the power consumption of the source driver by adjusting the bias current differently according to the position of the pixel on the data line.

Against this background, one object of the present embodiment is to provide a technique for differentiating the bias current intensity of a buffer according to a distance between a source driver and a pixel on a data line.

Another object of the present embodiment is to provide a technique for saturating data voltages for each pixel on a data line in a predetermined range by adjusting a bias current of a buffer.

Another object of the present embodiment is to provide a technique for setting a bias current in pixels at different locations every frame.

In order to achieve the above object, an embodiment includes: a buffer for outputting a plurality of data voltages using a bias current to drive a plurality of pixels connected to a data line; And a bias control unit for adjusting an intensity of the bias current according to a position of each pixel connected to the data line, wherein the bias control unit determines a position of a pixel for adjusting the intensity of the bias current differently for each frame. It provides a source driver.

In the source driver, the bias control unit adjusts the bias current to a first intensity for a first group pixel among the plurality of pixels, and adjusts the bias current to a second intensity for a second group pixel among the plurality of pixels. Can be adjusted with

In the source driver, the second group pixel is located farther than the first group pixel on the data line, and the bias control unit may adjust the second intensity to be stronger than the first intensity.

In the source driver, the second group pixel includes a boundary pixel in which the intensity of the bias current changes to the second intensity, and the bias control unit may determine the boundary pixel arbitrarily or by a predetermined rule.

In the source driver, a time when a data voltage is formed in the first group pixel and a time when a data voltage is formed in the second group pixel may fall within a preset similar range.

In the source driver, the bias control unit may receive a bias control signal including position data of each pixel for adjusting the intensity of the bias current.

In the source driver, the bias control unit may receive a bias control signal including timing data for adjusting the intensity of the bias current.

In another embodiment, a buffer for outputting a plurality of data voltages using a bias current to drive a plurality of pixels included in a plurality of channels; And a bias control unit for adjusting an intensity of the bias current for each channel corresponding to a position of each pixel, wherein the bias control unit adjusts the intensity of the bias current for a boundary pixel at a different position for each frame, The boundary pixels are determined differently for each frame, and a source driver that is determined to be located on a different line between adjacent channels is provided.

In the source driver, the bias control unit adjusts the intensity of the bias current to the highest for driving a pixel located farthest from among the plurality of pixels, and a bias current for driving a pixel located closest among the plurality of pixels. You can adjust the strength of the weakest.

In the source driver, a time when a data voltage is formed in the furthest pixel and a time when a data voltage is formed in the nearest pixel may fall within a preset similarity range.

In the source driver, the bias controller may divide the plurality of pixels into a plurality of groups and adjust the intensity of the bias current for each group.

In the source driver, the bias control unit adjusts the intensity of the bias current to the strongest for driving the farthest group among the plurality of groups, and biases for driving the nearest group among the plurality of groups. You can adjust the intensity of the current to the weakest.

In the source driver, a time when a data voltage is formed in the farthest group and a time when a data voltage is formed in the closest group may fall within a preset similar range.

In another embodiment, an M-th data voltage for an M-th pixel connected to a data line (M is a natural number greater than or equal to 1) is output using an M-th bias current, and N (N is M+) connected to the data line. A natural number greater than 1)-th pixel is output by using an N-th bias current that is greater than the M-th bias current, and the M-th power generated by the M-th bias current is consumed, and the N-th A buffer generated by a bias current and consuming an Nth power greater than the Mth power; And a bias control unit configured to generate the M-th bias current and the N-th bias current to supply the buffer to the buffer, wherein the bias control unit provides a source driver that determines the M-th pixel and the N-th pixel differently for each frame. do.

In the source driver, the buffer is a first mode for outputting the Mth data voltage using the Mth bias current and outputting the Nth data voltage using the Nth bias current, or the Mth data The voltage and the M+1 th data voltage may be operated according to a second mode in which a bias current of the same intensity is used.

In the source driver, the bias control unit generates the Mth bias current for the Mth group pixel including the Mth pixel, and the Nth bias current for the Nth group pixel including the Nth pixel Can be created.

As described above, according to the present embodiment, the power consumption of the entire display device can be reduced by minimizing unnecessary power consumption due to a bias current.

Further, according to the present embodiment, it is possible to enable dynamic and adaptive bias current control according to the position of a pixel on a data line of a channel.

And, according to this embodiment, it is possible to provide more efficient and simpler bias current control.

In addition, according to the present embodiment, the block dim phenomenon can be improved.

1 is a block diagram of a display device according to an exemplary embodiment.
2 is a configuration diagram of a source driver according to an embodiment.
3 is a diagram illustrating a slew rate applied to a plurality of pixels connected on a data line over time.
4 is a diagram illustrating power consumed by a bias current in a plurality of pixels connected on a data line.
5 is a diagram illustrating a slew rate applied to a plurality of pixels connected on a data line over time according to an exemplary embodiment.
6 is a diagram illustrating power consumed by a bias current in a plurality of pixels connected on a data line according to an exemplary embodiment.
7 is a diagram illustrating a bias current used by a buffer to drive a plurality of pixels connected on a data line according to another exemplary embodiment.
8 is a diagram showing a dim phenomenon according to the setting of a bias current.
9 is a diagram illustrating an improved dim phenomenon according to a setting of a bias current according to another embodiment.

Hereinafter, some embodiments of the present invention will be described in detail through exemplary drawings. In adding reference numerals to elements of each drawing, it should be noted that the same elements are assigned the same numerals as possible even if they are indicated on different drawings. In addition, in describing the present invention, if it is determined that a detailed description of a related known configuration or function may obscure the subject matter of the present invention, a detailed description thereof will be omitted.

In addition, in describing the constituent elements of the present invention, terms such as first, second, A, B, (a), (b) may be used. These terms are only used to distinguish the component from other components, and the nature, order, or order of the component is not limited by the term. When a component is described as being "connected", "coupled" or "connected" to another component, the component may be directly connected or connected to that other component, but another component between each component It should be understood that elements may be “connected”, “coupled” or “connected”.

1 is a block diagram of a display device according to an exemplary embodiment.

Referring to FIG. 1, the display device 10 may include a panel 11, a source driver 12, a gate driver 13, a timing controller 14, and the like.

A plurality of data lines DL and a plurality of gate lines GL may be disposed on the panel 11, and a plurality of pixels P may be disposed. The plurality of pixels P may be disposed adjacent to each other in the horizontal direction H and the vertical direction V of the panel 11 to have a square shape. The shape of a square is similar to a matrix matrix, and a set of a plurality of pixels (P) arranged in a horizontal direction (H) or a horizontal line represented by them is defined as a row or line, and arranged in a vertical direction (V). A set of a plurality of pixels P or a vertical line represented by the plurality of pixels P may be defined as a column.

The gate driver 13 may supply a scan signal of a turn-on voltage or a turn-off voltage to the gate line GL. When the scan signal of the turn-on voltage is supplied to the pixel P, the pixel P may be connected to the data line DL. When the scan signal of the turn-off voltage is supplied to the pixel P, the connection between the pixel P and the data line DL is released.

For example, when the scan transistor STR of the pixel P is turned on by the scan signal of the turn-on voltage, the pixel electrode PE may be connected to the data line. When the scan transistor STR of the pixel P is turned off by the scan signal of the turn-off voltage, the connection between the pixel electrode PE and the data line may be released.

The source driver 12 supplies a data voltage to the data line DL. The data voltage supplied to the data line DL is transmitted to the driving transistor DTR of the pixel P connected to the data line DL according to the scan signal. Whenever the driving transistor DTR of the plurality of pixels P connected to one data line DL is turned on by the scan signal of the turn-on voltage, the source driver 12 is the driving transistor of the plurality of pixels P. Data voltage can be sequentially output with (DTR).

The timing controller 14 may supply various control signals to the gate driver 13 and the source driver 12. The timing controller 14 may generate a gate control signal GCS for starting a scan according to a timing implemented in each frame and transmit it to the gate driver 13. In addition, the timing controller 14 may output image data RGB, which is converted from externally input image data according to a data format used by the source driver 12, to the source driver 12. In addition, the timing controller 14 may transmit a data control signal DCS for controlling the source driver 12 to supply a data voltage to each pixel P according to each timing.

2 is a configuration diagram of a source driver according to an embodiment.

2, the source driver 12 includes a first latch unit 210, a second latch unit 220, a DAC 230, a buffer 240, a bias control unit 250, and a driving control unit 260. Can include.

The first latch unit 210 may latch the image data RGB. The first latch unit 210 may temporarily store the image data RGB and then output it to the second latch unit 220. The first latch unit 210 temporarily stores the image data RGB and outputs the image data RGB to the second latch unit 220 according to a clock of a shift register (not shown).

The second latch unit 220 may latch the image data RGB. The second latch unit 220 may temporarily store the image data RGB and output it to the DAC 230. The second latch unit 220 temporarily stores the image data RGB and then outputs it to the DAC 230 according to a clock of a shift register (not shown).

The DAC 230 may receive image data RGB from the second latch unit 220. The DAC 230 may generate a data voltage, which is an analog signal, from the image data RGB. The DAC 230 selects a gradation voltage corresponding to the image data RGB transmitted from the second latch unit 220 among gradation voltages of a predetermined step generated from the gamma reference voltage input from the outside and outputs it to the buffer 240 can do.

The buffer 240 may receive a data voltage from the DAC 230. The buffer 240 may amplify the data voltage and supply it to the data line.

The buffer 240 may receive a bias current from the bias control unit 250 and output a data voltage. The buffer 240 may output a data voltage according to a bias current. The buffer 240 may adjust the height of the slew rate of the data voltage through the bias current.

The bias control unit 250 may generate a bias current and supply a bias current to the buffer 240. For example, the bias control unit 250 may receive the bias power BIAS_PWR from the outside. The bias power supply BIAS_PWR may include a plurality of bias currents. The bias control unit 250 may receive a bias control signal BIAS_CTR_SIG from the driving control unit 260. The bias control unit 250 may select one of a plurality of bias currents included in the bias power supply BIAS_PWR through the bias control signal BIAS_CTR_SIG, and may output the selected bias current to the buffer 240. Alternatively, the bias control unit 250 may generate a bias current by adjusting the amount of current included in the bias power supply BIAS_PWR through the bias control signal BIAS_CTR_SIG. Alternatively, the bias control unit 250 may generate a bias current by increasing or decreasing the amount of current included in the bias power BIAS_PWR.

Also, the bias control unit 250 may differentially adjust the bias current according to the positions of a plurality of pixels connected to one data line. The bias control unit 250 may vary a bias current for each pixel according to how far the pixel is from the source driver 12. For example, the bias control unit 250 may weakly adjust the bias current to drive a pixel located near the source driver 12. Alternatively, the bias control unit 250 may strongly adjust the bias current for driving a pixel located far from the source driver 12.

The bias control unit 250 may determine whether to adjust the bias current from the bias control signal BIAS_CTR_SIG. Alternatively, the bias control unit 250 may determine the position of a pixel for adjusting the bias current from the bias control signal BIAS_CTR_SIG. Alternatively, the bias control unit 250 may determine how hard or weak to adjust the bias current from the bias control signal BIAS_CTR_SIG. Alternatively, the bias control unit 250 may determine a pixel (boundary pixel) whose bias current setting changes every frame based on the bias control signal BIAS_CTR_SIG, and adjust the bias current accordingly.

The driving control unit 260 may receive image data RGB from the timing controller. The driving control unit 260 may transfer the image data RGB to the first latch unit 210. The image data RGB may be output to a pixel connected to the data line by the buffer 240 through the second latch unit 220 and the DAC 230.

The driving control unit 260 may receive a data control signal DCS from the timing controller. The driving control unit 260 generates a clock from the data control signal DCS and supplies the clock to drive the first latch unit 210, the second latch unit 220, the DAC 230, and the buffer 240. can do.

The driving control unit 260 may generate a bias control signal BIAS_CTR_SIG from the data control signal DCS. The bias control signal BIAS_CTR_SIG may determine whether to adjust the bias current. For example, the bias control unit 250 may operate in a first mode in which the bias current is differentially adjusted and supplied to the buffer 240 and a second mode in which a bias current of the same intensity is supplied to the buffer 240 without adjustment. have. The bias control signal BIAS_CTR_SIG may include information for determining any one of the first mode and the second mode. Alternatively, the bias control signal BIAS_CTR_SIG may include information on bias current adjustment for a plurality of pixels connected to one data line. For example, the bias control signal BIAS_CTR_SIG may include location information of a pixel requiring an adjusted bias current. Alternatively, the bias control signal BIAS_CTR_SIG may include current value information that changes each time each pixel is driven. The bias control signal BIAS_CTR_SIG may include location information of a pixel (boundary pixel) whose bias current setting is changed every frame.

The driving control unit 260 may determine a position of a pixel for which the bias current needs to be adjusted.

For example, the driving control unit 260 may receive position data of the pixel from the timing controller and determine a pixel for which bias current needs to be adjusted. The location data may be included in the data control signal DCS and transmitted from the timing controller to the driving control unit 260. The driving control unit 260 may determine a pixel for which bias current needs to be adjusted based on the position data. The driving control unit 260 may include the location information of the pixel in the bias control signal BIAS_CTR_SIG and transmit it to the bias control unit 250. The bias control unit 250 may adjust a bias current for a pixel determined according to the position data and may supply the bias current to the buffer 240.

As another example, the driving control unit 260 may generate timing to determine a pixel requiring adjustment of a bias current. The driving control unit 260 may measure the scan time of one line and determine the location of the pixel according to the passage of the scan time. For example, if it takes t ₁ scan time for each pixel of each line, the driving control unit 260 generates a timing for the first pixel located on the first line of the panel at the moment when the frame starts, and biases the timing. It may be included in the signal BIAS_CTR_SIG and transmitted to the bias control unit 250. The bias control unit 250 may adjust a bias current for the first pixel and supply it to the buffer 240. Next, the driving control unit 260 may generate a timing for the second pixel positioned on the second line after the flow of t ₁ and transmit it to the bias control unit 250. The bias control unit 250 may adjust a bias current for the second pixel and supply it to the buffer 240. Next, the driving control unit 260 may generate a timing for the third pixel positioned on the third line after the flow of 2t ₁ flows and transmit the generated timing to the bias control unit 250. The bias control unit 250 may adjust a bias current for the third pixel and supply it to the buffer 240.

The buffer 240 may output a data voltage according to a differently adjusted bias current. For example, the buffer 240 may receive a first bias current and output a first data voltage corresponding to the first image data to a pixel of the first line based on the first bias current. The buffer 240 may receive the second bias current and output a second data voltage corresponding to the second image data to the pixels of the second line based on the second bias current. Here, the second bias current may be adjusted to be stronger than the first bias current.

Preferably, the buffer 240 may use a bias current differentially adjusted according to positions of a plurality of pixels connected to one data line. The buffer 240 may receive the differentially adjusted bias current and output a differential data voltage based thereon. The buffer 240 may output the data voltage differently depending on how far the pixel is from the source driver 12. For example, the buffer 240 may output the first data voltage to a pixel located near the source driver 12 by using a weakly adjusted bias current. Alternatively, the buffer 240 may output the second data voltage to a pixel located far from the source driver 12 by using a strongly adjusted bias current.

3 is a diagram illustrating a slew rate applied to a plurality of pixels connected on a data line over time.

Referring to FIG. 3, a plurality of pixels connected to one data increase and a slew rate corresponding to each pixel are shown. Conventionally, the buffer 340 can output a data voltage corresponding to each pixel through the same bias current regardless of the position of each pixel on the data line. Accordingly, the buffer 340 may output each data voltage to a pixel close to the source driver or a pixel far from the source driver through the same bias current.

For example, the buffer 340 may output a data voltage to a plurality of pixels P_1, P_2, ..., P_N-1, P_N connected to one data line using the same bias current.

Here, the plurality of pixels (P_1, P_2, ..., P_N-1, P_N) are respectively scan transistors (STR ₁ , STR ₂ , ..., STR _N-1 , STR _N ), driving transistors (DTR ₁ , DTR). ₂ , ..., DTR _N-1 , DTR _N ) and pixel electrodes PE ₁ , PE ₂ , ..., PE _N-1 , PE _N. In addition, a resistance component and a capacitance component may exist in one data line. The resistance component can be generated by the data line when the data voltage is applied to each pixel. The capacitance component may be caused by coupling between the data line and other adjacent conductors or electrodes. The resistance component may be represented by resistances R ₁ , R ₂ , ..., R _N-1 , R _N , respectively, corresponding to a plurality of pixels P_1, P_2, ..., P_N-1, P_N. . The capacitance component may be represented by capacitors C ₁ , C ₂ , ..., C _N-1 , C _N , respectively, corresponding to a plurality of pixels P_1, P_2, ..., P_N-1, P_N. .

When the buffer 340 outputs the data voltage to the plurality of pixels P_1, P_2, ..., P_N-1, P_N using the same bias current, the data voltage applied to the data line corresponding to each pixel The slew rate may vary according to the distance from the buffer 340 to each pixel. In this drawing, the slew rate may be represented by a graph having an axis of time (TIME) and an axis of data voltage (V_DATA).

For example, in a state in which the data voltages for the plurality of pixels P_1, P_2, ..., P_N-1, P_N are all changed by the same change width ΔV from the same data voltage, the buffer 340 changes the data voltage for each pixel. If output, the data voltage is output from after each pixel is connected to the data line by the turn-on voltage scan signal of the gate driver until the point when each pixel is disconnected by the turn-off voltage scan signal (gate-off point (GOP)). Can be.

When the buffer 340 outputs the first data voltage V _{data_1} to drive the first pixel P_1, the data voltage changes by _ΔV to reach the first data voltage V _{data_1} , and the first slew rate SR ₁ ) can have. A point in time reaching the first data voltage V _{data_1} may be defined as a first saturation point SP ₁ . The first saturation point SP ₁ may mean a time taken for the scan signal of the gate driver to reach the first data voltage V _{data_1} after connecting the first pixel P_1 to the data line.

Next, when the buffer 340 outputs the second data voltage V _{data_2} to drive the second pixel P_2, the data voltage changes by _ΔV to reach the second data voltage V _{data_2} and a second slew rate You can have (SR ₂ ). A point in time reaching the second data voltage V _{data_2} may be defined as a second saturation point SP ₂ . The second saturation point SP ₂ may mean a time taken for the scan signal of the gate driver to reach the second data voltage V _{data_2} after connecting the second pixel P_2 to the data line.

Thereafter, when the buffer 340 outputs the N-1 _th data voltage (V _{data_N-1} ) to drive the N-1 th pixel (P_N-1), the data voltage changes by _{ΔV and thus} the N-1 _th data voltage (V _{data_N-1} ) may be reached and may have an _{N-1 th} slew rate SR _N-1 . A point in time that reaches the N- _1th data voltage V _{data_N-1} may be defined as the N- _1th saturation point SP _N-1 . The N-1th saturation point SP _N-1 is from the time after the scan signal of the gate driver connects the N-1th pixel P_N-1 to the data line to the N- _1th data voltage V _{data_N-1} It can mean the time it takes to get there.

Finally, when the buffer 340 outputs the N- _th data voltage (V _{data_N} ) to drive the N-th pixel (P_N), the data voltage changes by _ΔV to reach the N- _th data voltage (V _{data_N} ), and the N- _th slew rate It can have (SR _N ). A point in time that reaches the Nth data voltage V _{data_N} may be defined as the Nth saturation point SP _N. The Nth saturation point SP _N may mean a time taken for the scan signal of the gate driver to reach the Nth data voltage V _{data_N} after connecting the Nth pixel P_N to the data line.

Since the buffer 340 outputs the data voltage to the plurality of pixels P_1, P_2, ..., P_N-1, P_N using the same bias current, the first to N slew rates SR ₁ , SR ₂ , ..., SR _N-1 , SR _N ) may vary. For example, the first slew rate SR ₁ may be high, but the second slew rate SR ₂ may be lower than the first slew rate SR ₁ . A first data voltage (V _{data_1)} supplied to the pixel (P_1) may have a relatively short delay (delay) than the second data voltage (V _{data_2).} The delay may be caused by a resistance component and a capacitor component. The longer the delay, the lower the slew rate, and the shorter the delay, the higher the slew rate. The first data voltage (V _{data_1} ) passes through one resistor (R ₁ ) and one capacitor (C ₁ ), while the second data voltage (V _{data_2} ) _passes through two resistors (R ₁ , R ₂ ) and two It can pass through the capacitors C ₁ and C ₂ . Accordingly, the first and the delay for the data voltage (V _{data_1)} be shorter than the delay for the second data voltage (V _{data_2),} a first slew rate (SR ₁₎ therefore is greater than the second slew rate (SR ₂₎ I can. At the same time, the first saturation point SP ₁ may be shorter than the second saturation point SP ₂ according to the difference in the slew rate.

Likewise, the N-1 th slew rate SR _N-1 may be higher than the N th slew rate SR _N. Comparing the slew rates for all of the plurality of pixels P_1, P_2, ..., P_N-1, P_N, the first slew rate SR ₁ is the highest and the N-th slew rate SR _N is the lowest. have. Due to the delay caused by the resistance component and the capacitor component, the closer to the source driver, that is, the buffer 340, the higher the slew rate, and the farther away the slew rate may be. At the same time, the saturation point may be shorter as the source driver, that is, the closer to the buffer 340, and the saturation point may be longer as the distance from the slew rate difference.

On the other hand, when the buffer 340 drives a plurality of pixels (P_1, P_2, ..., P_N-1, P_N) collectively using the same bias current, each data voltage will reach within the gate-off point (GOP). I can. However, driving all of the data voltages with the same bias current may unnecessarily increase power by the bias current.

For example, in the case of the first pixel P_1, since a sufficient time can be secured for reaching the first data voltage V _{data_1} , the buffer 340 uses a weak bias current to generate the first data voltage V _{data_1.} ) Can be printed. However, in the case of the N-th pixel P_N, a sufficient time cannot be secured to reach the N- _th data voltage V _{data_N} , so a strong bias current needs to be used. This is because the further away from the buffer 340, the longer the delay due to the resistance component and the capacitor component. Therefore, making the bias current for driving a pixel near the buffer 340 such as the first pixel P_1 equal to the bias current for driving a pixel far from the buffer 340 such as the Nth pixel P_N is, In driving nearby pixels, power consumed by the buffer 340 may be unnecessarily increased. If a weak bias current is used for a pixel near the buffer 340 and a high bias current is used for a distant pixel, power consumption due to the bias current in the buffer 340 can be greatly reduced.

4 is a diagram illustrating power consumed by a bias current in a plurality of pixels connected on a data line.

Referring to FIG. 4, a plurality of pixels connected to one data increase and power consumption due to a bias current corresponding to each pixel are shown. Conventionally, the buffer 340 can output a data voltage corresponding to each pixel using the same bias current regardless of the position of each pixel on the data line. Accordingly, the buffer 340 may consume the same power when driving a pixel close to the source driver or driving a pixel far from the source driver.

For example, to drive the plurality of pixels P_1, P_2, ..., P_N-1, P_N, the power consumed by the buffer 340 due to the bias current may be the same regardless of the pixel position. Accordingly, the buffer 340 uses the first power P ₁ consumed by the bias current to drive the first pixel P_1 and the second power P ₂ consumed by the bias current to drive the second pixel P_2. ), the N-1th power P _N-1 consumed by the bias current to drive the N-1th pixel P_N-1 and the Nth power consumed by the bias current to drive the Nth pixel P_N Power (P _N ) may all be the same.

In addition, the total power (P _T ) consumed by one data line by the buffer 340 due to the bias current is the sum of the first to N powers (P ₁ , P ₂ ,...,P _N-1 ,P _N ). Can be the same as In this figure, the total power (P _T ) and the first to N powers (P ₁ , P ₂ ,..., P _N-1 , P _N ) are the distances from the power axis (POWER) and the buffer 340. It can be represented as a graph with an axis (DISTANCE).

5 is a diagram illustrating a slew rate applied to a plurality of pixels connected on a data line over time according to an exemplary embodiment.

Referring to FIG. 5, a plurality of pixels connected to one data increase and a slew rate corresponding to each pixel are shown according to an exemplary embodiment. The buffer 240 may output a data voltage corresponding to each pixel through bias currents having different strengths in consideration of the location of each pixel on the data line. Accordingly, the buffer 240 may output a data voltage using a weak bias current to a pixel close to the source driver, and may output a data voltage using a strong bias current to a pixel far from the source driver.

For example, the buffer 240 may output a data voltage using different bias currents to a plurality of pixels P_1, P_2, ..., P_N-1, P_N connected to one data line. In more detail, the buffer 240 may output a data voltage by using a bias current that increases from the first pixel P_1 to the Nth pixel P_N.

When the buffer 240 outputs data voltages to the plurality of pixels P_1, P_2, ..., P_N-1, P_N using different bias currents, the data voltage applied to the data line corresponding to each pixel The slew rate may be similar regardless of the distance from the buffer 240 to each pixel. Hereinafter, similarity may mean that the slew rate is not the same, but the deviation is within a certain range, and the certain range may be set in advance.

For example, if the buffer 240 sequentially outputs a data voltage for each pixel under the condition shown in FIG. 3, the data voltage is a turn-off voltage scan signal after each pixel is connected to the data line by the turn-on voltage scan signal of the gate driver. As a result, it may be output up to a point in time when each pixel is disconnected (gate-off point GOP).

When the buffer 240 outputs the first data voltage V _{data_1} using the first bias current to drive the first pixel P_1, the data voltage changes by _ΔV to reach the first data voltage V _{data_1} And may have a first slew rate SR ₁ .

Next, when the buffer 240 outputs the second data voltage V _{data_2} using the second bias current to drive the second pixel P_2, the data voltage changes by _{ΔV and} the second data voltage V _{data_2} And can have a second slew rate (SR ₂ ). The second bias current may be more than one bias current.

Thereafter, when the buffer 240 outputs the N-1 _th data voltage V _{data_N-1} using the N-1 _th bias current to drive the N-1 th pixel P_N-1, the data voltage is _ΔV . It may change to reach the N-1 _th data voltage V _{data_N-1} and have an N-1 _th slew rate SR _N-1 . The N-1 th bias current may be greater than the second bias current. Preferably, the N-1th bias current may be higher than the N-2th bias current for the N-2th pixel driven before the N-1th pixel P_N-1.

Finally, when the buffer 240 outputs the N- _th data voltage (V _{data_N} ) using the N-th bias current to drive the N-th pixel (P_N), the data voltage is changed by _{ΔV and} the N- _th data voltage (V _{data_N} ) And may have an Nth slew rate (SR _N ). The Nth bias current may be greater than the N-1th bias current.

Since the buffer 240 outputs a data voltage using a bias current that increases from the first pixel P_1 to the Nth pixel P_N, the first to second slew rates SR ₁ and SR ₂ may be similar. have. A first data voltage (V _{data_1)} supplied to the pixel (P_1) has a second can have a relatively short delay (delay) than the data voltage (V _{data_2),} but the first data voltage (V _{data_1)} for By adjusting the first bias current weakly and adjusting the second bias current for the second data voltage V _{data_2} hard, the first and second slew rates SR ₁ and SR ₂ may converge in a similar range. That is, through the trade off of the first and second slew rates SR ₁ and SR ₂ , the first slew rate SR ₁ is slightly lower than before, and the second slew rate SR ₂ is somewhat lower than before. It can be high. At the same time, as the slew rate converges, the first saturation point SP ₁ and the second saturation point SP ₂ may be similar to each other.

Furthermore, the change in the slew rate may extend from the first pixel P_1 to the Nth pixel P_N. When the strength of the current continuously changes from the first bias current to the Nth bias current, the first to N slew rates (SR ₁ , SR ₂ , ..., SR _N-1 , SR _N ) change to a new slew rate. can do. That is, the first to N slew rates SR ₁ , SR ₂ ,..., SR _N-1 and SR _N are mutually adjusted to converge to a new slew rate. At the same time, as the slew rate converges, the first to N saturation points (SP ₁ , SP ₂ , ..., SP _N-1 , SP _N ) may be similar to each other.

On the other hand, when the buffer 240 drives a plurality of pixels P_1, P_2, ..., P_N-1, P_N collectively using a differentially adjusted bias current, each data voltage is a gate-off point (GOP). ) Can be reached. In addition, driving each data voltage with a differentially adjusted bias current can reduce power due to the bias current.

For example, in the case of the first pixel P_1, not only a sufficient time may be secured to reach the first data voltage V _{data_1} , and the buffer 240 may be configured to use a relatively weak first bias current. 1 The data voltage V _{data_1} can be output. Since the buffer 240 uses a weak first bias current, the power consumed by the buffer 240 may be reduced accordingly. Even if the buffer 240 uses a strong bias current for the Nth pixel (P_N), the closer the pixel location is from the buffer 240, the more the buffer 240 uses a weak bias current, the total consumption of the buffer 240 Power can be reduced.

6 is a diagram illustrating power consumed by a bias current in a plurality of pixels connected on a data line according to an exemplary embodiment.

Referring to FIG. 6, a plurality of pixels connected to one data increase and power consumption due to a bias current corresponding to each pixel are illustrated according to an exemplary embodiment. The buffer 240 may output a data voltage corresponding to each pixel by using bias currents having different strengths in consideration of the location of each pixel on the data line. Accordingly, the buffer 240 may consume less power when driving a pixel close to the source driver, and may consume a lot of power when driving a pixel far from the source driver.

For example, in order to drive the plurality of pixels P_1, P_2, ..., P_N-1, P_N, the power consumed by the buffer 240 due to the bias current may vary depending on the pixel position. Preferably, the power consumed by the buffer 240 may increase as the pixels located farther from the buffer 240 are driven. The buffer 240 consumes the smallest power when driving the first pixel P_1 located on the data line closest to the buffer 240, and the N-th pixel P_N located on the data line farthest from the buffer 240 It can consume the most power when driving.

Therefore, the buffer 240 consumes the first power P ₁ by the bias current to drive the first pixel P_1 and the second power P ₂ to drive the second pixel P_2 by the bias current. ), the N-1th power P _N-1 consumed by the bias current to drive the N-1th pixel P_N-1 and the Nth power consumed by the bias current to drive the Nth pixel P_N Although the power P _N is different from each other, the first power P ₁ may be the smallest and the N-th power P _N may be the largest.

In addition, the total power (P _T ) consumed by one data line by the buffer 240 due to the bias current is the sum of the first to N powers (P ₁ , P ₂ , ..., P _N-1 , P _N ). Can be the same as In this figure, the total power (P _T ) and the first to N powers (P ₁ , P ₂ , ..., P _N-1 , P _N ) are the distances from the power axis (POWER) and the buffer 240. It can be represented as a graph with an axis (DISTANCE).

In FIG. 4, when the buffer 240 uses the same bias current to output data voltages for a plurality of pixels P_1, P_2, ..., P_N-1, P_N, the bias current in the buffer 240 The power consumption may increase. When the same bias current is used, the total power P _T may be represented by a rectangular area.

On the other hand, if the buffer 240 uses a differentially adjusted bias current to output data voltages for a plurality of pixels P_1, P_2, ..., P_N-1, P_N, as shown in this figure, the buffer Power consumption due to the bias current at 240 may be reduced. When using a bias current that continuously increases according to the pixel position, the total power P _T may be a right triangle region. Comparing the widths of the regions for the two cases, the total power (P _T ) can be reduced to about 1/2.

7 is a diagram illustrating a bias current used by a buffer to drive a plurality of pixels connected on a data line according to another exemplary embodiment.

Referring to FIG. 7, buffers 740-1 to 740-4 of the source driver according to another embodiment may output data voltages to a plurality of pixels connected to one data line using a bias current. Here, the buffers 740-1 to 740-4 may classify a plurality of pixels for each group, and differentially use a bias current for each group. The buffers 740-1 to 740-4 may use a bias current of the same intensity to output data voltages to a plurality of pixels included in a group. Also in this method, the buffers 740-1 to 740-4 may receive a bias current corresponding to each pixel from the bias control unit, and use the bias current to output a data voltage to each pixel. Hereinafter, it will be described as an example that the four buffers 740-1 to 740-4 respectively drive ten pixels connected to the four data lines DL_1 to DL_4.

Here, an area including one data line and a plurality of pixels connected to the one data line may be referred to as a channel. The channel may be a concept further including a buffer in charge of the one data line. In this drawing, P may represent a pixel, and CH1 to CH4 may represent a channel.

Also, the plurality of pixels may be located near or far from one buffer. The proximity of the pixel may mean that it is located close to the one buffer, and the distant location of the pixel may mean that the pixel is located away from the one buffer. The closer the pixel is to the buffer, the shorter the delay caused by the resistance component and the capacitor component, and the slew rate of the data voltage output to the pixel may be relatively high. On the other hand, as the pixel is further away from the buffer, the delay due to the resistance component and the capacitor component increases, and the slew rate of the data voltage output to the pixel may be relatively low. In this drawing, a point near the one buffer may be depicted as NEAR, and a point far from the one buffer may be depicted as FAR.

The buffers 740-1 to 740-4 may divide a plurality of pixels connected on one data line into groups, and may output data voltages using bias currents of different strengths for each group.

For example, the first buffer 740-1 may divide ten pixels connected to the first data line DL_1 into four groups. The first buffers 740-1 may be grouped into a first group by grouping three first buffers 740-1 in close order, and then grouped into two groups and divided into second to fourth groups. The first buffer 740-1 may use the first to fourth bias currents BIAS_1 to BIAS_4 to supply data voltages to the pixels of the first to fourth groups, respectively.

Here, the first to fourth bias currents BIAS_1 to BIAS_4 may have different strengths. Preferably, the further the group is located, the greater the intensity can be. Accordingly, the intensity may increase from the first bias current BIAS_1 to the fourth bias current BIAS_4. In this drawing, the intensity that increases from the first bias current BIAS_1 to the fourth bias current BIAS_4 may be shown as WEAK and STRONG.

In addition, the buffers 740-1 to 740-4 use bias currents of different intensity for each group, but bias currents of the same intensity may be used for a plurality of pixels included in a group.

For example, when the first buffer 740-1 outputs data voltages for three pixels of the first group, the first buffer 740-1 may use the first bias current BIAS_1. The three pixels of the first group may be driven by a bias current of the same intensity. However, due to the difference in position or distance, the intensity of the bias current for the three pixels of the first group is smaller than that of the pixels of the other group.

Like the first buffer 740-1, the second to fourth buffers 740-2 to 740-4 may also classify 10 pixels connected to the second to fourth data lines DL_2 to DL_4 by group. The second to fourth buffers 740-2 to 740-4 may output data voltages using bias currents having different strengths for each group. In addition, the second to fourth buffers 740-2 to 740-4 may use a bias current of the same intensity for a plurality of pixels included in a group.

Even if a plurality of pixels of one data line are divided into groups and driven with bias currents having different intensities, the slew rate of each pixel may be within a preset similar range. That is, times when the data voltage is formed in each of the pixels may be within a preset similar range.

Here, that the slew rate or the formation time of the data voltage is within the similar range means that each pixel is connected by the turn-off voltage scan signal after the data voltage is connected to the data line by the turn-on voltage scan signal of the gate driver. This may mean that it can be completely output until the time it is released (gate off point).

Meanwhile, a pixel in which the intensity of the bias current is changed may be defined as a boundary pixel. When one buffer outputs data voltages line by line to the pixels of one data line, the boundary pixels may be driven through a bias current having an intensity different from that of the previous pixel. So, one border pixel can be included in each group. For example, the boundary pixel of the second group is a pixel first driven by the second bias current BIAS_2 in the second group, and may be a fourth pixel among 10 pixels of the first data line DL_1.

8 is a diagram showing a dim phenomenon according to the setting of a bias current.

Referring to FIG. 8, a dim phenomenon that occurs when the intensity of a bias current is fixedly changed at the same position is illustrated.

As described above, when the buffer of the source driver groups a plurality of pixels and uses a bias current having a different intensity depending on the group, the intensity of the bias current can be continuously changed only at a certain position, and this change occurs in the boundary pixels. I can.

For example, the first bias current BIAS_1 may be used in the first channel CH1, and the second bias current BIAS_2 having an intensity higher than the first bias current BIAS_1 may be used in the boundary pixels of the second group. have. Next, the second bias current BIAS_2 may be used, and a third bias current BIAS_3 having a higher intensity than the second bias current BIAS_2 may be used in the boundary pixels of the third group. Finally, the fourth bias current BIAS_4 having the highest intensity may be used in the pixels of the group furthest from the buffer.

When a boundary pixel in which the intensity of the bias current changes in one channel, that is, the setting position of the bias current intensity is unchanged, a boundary may be formed at or around the boundary pixel. Furthermore, if this boundary is maintained for each frame, this boundary forms a block-dim. The block dim may be formed along the boundary pixels over the entire panel. In this drawing, the block dim is shown by a thick solid line. Block dim is a representative example of image quality deterioration, and it is necessary to reduce the power consumption of the source driver by maintaining the same slew rate, and to improve block dim as well.

9 is a diagram illustrating an improved dim phenomenon according to a setting of a bias current according to another embodiment.

Referring to FIG. 9, in order to maintain the same slew rate according to another exemplary embodiment, the intensity of a bias current may be differentially adjusted, and the block dim may be further improved. When the setting position of the bias current intensity, that is, the boundary pixel is changed every frame, the block dim can be improved.

The bias control unit may adjust the bias current so that the pixel whose intensity of the bias current changes is changed every frame. The bias control unit generates a bias current for driving each pixel every frame and transmits it to the buffers 940-1 to 940-4, and the buffers 940-1 to 940-4 to each pixel using the bias current. Data voltage can be output. Accordingly, the boundary pixels in which the intensity of the bias current is changed may vary for each frame.

For example, the bias controller may adjust the strength of the bias current based on the dotted line in the first frame, and may adjust the strength of the bias current based on the solid line in the second frame.

Specifically, in the first frame, the bias controller may generate a second bias current BIAS_2, which is greater than the first bias current BIAS_1, for the boundary pixel located on the dotted line, and transmit it to the first buffer 940-1. The first buffer 940-1 may output the data voltage to the second group including the boundary pixels located on the dotted line by using the second bias current BIAS_2. In the subsequent second frame, the bias controller may generate a second bias current BIAS_2, which is greater than the first bias current BIAS_1, for the boundary pixels located on the solid line, and transmit the generated second bias current BIAS_2 to the first buffer 940-1. The first buffer 940-1 may output the data voltage to the second group including the boundary pixels positioned on the solid line by using the second bias current BIAS_2.

Here, the boundary pixels may be determined randomly or may be determined through certain rules. Accordingly, the position at which the intensity of the bias current is changed may be changed in every frame arbitrarily or according to a certain rule.

In addition, boundary pixels between adjacent channels may be located on the same line. For example, in the second frame, a boundary pixel at which the second bias current BIAS_2 starts to be used in the first channel CH1 and a boundary at which the second bias current BIAS_2 starts to be used in the third channel CH3 Pixels can be located on the same horizontal line. In this drawing, the boundary pixel of the first channel CH1 and the boundary pixel of the third channel CH3 are located on the same horizontal line.

Further, boundary pixels between adjacent channels may be located on different lines. For example, in the second frame, a boundary pixel at which the second bias current BIAS_2 starts to be used in the first channel CH1 and the boundary at which the second bias current BIAS_2 starts to be used in the second channel CH2 Pixels can be located on different horizontal lines. In this drawing, the boundary pixel of the first channel CH1 and the boundary pixel of the second channel CH2 are located on different horizontal lines.

Accordingly, the position of the boundary pixel, that is, the position of setting the intensity of the bias current, may be different for each frame and may be different between adjacent channels. Since the setting position of the bias current intensity is changed every frame, the dim phenomenon can be alleviated compared to the case where the setting position is fixed.

Claims (16)

A buffer for outputting a plurality of data voltages using a bias current to drive a plurality of pixels connected to the data line; And
A bias control unit for adjusting an intensity of the bias current according to a position of each pixel connected to the data line,
The bias control unit is a source driver configured to differently determine a pixel location for adjusting the intensity of the bias current for each frame. The method of claim 1,
The bias control unit is a source driver that adjusts the bias current to a first intensity for a first group pixel among the plurality of pixels, and adjusts the bias current to a second intensity for a second group pixel of the plurality of pixels. . The method of claim 2,
The second group pixel is located farther than the first group pixel on the data line,
The bias control unit is a source driver that adjusts the second intensity to be stronger than the first intensity. The method of claim 2,
The second group pixel includes a boundary pixel in which the intensity of the bias current changes to the second intensity,
The bias control unit is a source driver that determines the boundary pixels arbitrarily or by a predetermined rule. The method of claim 1,
A source driver corresponding to a time when a data voltage is formed in the first group pixel and a time when a data voltage is formed in the second group pixel is within a preset similar range. The method of claim 1,
The bias control unit is a source driver for receiving a bias control signal including position data of each pixel for adjusting the intensity of the bias current. The method of claim 1,
The bias control unit is a source driver for receiving a bias control signal including timing data for adjusting the intensity of the bias current. A buffer for outputting a plurality of data voltages using a bias current to drive a plurality of pixels included in the plurality of channels; And
Each channel includes a bias control unit for adjusting the intensity of the bias current according to the position of each pixel,
The bias control unit adjusts the strength of the bias current for the boundary pixels at different positions for each frame,
The boundary pixels are determined differently for each frame, but are determined to be located on different lines between adjacent channels. The method of claim 8,
The bias control unit adjusts the intensity of the bias current to the strongest for driving the pixel located farthest from the plurality of pixels, and the intensity of the bias current to the weakest for driving the pixel located closest to the plurality of pixels. Source driver to adjust. The method of claim 9,
A source driver corresponding to a time when a data voltage is formed in the furthest pixel and a time when a data voltage is formed in the closest pixel are within a preset similarity range. The method of claim 8,
The bias control unit divides the plurality of pixels into a plurality of groups and adjusts the intensity of the bias current for each group. The method of claim 11,
The bias control unit adjusts the intensity of the bias current most to drive the group located farthest from among the plurality of groups, and adjusts the intensity of the bias current to drive the group located closest to the group. Source driver to adjust weakly. The method of claim 12,
A source driver corresponding to a time when a data voltage is formed in the farthest group and a time when a data voltage is formed in the nearest group is within a preset similar range. The Mth data voltage for the Mth (M is a natural number greater than 1) pixel connected to the data line is output using the Mth bias current, and N (N is a natural number greater than M+1) connected to the data line An Nth data voltage for a pixel is output using an Nth bias current that is greater than the Mth bias current, consumes the Mth power generated by the Mth bias current, and is generated by the Nth bias current A buffer that consumes more Nth power than the Mth power; And
And a bias control unit generating the M-th bias current and the N-th bias current and supplying it to the buffer,
The bias control unit is a source driver that determines the M-th pixel and the N-th pixel differently for each frame. The method of claim 14,
The buffer may include a first mode in which the Mth data voltage is output using the Mth bias current and the Nth data voltage is output using the Nth bias current, or the Mth data voltage and the Mth A source driver that operates according to the second mode that outputs the +1 data voltage using a bias current of the same intensity. The method of claim 14,
The bias control unit is a source driver that generates the M th bias current for the M th group pixel including the M th pixel, and generates the N th bias current for the N th group pixel including the N th pixel .

Images