KR20200081956A - Electroluminescence display apparatus - Google Patents

Abstract

The objective of the present invention is to provide an electroluminescent display device that outputs the same image in a frame period and a last frame period among frame periods included in a preset period. The electroluminescent display device comprises: a light emitting display panel; a gate driver; a data driver; and a control part.

Description

Electroluminescent display device {ELECTROLUMINESCENCE DISPLAY APPARATUS}

The present invention relates to an electroluminescent display device driven at low speed.

An electroluminescent display device using a light emitting element such as an organic light emitting diode can be driven by various driving frequencies.

For example, an electroluminescence display driven at 60 Hz can output 60 images for 1 second.

When the screen output from the electroluminescence display device by the images is a still image or a low-speed video that is changed to a low speed, the electroluminescence display device outputs one image only in one frame period of a period of 1 second, In the remaining periods, that is, 59 frame periods, an image may not be output. By this method, a still image or a low-speed movie may be displayed through the electroluminescent display device.

However, in the driving method as described above, when a dark screen such as 0 gray is switched to a screen having a high gray, that is, a bright screen, a defect is generated in which luminance corresponding to the bright screen is not normally output. .

An object of the present invention proposed to solve the above-described problem is to provide an electroluminescent display device that outputs the same image in a first frame period and a last frame period among frame periods included in a preset period.

An electroluminescent display device according to the present invention for achieving the above-described technical problem, a light emitting display panel provided with pixels including light emitting elements and pixel driving circuits, the gate signals to the gate lines provided in the light emitting display panel It includes a gate driver to supply, a data driver to supply data voltages to data lines provided on the light emitting display panel, and a control unit to control the gate driver and the gate driver. The control unit controls the gate driver and the data driver such that the same image is output through the light emitting display panel in the first frame period and the nth frame period among the n frame periods included in the preset period.

According to the present invention, even if a dark image is converted into a bright image, a bright image having the same normal brightness can be output.

1 is an exemplary view showing the configuration of an electroluminescent display device according to the present invention.
2 is an exemplary view showing a configuration of a pixel applied to an electroluminescent display device according to the present invention.
3 is an exemplary view showing a configuration of a control unit applied to the electroluminescent display device according to the present invention.
4 is an exemplary view showing a configuration of a gate driver applied to the electroluminescent display device according to the present invention.
6 is an exemplary view showing frame periods during which an image is output from the electroluminescent display device according to the present invention.
7 is an exemplary view showing a light emitting display panel with the number 1 displayed on the electroluminescent display device according to the present invention.
8 is an exemplary view showing a light emitting display panel with the number 2 displayed on the electroluminescent display device according to the present invention.
9 is a graph for explaining the effect of the electroluminescent display device according to the present invention.
10 is another exemplary view showing frame periods during which the electroluminescent display device according to the present invention outputs an image.

Advantages and features of the present invention, and methods for achieving them will be clarified with reference to embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the present embodiments make the disclosure of the present invention complete, and have ordinary knowledge in the technical field to which the present invention pertains. It is provided to fully inform the person of the scope of the invention, and the invention is only defined by the scope of the claims.

It should be noted that in this specification, when adding reference numerals to components of each drawing, the same components have the same number as possible, even if they are displayed on different drawings.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are exemplary and the present invention is not limited to the illustrated matters. The same reference numerals refer to the same components throughout the specification. In addition, in the description of the present invention, when it is determined that detailed descriptions of related known technologies may unnecessarily obscure the subject matter of the present invention, detailed descriptions thereof will be omitted. When'include','have','consist of', etc. mentioned in the specification are used, other parts may be added unless'~man' is used. When a component is expressed as a singular number, the plural number is included unless otherwise specified.

In interpreting the components, it is interpreted as including the error range even if there is no explicit description.

In the case of the description of the positional relationship, for example, when the positional relationship of two parts is described as'~top','~upper','~bottom','~side', etc.,'right' Alternatively, one or more other parts may be located between the two parts unless'direct' is used.

In the case of the description of the time relationship, for example,'after','following','~after','~before', etc., when the temporal sequential relationship is described,'right' or'direct' It may also include cases that are not continuous unless it is used.

It should be understood that the term “at least one” includes all possible combinations from one or more related items. For example, the meaning of'at least one of the first item, the second item, and the third item' means 2 of the first item, the second item, and the third item, as well as the first item, the second item, or the third item, respectively. Any combination of items that can be presented from more than one dog.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

Each of the features of the various embodiments of the present invention may be partially or wholly combined or combined with each other, technically various interlocking and driving may be possible, and each of the embodiments may be independently performed with respect to each other or may be implemented together in an associative relationship. It might be.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an exemplary view showing a configuration of an electroluminescent display device according to the present invention, FIG. 2 is an exemplary view showing a configuration of a pixel applied to an electroluminescent display device according to the present invention, and FIG. 3 is an electric field according to the present invention It is an exemplary view showing the configuration of a control unit applied to a light emitting display device.

The electroluminescent display device according to the present invention, as shown in Figures 1 and 2, the light-emitting display panel 100 is provided with pixels 110 including light-emitting elements (ED) and pixel driving circuits (PDC) , A gate driver 200 that supplies gate signals to the gate lines GL1 to GLg provided in the light emitting display panel 100, and data lines DL1 to Dld provided in the light emitting display panel 100. A data driver 300 that supplies data voltages Vdata, a control unit 400 that controls the gate driver 200 and the gate driver 300, and the gate driver 200, the control unit 400, and the data It includes a power supply for supplying power to the driver 300.

In the following, the components are described sequentially.

First, the light emitting display panel 100 according to the present invention includes the display area 120 and the display area 120 including pixels 110 including the light emitting elements ED and the pixel driving circuits PDC. 120) includes a non-display area 130 surrounding the area.

As illustrated in FIG. 2, the light emitting display panel 100 includes pixels 110 including the light emitting device ED and the pixel driving circuit PDC. In addition, signal lines for defining driving regions of the pixel driving circuit PDC and defining pixel regions in which the pixels 110 are formed are formed in the light emitting display panel 100.

The light emitting element ED includes a first electrode, a light emitting layer provided on the first electrode, and a second electrode provided on the light emitting layer. The light emitting layer may include any one of a blue light emitting part, a green light emitting part, and a red light emitting part for emitting light having a color corresponding to a color set in the pixel 110. The emission layer may include any one of an organic emission layer, an inorganic emission layer, and a quantum dot emission layer, or may include a stacked or mixed structure of the organic emission layer (or the inorganic emission layer) and the quantum dot emission layer.

The signal lines may include a gate line GL, a sensing pulse line SPL, a data line DL, a sensing line SL, a first driving power line PLA and a second driving power line PLB. Can.

The gate lines GL are formed side by side to have a constant distance along the second direction of the light emitting display panel 100, for example, a horizontal direction.

The sensing pulse lines SPL may be formed at regular intervals to be parallel to the gate lines GL. A sensing pulse SP is supplied to the sensing pulse lines SPL.

The data lines DL have a constant interval along a first direction, for example, a vertical direction, of the light emitting display panel 100 to intersect with the gate lines GL and the sensing pulse lines SPL. Can be formed side by side. However, the arrangement structure of the data line DL and the gate line GL may be variously changed.

The sensing line SL may be formed at regular intervals to be parallel to the data lines DL. However, the present invention is not limited to this. For example, at least three of the pixels 110 may form one unit pixel, and in this case, one of the sensing lines SL may be formed in the unit pixel.

The first driving power line PLA may be formed at regular intervals to be parallel to the data line DL and the sensing line SL. The first driving power line PLA is connected to the power supply and supplies the first driving power EVDD supplied from the power supply to each pixel 110.

The second driving power lines PLBs supply the second driving power EVSS supplied from the power supply unit to each pixel 110.

The pixel driving circuit PDC includes a driving transistor Tdr for controlling the current I flowing through the light emitting element ED, the data line DL, and the driving transistor Tdr and the gate line GL. A switching transistor Tsw1 connected to, a sensing transistor Tsw2 and a capacitor Cst connected between the light emitting element and the sensing line SL may be provided.

That is, the pixel driving circuit PDC may include the switching transistor Tsw1, the driving transistor Tdr, and the capacitor Cst, and the current flowing through the light emitting element ED using the components ( The size of I) can be controlled, and according to the size of the current I, the brightness of light output from the light emitting element ED can be controlled.

In addition, transistors for external compensation or internal compensation may be further provided in the pixel driving circuit PDC provided in each of the pixels 110. The sensing transistor Tsw2 may be further provided in the pixel driving circuit PDC, for example, for the external compensation.

That is, the pixel driving circuit (PDC) may be changed into various structures to perform internal compensation or external compensation, and the method of driving the pixel driving circuit (PDC) may also be variously changed.

The external compensation calculates a change amount of a threshold voltage or mobility of the driving transistor Tdr formed in the pixel 110, and calculates a size of data voltages Vdata supplied to the pixel according to the change amount. It means variable. Therefore, the structure of the pixel 110 may be changed in various forms so that a change in threshold voltage or mobility of the driving transistor Tdr can be calculated.

The internal compensation means that the current transmitted to the light emitting element of the driving transistor Tdr formed in the pixel 110 is not affected by the threshold voltage of the driving transistor Tdr. To this end, in the formula for calculating the current I, the structure and driving method of the pixel may be changed in various forms so that the threshold voltage can be removed.

The display area 120 of the light emitting display panel 100 refers to a part in which an image is output by the pixels 110, and the non-display area 130 means a part in which an image is not output. The non-display area 130 is provided outside the display area 120.

Second, the gate driver 200 supplies gate signals to the pixel driving circuits (PDCs).

The gate driver 200 is provided in the non-display area 130 and may be manufactured together with the pixel driving circuits PDC when manufacturing the pixel driving circuits PDC.

That is, the gate driver 200 may be directly embedded in the non-display area 130 of the light emitting display panel 100 by using a gate in panel (GIP) method.

However, the gate driver 200 is formed to be independent of the light emitting display panel 100, so that the light emitting display panel is provided through a tape carrier package (TCP), a chip on film (COF), or a flexible printed circuit board (FPCB). It can be connected to (100).

The gate driver 200 includes stages connected to the gate lines GL1 to GLg provided in the light emitting display panel 100.

The gate driver 200 uses the gate control signals GCS transmitted from the control unit 400 to gate-on signals GP1 to gate lines GL1 to GLg provided in the light emitting display panel 100. ). A plurality of gate clocks may be included in the gate control signals GCS.

Here, the gate-on signal GP means a signal that can turn on the switching transistor Tsw1 connected to the gate lines GL1 to GLg. The signal capable of turning off the switching transistor Tsw1 is called a gate-off signal. The gate-on signal GP and the gate-off signal are collectively referred to as a gate signal.

Gate clock lines for supplying the gate clocks to the gate driver 200 are provided in the non-display area 130.

The configuration and function of the gate driver 200 will be described in detail below with reference to FIGS. 4 and 5.

Third, the power supply unit supplies power to the gate driver 200, the data driver 300 and the control unit 400.

Fourth, the data driver 300 converts the image data Data transmitted from the controller 400 into data voltages Vdata, and then converts the data voltages Vdata into the data lines DL1 to DLd. To supply.

Fifth, the controller 400 uses the timing synchronization signal (TSS) input from an external system to drive the gate control signal (GCS) and the data driver (300) to control the driving of the gate driver (200). Each data control signal (DCS) for controlling is generated.

In addition, the control unit 400 converts the input image data Ri, Gi, Bi input from the external system into image data, and converts the image data to the data driver 300. send.

In order to perform the above-described function, the control unit 400, as illustrated in FIG. 3, uses input timing data transmitted from the external system using a timing synchronization signal (TSS) transmitted from the external system. The data control unit 430 for rearranging the fields Ri, Gi and Bi to supply the rearranged image data to the data driver 300, and the gate control signal GCS by using the timing synchronization signal TSS. And a control signal generator 420 for generating the data control signal (DCS), the timing synchronization signal (TSS) transmitted from the external system and the input image data (Ri, Gi, Bi) arranged in the data. An input unit 410 distributed to the unit 430 and the control signal generation unit 420, and the image data generated by the data alignment unit and the control signals generated by the control signal generation unit (DCS, GCS) ) May include an output unit 440 for outputting the data driver 300 or the gate driver 200.

In addition, the control unit 400 may further include a storage unit 450 for storing at least one of information necessary for various sensing, the input image data, and the image data. However, the storage unit 450 may be configured independently of the control unit 400.

The gate control signal GCS may include gate clocks used to generate the gate signals.

For external compensation, the control unit 400 may generate compensation values for the external compensation by using sensing data Sdata received from the pixel driver circuits PDC through the data driver 300. .

In addition, the controller 400 generates various control signals to control the gate driver 200 and the data driver 300 so that the operation for the internal compensation can be performed, and the gate driver 200 is generated. And the data driver 300.

In particular, the control unit 400 may output the images through the light emitting display panel 100 in the first frame period and the nth frame period among n frame periods included in the preset period, so that the gate driver 200 ) And the data driver 300.

The gate driver 200 may be controlled by the gate control signal GCS generated by the control signal generator 420. To this end, the gate control signal GCS may include gate clocks and a gate start signal.

The gate clocks and the gate start signal will be described in detail below with reference to FIGS. 4 and 5.

The data driver 300 may be controlled by the data control signal DCS generated by the control signal generator 420. The data control signal DCS may include a data enable signal that controls the timing at which the data voltages Vdata are output to the data lines DL1 to DLd.

When the control unit 400 does not transmit the image data Data to the data driver 300, data voltages are not output to the data lines DL1 to DLd. Accordingly, the data driver 300 may be controlled by the image data.

In the following description, the frame period means a period in which one image is output. That is, one image is output through the light emitting display panel 100 in one frame period (one frame period). During a plurality of frame periods, different images are output through the light emitting display panel 100, so that a video can be expressed. When the same images are output through the light emitting display panel 100 in a plurality of frame periods, a still image may be expressed.

The image means one image output through all pixels of the light emitting display panel 100 in one frame period. That is, in one frame period, one light is output from each pixel 110, and light output from the pixels 110 of the light emitting display panel 100 gather to form one image.

In the following description, when the order of the frame periods is required, the first frame period and the second frame period are used, and when the number of frame periods is required, one frame period and two frame periods, 60 frames Period etc. are used.

The present invention uses a variable refresh rate (VRR) mode (hereinafter simply referred to as VRR) mode. The VRR mode means, for example, a mode in which an image is output only in the first frame period among the preset frame periods and an image is not output during the remaining frame periods.

More specifically, when the electroluminescent display device is driven at 60 Hz, generally, 1 second includes 60 frame periods, and the electroluminescent display device displays 60 images for 1 second during the light emitting display panel ( 100).

However, in the electroluminescent display using the VRR mode, only one image is output through the light emitting display panel 100 during the first frame period for 1 second, and in the remaining 59 frame periods, the light emitting display panel New images are not output through (100). That is, in the 59 frame periods, the image output in the first frame period is continuously output, and a new image is not output.

The electroluminescent display device using the VRR mode may be used, for example, in an electronic watch combined with a smart phone and a watch, or may be used in an advertising monitor that continuously outputs the same advertising phrase. That is, the electroluminescent display device according to the present invention can be applied to various types of electronic devices, for example, electronic watches and advertising monitors.

In particular, the electronic clock expresses a change in time in numbers in units of 1 second. Therefore, the electronic clock can achieve its purpose with only one image output in the first frame period for one second.

However, in the conventional electroluminescence display using the VRR mode, since only one image is output per second, when another image is output after 1 second, there is a problem in that the luminance of the image cannot be normally output. have.

To solve this problem, the present invention outputs an image in a first frame period and a last frame period among frame periods included in a preset period, for example, 1 second.

An electronic device to which the electroluminescent display device according to the present invention described below is applied may be an electronic watch.

In this case, the system for controlling the function of the electronic clock is hereinafter referred to as an external system, and the electroluminescent display device receives input image data and timing signals from the external system.

However, the present invention described below can be applied to various electronic devices using the VRR mode in addition to the electronic clock, as described above.

In addition, hereinafter, the preset period is set to 1 second, and an electroluminescent display device that outputs 60 images for 1 second is described as an example of the present invention. That is, in the electroluminescent display device described below, 1 second may be divided into 60 frame periods.

4 is an exemplary view showing a configuration of a gate driver applied to the electroluminescent display device according to the present invention.

The gate driver 200 applied to the electroluminescent display device according to the present invention includes stages 210 connected to the gate lines GL1 to GLg provided in the light emitting display panel 100.

Each of the stages 210 supplies the gate signal to a gate line GL connected to it.

As described above, the gate signal includes a gate-on signal GP turning on the switching transistor Tsw1 connected to the gate line GL and a gate-off signal turning off the switching transistor Tsw1. do.

That is, the gate driver 200 sequentially supplies the gate-on signal GP to the gate lines GL1 to GLg by using the gate control signals GCS transmitted from the control unit 400. .

The order in which the gate-on signal GP is output to the gate lines may be variously changed.

The gate driver 200 may be driven by a gate start signal included in the gate control signal GCS.

For example, the first stage (Stage 1) of the stage 210 shown in FIG. 4 is a gate start signal (hereinafter, simply referred to as a controller gate start signal) transmitted from the control unit 400 (GVST). The driving may be started to output the first gate-on signal GP1.

The first gate-on signal GP1 may be used as a gate start signal VST of the second stage Stage2, for example, as illustrated in FIG. 4, or a gate of the m-th stage. It can also be used as a start signal (VST).

Here, m may be a natural number greater than 2 or an integer less than 1.

For example, the first gate-on signal GP1 output from the first stage (Stage 1) is supplied to a third stage, a fourth stage, a fifth stage, and the like, and a gate start signal of any one of the stages ( VST).

In addition, the first gate-on signal GP1 output from the first stage (Stage 1) is supplied to any one of the stages provided at the front end of the first stage (Stage 1), and any one of the stages It can be used as a gate start signal (VST).

That is, the gate-on signal GP output from one of the stages 210 is input to at least one of the stages provided at the front end or the rear end of the one of the stages 210, and is used as the gate start signal VST Can be.

Each of the stages 210 may generate a gate-on signal using at least one of gate clocks included in the gate control signal GCS transmitted from the control unit 400.

For example, as illustrated in FIG. 4, when four gate clocks CLK1 to CLK4 are supplied from the control unit 400, each of the stages 210 gates using at least one gate clock. An on signal GP can be generated.

However, the number of gate clocks supplied to the gate driver 200, the number of gate clocks supplied to the stages 210, the level of the gate clocks, and the like are the configuration of the gate driver 200 and the stage Depending on the configuration of the 210, it can be variously changed.

5 is an exemplary view showing a configuration of a stage applied to a light emitting display panel according to the present invention. In the following description, contents identical or similar to those described with reference to FIGS. 1 to 4 are omitted or simply described.

As described above, the electroluminescent display device according to the present invention includes the gate driver 200, and the gate driver 200 includes the gate lines GL1 provided in the light emitting display panel 100. to GLg).

Each of the stages 210 supplies the gate signal Vout to a gate line GL connected to it. The gate signal Vout includes the gate-on signal GP and the gate-off signal Goff, as described above.

To this end, each of the stages 210, as shown in Figure 5, the gate clock (CLK) of any one of the gate clocks (CLK1 to CLK4) transmitted from the control unit 400, the gate-on signal As a gate-on transistor (Ton) for output to the gate line (GL), a gate for outputting the gate-off signal (Goff) in a period other than the period during which the gate-on signal (GP) is output during one frame period It includes an off transistor (Toff) and an on-off signal generator 211.

When the switching transistor Tsw1 connected to the stage 210 is to be turned on, the on-off signal generating unit 211 is the gate of the gate-on transistor Ton, that is, the gate to the Q node Q. The turn-on control signal VD for turning on the on transistor Ton is transmitted, and when the switching transistor Tsw1 should be turned off, to the gate of the gate-off transistor Toff, that is, the Qb node Qb. A turn-off control signal for turning on the gate-off transistor Toff is transmitted.

To this end, the on-off signal generator 211 is supplied with a turn-on control signal VD capable of turning on the gate-on transistor Ton on the first terminal, and the second terminal is the Q node Q ) Is connected to the gate, and when the control signal switching transistor Tst to which the gate start signal Vst is supplied and the turn-on control signal VD are supplied to the Q node Q, the Qb node Qb The furnace may include an inverter IN for supplying a turn-off control signal opposite to the turn-on control signal VD.

That is, the inverter IN may invert the turn-on control signal VD to generate the turn-off control signal, and the turn-off control signal is generated through the gate-off transistor through the Qb node Qb. Toff).

In addition, the on-off signal generator 211 may include a reset transistor Trs for supplying a reset voltage VSS2 for resetting the Q node Q to the Q node Q. The reset transistor Trs may be turned on by a reset signal Rest supplied to the gate of the reset transistor Trs.

However, the configuration of the on-off signal generator 211 illustrated in FIG. 5 is presented as an example of the present invention to describe the overall configuration of the stage 210 applied to the present invention.

Therefore, the configuration of the on-off signal generator 211 is not limited to the form illustrated in FIG. 5, and thus, the on-off signal generator 211 is configured in various forms in addition to the form illustrated in FIG. 5. Can be.

Hereinafter, a driving method of the electroluminescent display device according to the present invention will be described in detail with reference to FIGS. 6 to 9.

6 is an exemplary view showing frame periods during which an image is output from the electroluminescent display device according to the present invention, and FIG. 7 is an exemplary view showing a light emitting display panel in which the number 1 is displayed in the electroluminescent display device according to the present invention. 8 is an exemplary view showing a light emitting display panel in which the number 2 is displayed in the electroluminescent display device according to the present invention, and FIG. 9 is a graph for explaining the effect of the electroluminescent display device according to the present invention.

In the following description, as shown in FIGS. 7 and 8, an electroluminescent display device in which numbers are displayed is described as an example of the present invention.

In addition, hereinafter, a preset period is set to 1 second, and an electroluminescent display device capable of outputting 60 images for 1 second is described as an example of the present invention. That is, in the electroluminescent display device described below, 1 second may be divided into 60 frame periods.

In this case, the control unit 400 may output the same images through the light emitting display panel in the first frame period and the nth frame period among n frame periods included in the preset period, so that the gate driver 200 ) And the data driver 300.

That is, the controller 400, the gate driver 200 and the so that the same image is output through the light emitting display panel in the first frame period and the 60th frame period of the 60 frame periods included in 1 second The data driver 300 can be controlled.

First, the control unit 400 supplies a gate start signal to the gate driver 200 in the first frame period, that is, the control unit gate start signal GVST. Accordingly, the stages 210 of the gate driver 200 start driving.

When the stages 210 are driven, the gate-on signals GP output from the stages 210 are sequentially supplied to the gate lines GL1 to GLg.

In this case, the gate-on signal GP output from one stage 210 is supplied to the gate start signal VST to another stage 210 to drive the other stage.

Also, in the first frame period, the control unit 400 supplies image data Data to be output in the first frame period to the data driver 300.

For example, when input image data Ri, Gi, Bi for the number '1' is input from the external system, the input image data Ri, Gi, Bi are converted into the image data Data. Convert, and supply the image data (Data) to the data driver 300.

The data driver 300 converts the image data Data into data voltages Vdata, and while the gate-on signal GP is supplied to one gate line GL, the data lines DL1 to DLd) to supply the data voltages Vdata.

Accordingly, in the light emitting display panel 100, an image as illustrated in FIG. 7, that is, the number '1' is displayed. In this case, the area indicated by the scale in FIG. 7 is only shown for explanation of the present invention, and is not directly displayed on the light emitting display panel 100.

Next, the control unit 400, a gate start signal to the gate driver 200, that is, the control unit from the second frame period to the n-1 frame period, for example, from the second frame period to the 59th frame period The gate start signal GVST is not supplied.

Accordingly, the gate driver 200 is not driven, and therefore, a gate-on signal GP is not output to the gate lines GL1 to GLg. Accordingly, even though data voltages Vdata are supplied from the data driver 300 to the data lines DL1 to DLd, no light is output from the pixels 110, and accordingly, the light emitting display panel 100 ), no video is output.

That is, a new image is not output from the light emitting display panel 100 during the n-1 frame period from the second frame period.

However, in the first frame period, by the data voltages Vdata charged in the capacitors Cst provided in the pixel driving circuits PDC through the data lines DL1 to DLd, the The light emitting devices ED may continuously output light from the first frame period to the n-1 frame period.

Accordingly, from the first frame period to the n-1th frame period, the image as illustrated in FIG. 7, that is, the number '1' may be continuously output from the light emitting display panel 100.

In this case, the control unit 400 may not supply image data Data to the data driver 300 during the n-1 frame period from the second frame period. That is, since new images are not output from the second frame period to the n-1 frame period, the control unit 400 displays the image data Data from the first frame period to the n-1 frame period. It may not be supplied to the data driver 300.

Next, the control unit 400 supplies the gate start signal to the gate driver 200 again during the n-th frame period. For example, the control unit 400 supplies the control unit gate start signal GVST to the gate driver 200 during the 60th frame period.

Accordingly, the gate driver 200 starts driving as described above.

In this case, the gate-on signal GP output from one stage 210 is input as the gate start signal VST to another stage 210, and accordingly, the stages 210 are the gate lines The gate-on signal GP is sequentially output as (GL1 to GLg).

In addition, the control unit 400 supplies the image data Data output in the first frame period to the data driver 300 during the n-th frame period, for example, the 60th frame period.

For example, since the number '1' was output to the light emitting display panel 100 during the first frame period, the control unit 400 displays the image data Data corresponding to the number '1' to the data driver ( 300).

The data driver 300 converts the image data Data into data voltages Vdata, and while the gate-on signal GP is supplied to one gate line GL, the data lines DL1 to DLd) to supply the data voltages Vdata.

Accordingly, in the light emitting display panel 100, the image as illustrated in FIG. 7, that is, the number '1' is displayed once again.

Finally, when the first frame period to the 60th frame period have elapsed through the above processes, another 1 second starts, and thus, another first frame period included in another 1 second starts.

When another first frame period included in another 1 second starts, the control unit 400 generates a gate start signal to the gate driver 200 in the first frame period, that is, the control unit gate start signal. (GVST).

Accordingly, the gate driver 200 starts driving as described above.

In this case, the gate-on signal GP output from one stage 210 is input as the gate start signal VST to another stage 210, and accordingly, the stages 210 are the gate lines The gate-on signal GP is sequentially output as (GL1 to GLg).

In addition, in the first frame period, the controller 400 supplies image data Data to be output in the first frame period to the data driver 300.

For example, when input image data (Ri, Gi, Bi) for the number '2' to be output in the first frame period is input from the external system, the control unit 400 receives the input image data Fields (Ri, Gi, Bi) are converted into the image data (Data), and the image data (Data) is supplied to the data driver (300).

The data driver 300 converts the image data Data into data voltages Vdata, and while the gate-on signal GP is supplied to one gate line GL, the data lines DL1 to DLd) to supply the data voltages Vdata.

Accordingly, in the light emitting display panel 100, in the first frame period, an image as illustrated in FIG. 8, that is, the number '2' is displayed. In this case, the area indicated by the scale in FIG. 8 is only shown for explanation of the present invention, and is not directly displayed on the light emitting display panel 100.

The processes as described above are repeatedly performed in subsequent periods.

For example, as illustrated in FIGS. 6 and 8, when the number '2' is output to the light emitting display panel 100 in the first frame period, the first frame period is No new image is output through the light emitting display panel 100 during the 2 frame period to the 59th frame. In this case, the number '2' is continuously output through the light emitting display panel 100.

When the number '2' is being output, when the 60th frame period starts, the controller 400 uses the method as described above, the gate driver 200 and the data driver 300 To control.

Accordingly, in the 60th frame period, the number '2' as shown in FIG. 8 is output once again through the light emitting display panel 100.

If another 1 second starts after the number '2' is output in the 60th frame period, another number, for example, in the first frame period included in the another 1 second through the processes as described above For example, '3' may be output through the light emitting display panel 100.

The reason the present invention is driven as described above is that when a dark image, for example, a 0 gray image is converted into a bright image, for example, 255 gray image, the brightness corresponding to 255 gray is not normally output. Because it is not.

For example, in a conventional electroluminescence display, an image of '1' is output in the first frame period, and after 1 second, an image of '2' is output in the another first frame period.

In this case, as illustrated in FIG. 8, when the image “1” is output, in the regions except for the region in which the number “1” is displayed in the light emitting display panel 100, a black pattern corresponding to 0 gray When the number '2' is outputted, the area included in the number '2' among the black patterns is changed from a black pattern to a white pattern.

In the conventional electroluminescent display device, when the black pattern is changed to a white pattern, there is a problem that the brightness corresponding to the white pattern is not normally output.

For example, as shown in FIG. 9(a), in the conventional electroluminescence display device, when the black pattern corresponding to 0 gray is changed to a white pattern corresponding to 255 gray, the brightness of the normal white pattern is higher than that of the normal white pattern. A brightness as small as A is output.

In order to prevent such a problem, the electroluminescent display device according to the present invention, as described above, immediately before the new image is output, that is, in the 60th frame period, which is the last frame period among the 60 frame periods, The image output in one frame period is output once again.

In this case, the controller 400, the gate driver 200, the data driver 300, and the pixel driving circuits (PDCs) are refreshed, so that even if the luminance changes in another first frame by a large difference, , Brightness corresponding to the changed luminance may be normally output.

For example, as shown in (b) of FIG. 9, according to the electroluminescent display device according to the present invention, when a black pattern corresponding to 0 gray is changed to a white pattern corresponding to 255 gray, a normal white pattern A brightness smaller than B is output, and the size of B is smaller than the size of A shown in FIG. 9(a).

Therefore, according to the electroluminescent display device according to the present invention, for example, when the number '1' shown in FIG. 7 is changed to the number '2' shown in FIG. 8, the number '2' is a normal white pattern. It can be output with a brightness corresponding to the brightness.

In addition, in the above description, an image in which a black pattern corresponding to 0 gray is changed to a white pattern corresponding to 255 gray is described as an example of the present invention, but the present invention is not limited thereto. That is, the present invention can be applied not only to zero gray, but also when gray that is darkly expressed in the user's eye is converted to gray that is brightly seen in the user's eye.

Also, the present invention can be applied to an electroluminescent display device in which a bright image is continuously output.

That is, even if a bright image is continuously output, if an image is output only once per second, a luminance difference may occur, but according to the present invention, a luminance difference may not occur.

10 is another exemplary view showing frame periods during which the electroluminescent display device according to the present invention outputs an image. In the following description, contents identical or similar to those described with reference to FIGS. 1 to 9 are omitted or briefly described.

First, the control unit 400 supplies a gate start signal to the gate driver 200 in the first frame period, that is, the control unit gate start signal GVST. Accordingly, the stages 210 of the gate driver 200 start driving. When the stages 210 are driven, the gate-on signals GP output from the stages 210 are sequentially supplied to the gate lines GL1 to GLg. In this case, the gate-on signal GP output from one stage 210 is supplied to the gate start signal VST to another stage 210 to drive the other stage.

Also, in the first frame period, the control unit 400 supplies image data Data to be output in the first frame period to the data driver 300.

Accordingly, in the light emitting display panel 100, an image as illustrated in FIG. 7, that is, the number '1' is displayed.

Next, the control unit 400, the image output in the first frame period through the light-emitting display panel 100 in the second frame period to the m-th frame period of the n frame periods included in the preset period The gate driver 200 and the data driver 300 are controlled so as to be output.

To this end, the controller 400 supplies a gate start signal, that is, the controller gate start signal (GVST) to the gate driver 200 in each of the first frame period to the mth frame period, and the controller In step 400, image data to be output in the first frame period is supplied to the data driver 300 in each of the first frame period to the mth frame period.

Accordingly, in the second frame period to the mth frame period, an image output through the light emitting display panel 100 in the first frame period, for example, the number '1' as shown in FIG. 7. This can be continuously output.

Here, m may be, for example, a natural number greater than 2 and less than n/10.

That is, the inventors of the present invention, as described with reference to Figures 6 to 9, by outputting the same image in the first frame and the last frame, when the black pattern is changed to a white pattern, the brightness of the white pattern It was confirmed that it can be expressed normally.

In addition, the inventors of the present invention may display an image output in the first frame period even after the first frame period in which the white pattern is output, even in at least two frame periods, for example, the second frame period and the third frame period. It was confirmed that when continuously output, the brightness of the white pattern could be more quickly expressed normally.

Accordingly, according to the present invention, as shown in FIG. 10, among the 60 frame periods in which the number '1' is expressed, in the first to third frame periods, the number '1' is the light emitting display panel 100 Can be continuously output.

Next, the controller 400 does not supply a gate start signal, that is, the controller gate start signal GVST, from the m+1 frame period to an n-1 frame period to the gate driver 200. During the m+1 frame period to the n-1 frame period, image data Data is not supplied to the data driver 300.

Accordingly, from the first frame period to the n-1th frame period, the image as illustrated in FIG. 7, that is, the number '1' may be continuously output from the light emitting display panel 100.

Next, the control unit 400 supplies the gate start signal to the gate driver 200 again during the n-th frame period. For example, the control unit 400 supplies the control unit gate start signal GVST to the gate driver 200 during the 60th frame period.

Accordingly, the gate driver 200 starts driving as described above.

In this case, the gate-on signal GP output from one stage 210 is input as the gate start signal VST to another stage 210, and accordingly, the stages 210 are the gate lines The gate-on signal GP is sequentially output as (GL1 to GLg).

In addition, the control unit 400 supplies the image data Data output in the first frame period to the data driver 300 during the n-th frame period, for example, the 60th frame period.

For example, since the number '1' was output to the light emitting display panel 100 during the first frame period, the control unit 400 displays the image data Data corresponding to the number '1' to the data driver ( 300).

The data driver 300 converts the image data Data into data voltages Vdata, and while the gate-on signal GP is supplied to one gate line GL, the data lines DL1 to DLd) to supply the data voltages Vdata.

Accordingly, in the light emitting display panel 100, the image as illustrated in FIG. 7, that is, the number '1' is displayed once again.

Finally, when the first frame period to the 60th frame period have elapsed through the above processes, another 1 second starts, and thus, another first frame period included in another 1 second starts.

When another first to mth frame periods included in another 1 second start, the control unit 400 gates the gate start signal to the gate driver 200 in each of the other first to mth frame periods, That is, the control gate start signal GVST is supplied.

Accordingly, the gate driver 200 starts driving as described above.

Also, the control unit 400 supplies image data Data to be output in the first frame period to the data driver 300 in each of the first to mth frame periods.

For example, when input image data (Ri, Gi, Bi) for the number '2' to be output in the first frame period is input from the external system, the control unit 400 receives the input image data Fields (Ri, Gi, Bi) are converted into the image data (Data), and the image data (Data) are supplied to the data driver 300 in each of the first to m-th frame periods.

The data driver 300 converts the image data Data into data voltages Vdata, and while the gate-on signal GP is supplied to one gate line GL, the data lines DL1 to DLd) to supply the data voltages Vdata.

Accordingly, in the light emitting display panel 100, in the first to mth frame periods, an image as illustrated in FIG. 8, that is, the number '2' is displayed.

That is, as described above, since the same image, that is, the number '1' is output in the first frame period and the last frame period in which the number '1' is output, the number '2' in another first frame period is output. When output, the brightness of the white pattern corresponding to the number '2' can be normally expressed. Further, after the number '2' is output in the first frame period, the number '2' is continuously output in another second frame period to the m-th frame period, so that the white pattern corresponding to the number '2' The brightness of can reach the normal level more quickly.

The processes as described above are repeatedly performed in subsequent periods.

For example, as illustrated in FIGS. 6 and 8, when the number '2' is output to the light emitting display panel 100 in the first to mth frame periods, the other mth frame period During the subsequent m+1 frame period to the 59th frame, a new image is not output through the light emitting display panel 100. In this case, the number '2' is continuously output through the light emitting display panel 100.

When the number '2' is being output, when the 60th frame period starts, the controller 400 uses the method as described above, the gate driver 200 and the data driver 300 To control.

Accordingly, in the 60th frame period, the number '2' as shown in FIG. 8 is output once again through the light emitting display panel 100.

If another 1 second starts after the number '2' is output in the 60th frame period, another number, for example, in the first frame period included in the another 1 second through the processes as described above For example, '3' may be output through the light emitting display panel 100.

According to the present invention as described above, as described above, when the black pattern corresponding to 0 gray is changed to a white pattern corresponding to 255 gray, brightness corresponding to 255 gray can be quickly output.

Those skilled in the art to which the present invention pertains will appreciate that the present invention may be implemented in other specific forms without changing its technical spirit or essential characteristics. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The scope of the present invention is indicated by the following claims rather than the above detailed description, and it should be interpreted that all changes or modifications derived from the meaning and scope of the claims and equivalent concepts are included in the scope of the present invention. do.

100: light emitting display panel 200: gate driver
300: data driver 400: control unit

Claims (7)

A light emitting display panel including pixels including light emitting elements and pixel driving circuits;
A gate driver supplying gate signals to gate lines provided on the light emitting display panel;
A data driver supplying data voltages to data lines provided on the light emitting display panel; And
The gate driver and a control unit for controlling the gate driver,
The control unit controls the gate driver and the data driver to output the same image through the light emitting display panel during the first frame period and the nth frame period among n frame periods included in the preset period. Display device. According to claim 1,
The control unit,
A gate start signal is supplied to the gate driver during the first frame period,
The gate start signal is not supplied to the gate driver during the second frame period to the n-1th frame period.
An electroluminescent display device that supplies a gate start signal to the gate driver during the n-th frame period. According to claim 1,
The control unit,
In the first frame period, image data to be output in the first frame period are supplied to the data driver,
In the second frame period to the n-1 frame period, image data is not supplied to the data driver,
In the n-th frame period, the electroluminescence display device supplies image data output in the first frame period to the data driver. According to claim 1,
The control unit,
Among the n frame periods included in the preset period, the gate driver and the data driver are output such that an image output in the first frame period is output through the light emitting display panel in the second to mth frame periods. Controlled electroluminescent display device. The method of claim 4,
The control unit,
A gate start signal is supplied to the gate driver in each of the first frame period to the mth frame period,
The gate start signal is not supplied to the gate driver during the m+1 frame period to the n-1 frame period,
In the n-th frame period, an electroluminescent display device publicly providing a gate start signal to the gate driver. The method of claim 4,
The m is a natural number greater than 2 and less than n/10 electroluminescent display device The method of claim 4,
The control unit,
In each of the first frame period to the m-th frame period, image data to be output in the first frame period is supplied to the data driver,
During the m+1 frame period to the n-1 frame period, image data is not supplied to the data driver,
In the n-th frame period, the electroluminescence display device supplies image data output in the first frame period to the data driver.

Images