KR20200076901A - Semiconductor device using two-dimensional thin films having different bandgap - Google Patents

Semiconductor device using two-dimensional thin films having different bandgap Download PDF

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KR20200076901A
KR20200076901A KR1020180165867A KR20180165867A KR20200076901A KR 20200076901 A KR20200076901 A KR 20200076901A KR 1020180165867 A KR1020180165867 A KR 1020180165867A KR 20180165867 A KR20180165867 A KR 20180165867A KR 20200076901 A KR20200076901 A KR 20200076901A
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semiconductor material
dimensional
dimensional semiconductor
gas
transistor
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최성율
신광혁
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한국과학기술원
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7781Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02551Group 12/16 materials
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices

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Abstract

The present invention is to provide an electronic device using a relationship between a two-dimensional semiconductor material and another device material. Provided is the electronic device comprising: a two-dimensional semiconductor material; and another heterogeneous material in contact with the two-dimensional semiconductor material. The heterogeneous material is doped with impurities of a different type from the two-dimensional semiconductor material or has a different band gap from the two-dimensional semiconductor material.

Description

상이한 밴드갭을 갖는 이종 이차원 박막을 이용한 반도체 소자{Semiconductor device using two-dimensional thin films having different bandgap}Semiconductor device using two-dimensional thin films having different bandgap

본 발명은 상이한 밴드갭을 갖는 이종 이차원 박막을 이용한 반도체 소자에 관한 것으로, 보다 상세하게는 두 반도체의 계면에서 에너지 우물(energy well)과 얇은 층의 2차원 전자 가스(2-dimensional electron gas, 2DEG)를 형성, 향상된 특성의 트랜지스터를 제공할 수 있는 상이한 밴드갭을 갖는 이종 이차원 박막을 이용한 반도체 소자에 관한 것이다.The present invention relates to a semiconductor device using heterogeneous two-dimensional thin films having different band gaps, and more specifically, an energy well and a thin layer of 2-dimensional electron gas (2DEG) at the interface of two semiconductors. It relates to a semiconductor device using a heterogeneous two-dimensional thin film having a different band gap that can provide a transistor of improved characteristics, forming a ).

2차원 반도체 소재는 우수한 전기적, 기계적, 광학적 특성으로 많은 연구자들의 주목을 받아왔다. 2차원 반도체는 통상 수평방향으로 강한 공유결합을 하고, 수직방향으로는 약한 반 데르발스 결합을 가지는 층상구조의 반도체 소재를 지칭하는데, 현재 2차원 반도체 소재, 예를 들어 전이금속 칼코겐 화합물을 이용한 다양한 소자 활용 방법이 개시되고 있으나, 효과적인 소자로의 응용은 개시되고 있지 않은 상황이다. 2D semiconductor materials have attracted the attention of many researchers for their excellent electrical, mechanical, and optical properties. The 2D semiconductor usually refers to a semiconductor material having a layered structure having a strong covalent bond in the horizontal direction and a weak van der Waals bond in the vertical direction. Currently, a 2D semiconductor material, for example, a transition metal chalcogen compound is used. Various device utilization methods have been disclosed, but application to effective devices has not been disclosed.

예를 들어 대한민국 공개특허 10-2017-0098053호는 전이금속 칼코겐 화합물을 기판 상에서 채널 소재로 이용한 박막 트랜지스터 기술을 개시하고 있다. 하지만, 이는 일반적인 채널소재로서 이차원 반도체 소재를 활용하는 것으로, 실제로 이차원 물질과 접하는 이종물질간의 접합(junction)을 이용하여 소자 특성을 향상시킨 기술은 개시하지 못하는 상황이다. For example, Korean Patent Publication No. 10-2017-0098053 discloses a thin film transistor technology using a transition metal chalcogen compound as a channel material on a substrate. However, this is a general channel material that utilizes a two-dimensional semiconductor material, and in fact, a technique in which device characteristics are improved by using a junction between dissimilar materials in contact with a two-dimensional material is not disclosed.

따라서, 본 발명이 해결하고자 하는 과제는 이차원 반도체 소재와 또 다른 소재 물질간의 관계를 이용한 전자소자를 제공하는 것이다.Accordingly, a problem to be solved by the present invention is to provide an electronic device using a relationship between a two-dimensional semiconductor material and another material material.

상기 과제를 해결하기 위하여, 본 발명은 이차원 반도체 소재; 및 상기 이차원 반도체 소재와 접하는 또 다른 이종 반도체 소재를 포함하며, 상기 또 다른 이종 반도체 소재는 상기 이종소재는 상기 이차원 반도체 소재보다는 넓은 밴드갭을 갖는 것을 특징으로 하는 전자소자를 제공한다. In order to solve the above problems, the present invention is a two-dimensional semiconductor material; And another heterogeneous semiconductor material in contact with the two-dimensional semiconductor material, wherein the heterogeneous semiconductor material provides an electronic device characterized in that the heterogeneous material has a wider band gap than the two-dimensional semiconductor material.

본 발명의 일 실시예에서, 상기 전자소자는 트랜지스터이며, 상기 이차원 반도체 소재와 상기 이종소재 간의 상이한 밴드갭에 의하여 상기 트랜지스터에는 2차원 전자 가스(2DEG)가 형성된다. In one embodiment of the present invention, the electronic device is a transistor, and a two-dimensional electron gas (2DEG) is formed in the transistor by a different band gap between the two-dimensional semiconductor material and the heterogeneous material.

본 발명의 일 실시예에서, 상기 이차원 반도체 소재는 MoS2, 상기 또 다른 반도체 소재는 GaS이며, 상기 GaS는 상기 게이트 전극과 접한다. In one embodiment of the present invention, the two-dimensional semiconductor material is MoS2, the other semiconductor material is GaS, and the GaS contacts the gate electrode.

본 발명의 일 실시예에서, 상기 트랜지스터의 채널소재는 상기 이차원 반도체 소재와 상기 또 다른 반도체 소재가 접합된 구조이며, 상기 또 다른 반도체 소재는 상기 게이트 전극으로부터의 누설전류를 차단하는 절연체이다. In one embodiment of the present invention, the channel material of the transistor is a structure in which the two-dimensional semiconductor material and the another semiconductor material are bonded, and the other semiconductor material is an insulator blocking leakage current from the gate electrode.

본 발명에 따르면 서로 다른 밴드갭(고밴드갭-저밴드갭)을 가지는 2차원 반도체 소재를 적층하여 이종접합구조의 채널 소재를 제조하고, 두 반도체의 계면에서 에너지 우물(energy well)과 얇은 층의 2차원 전자 가스(2-dimensional electron gas, 2DEG)를 형성, 향상된 특성의 트랜지스터를 제공할 수 있다.According to the present invention, a channel material having a heterojunction structure is manufactured by stacking two-dimensional semiconductor materials having different band gaps (high band gap-low band gap), and an energy well and a thin layer at the interface of two semiconductors By forming a 2-dimensional electron gas (2DEG) of, it is possible to provide a transistor with improved characteristics.

도 1은 본 발명의 2차원 반도체 기반의 MoS2-GaS 이종접합구조 기반 고속트랜지스터 소자의 에너지 밴드 다이어그램이다.
도 2는 MoS2-GaS 이종접합구조 고속트랜지스터 소자의 전자현미경 단면도이다.
도 3은 MoS2-GaS 이종접합구조 고속트랜지스터 소자의 광학현미경 상면도이다.
도 4는 본 발명에 따른 MoS2-GaS 트랜지스터 I-V 특성 결과이다.
1 is an energy band diagram of a high-speed transistor device based on a two-dimensional semiconductor-based MoS 2 -GaS heterojunction structure of the present invention.
2 is an electron microscope cross-sectional view of a MoS 2 -GaS heterojunction structure high-speed transistor device.
3 is an optical microscope top view of a high-speed transistor device of a MoS 2 -GaS heterojunction structure.
4 is a MoS 2 -GaS transistor IV characteristic results according to the present invention.

본 발명은 상술한 과제를 해결하기 위하여, 상술한 2차원 소재, 예를 들어 전이금속 칼코겐 화합물 박막과 이와 접하는 또 다른 반도체 물질간의 접합 특성을 이용하여 향상된 특성의 트랜지스터를 제공하는 것이다. In order to solve the above-mentioned problems, the present invention provides a transistor with improved characteristics by using the bonding characteristics between the above-described two-dimensional material, for example, a thin film of transition metal chalcogen compound and another semiconductor material in contact with it.

본 발명은 또한 서로 다른 밴드갭(고밴드갭-저밴드갭)을 가지는 2차원 반도체 소재를 적층하여 이종접합구조의 채널 소재를 제조하고, 두 반도체의 계면에서 에너지 우물(energy well)과 얇은 층의 2차원 전자 가스(2-dimensional electron gas, 2DEG)를 형성한다. The present invention also manufactures a channel material of a heterojunction structure by stacking two-dimensional semiconductor materials having different band gaps (high band gap-low band gap), and an energy well and a thin layer at the interface of two semiconductors. To form a 2-dimensional electron gas (2DEG).

이러한 2DEG 채널은 GaAs/GaAlAs 이종접합구조에서 잘 알려져 있으며, 높은 이동도를 확보할 수 있어서 고속트랜지스터로 널리 활용되고 있으나, 2차원 반도체 소재의 적층구조에서는 아직 연구된 바가 없다. 즉, 수직방향으로의 댕글링 본드가 없는 층상구조인 2차원 소재를 반 데르발스 접합으로 이종접합구조를 형성하면 격lattice mismatch에 의한 결함을 제거할 수 있고, 산화물-2차원 반도체 계면보다 더욱 부드럽고, 트랩이 적어서 전하 산란(charge scattering)과 조도산란(roughness scattering)을 줄여 트랜지스터의 이동도를 증가시킬 수 있다. These 2DEG channels are well known in GaAs/GaAlAs heterojunction structures, and are widely used as high-speed transistors because they can secure high mobility, but have not been studied in a stacked structure of 2D semiconductor materials. That is, if a heterojunction structure is formed by van der Waals bonding of a two-dimensional material having a layered structure without dangling bonds in the vertical direction, defects due to lattice mismatch can be eliminated, and it is softer than an oxide-two-dimensional semiconductor interface. , Since there are few traps, charge scattering and roughness scattering can be reduced to increase the mobility of transistors.

본 발명의 일 실시예에서 전자소자는 트랜지스터로서, 그 채널소재는 상기 이차원 반도체 소재와 상기 이종소재가 접한된 구조로, 상기 이종소재는 상기 게이트 전극으로부터의 누설전류를 차단하는 절연체 역활을 수행할 수 있다. In one embodiment of the present invention, the electronic device is a transistor, and the channel material is a structure in which the two-dimensional semiconductor material and the heterogeneous material are in contact, and the heterogeneous material serves as an insulator blocking the leakage current from the gate electrode. You can.

실시예Example

90 nm 의 두께를 가지는 SiO2가 증착 된 실리콘 웨이퍼 조각에 MoS2 crystal flake를 스카치 테이프로 기계적 박리를 진행하였다. 그 후 현미경을 이용하여 10 nm 이하의 얇은 MoS2 flake를 찾는다. 트랜지스터의 소스-드레인을 형성하기 위해 포토리소그라피를 이용하여 패터닝하고, 열증착기를 이용하여 전극을 Ti/Au (10 nm/40 nm)를 증착하고 리프트오프를 하였다. 이후 다른 90 nm-SiO2 웨이퍼 조각에 GaS crystal flake를 스카치 테이프로 기계적 박리를 진행하였다. 얇은 GaS flake의 위치를 찾고 polypropylene carbonate을 스핀코팅하였다. 그 다음 PDMS와 align 장비 및 현미경을 이용하여 제작된 MoS2 소스-드레인 소자 위에 얇은 GaS flake를 전사하였다. 이후 포토리소그라피를 이용하여 게이트 전극을 페터닝하고, 열증착기를 이용하여 Pd/Au (2 nm/20 nm)를 증착한 후 리프트오프하여 완성하였다.Mechanical peeling of MoS 2 crystal flake with a scotch tape was performed on a piece of silicon wafer deposited with SiO 2 having a thickness of 90 nm. Thereafter, a thin MoS 2 flake of 10 nm or less is found using a microscope. Patterning was performed using photolithography to form the source-drain of the transistor, and Ti/Au (10 nm/40 nm) was deposited on the electrode using a thermal evaporator and lifted off. Thereafter, mechanical peeling of GaS crystal flake on another 90 nm-SiO 2 wafer piece was performed with a scotch tape. The thin GaS flake was located and polypropylene carbonate was spin coated. Then, a thin GaS flake was transferred onto a MoS 2 source-drain device fabricated using a PDMS and align equipment and a microscope. Thereafter, the gate electrode was patterned using photolithography, and Pd/Au (2 nm/20 nm) was deposited using a thermal evaporator, followed by lift-off.

실험예Experimental Example

도 1은 본 발명의 2차원 반도체 기반의 MoS2-GaS 이종접합구조 기반 고속트랜지스터 소자의 에너지 밴드 다이어그램이다.1 is an energy band diagram of a high-speed transistor device based on a two-dimensional semiconductor-based MoS 2 -GaS heterojunction structure of the present invention.

도 1을 참조하면, MoS2의 경우 두께에 따라 대략 1.2 ~ 1.8 eV의 밴드갭을 가지며, GaS의 경우 3.3 ~ 3.4 eV의 밴드갭을 가진다. 따라서, 서로 다른 밴드갭을 가지고 적절한 에너지 밴드 오프셋을 가진다면, 이종접합구조 계면에서 양자우물(quantum well) 및 2DEG를 형성할 것으로 예상할 수 있다. 이때 GaS는 게이트 전극과 Schottky 접합을 형성하고 있기 때문에 게이트 누설 전류를 막는 절연체 역할을 할 수 있다. Referring to FIG. 1, MoS 2 has a band gap of approximately 1.2 to 1.8 eV depending on thickness, and GaS has a band gap of 3.3 to 3.4 eV according to thickness. Therefore, if they have different band gaps and have appropriate energy band offsets, it can be expected to form quantum wells and 2DEGs at the heterojunction structure interface. At this time, since GaS forms a Schottky junction with the gate electrode, it can serve as an insulator to prevent the gate leakage current.

도 2는 MoS2-GaS 이종접합구조 고속트랜지스터 소자의 전자현미경 단면도이다.2 is an electron microscope cross-sectional view of a MoS 2 -GaS heterojunction structure high-speed transistor device.

도 2를 참조하면, 본 발명과 같이 2차원 형태의 층상구조 반도체를 적층하면 도 6에서 보이는 것과 같이 표면이 매끄러운 반 데르발스 접합을 형성할 수 있다. Referring to FIG. 2, when a two-dimensional layered semiconductor is stacked as in the present invention, a van der Waals junction having a smooth surface as shown in FIG. 6 can be formed.

도 3은 MoS2-GaS 이종접합구조 고속트랜지스터 소자의 광학현미경 상면도이다. 3 is an optical microscope top view of a high-speed transistor device of a MoS 2 -GaS heterojunction structure.

도 3을 참조하면, 범용적으로 사용되는 포토리소그라피 공정을 이용하여 MoS2-GaS 고속트랜지스터 소자를 도 7과 같이 제조할 수 있다. Referring to FIG. 3, a MoS 2 -GaS high-speed transistor device can be manufactured as shown in FIG. 7 by using a photolithography process that is commonly used.

도 4는 본 발명에 따른 MoS2-GaS 트랜지스터 I-V 특성 결과이다. 4 is a MoS 2 -GaS transistor IV characteristic results according to the present invention.

도 4를 참조하면, 트랜스퍼 커브와 아웃풋 커브를 확인하여 트랜지스터가 정상적으로 동작되는 것을 알 수 있다. Referring to FIG. 4, it can be seen that the transistor operates normally by checking the transfer curve and the output curve.

Claims (4)

이차원 반도체 소재; 및
상기 이차원 반도체 소재와 접하는 또 다른 이종 반도체 소재를 포함하며, 상기 또 다른 이종 반도체 소재는 상기 이종소재는 상기 이차원 반도체 소재보다는 넓은 밴드갭을 갖는 것을 특징으로 하는 전자소자.
A two-dimensional semiconductor material; And
An electronic device comprising another hetero semiconductor material in contact with the two-dimensional semiconductor material, and the heterogeneous semiconductor material has a wider band gap than the two-dimensional semiconductor material.
제 1항에 있어서,
상기 전자소자는 트랜지스터이며, 상기 이차원 반도체 소재와 상기 이종소재 간의 상이한 밴드갭에 의하여 상기 트랜지스터에는 2차원 전자 가스(2DEG)가 형성된 것을 특징으로 하는 전자소자.
According to claim 1,
The electronic device is a transistor, and an electronic device characterized in that a two-dimensional electron gas (2DEG) is formed in the transistor by a different band gap between the two-dimensional semiconductor material and the heterogeneous material.
제 2항에 있어서,
상기 이차원 반도체 소재는 MoS2, 상기 또 다른 반도체 소재는 GaS이며, 상기 GaS는 상기 게이트 전극과 접하는 것을 특징으로 하는 전자소자.
According to claim 2,
The two-dimensional semiconductor material is MoS2, the other semiconductor material is GaS, the GaS is an electronic device, characterized in that in contact with the gate electrode.
제 3항에 있어서,
상기 트랜지스터의 채널소재는 상기 이차원 반도체 소재와 상기 또 다른 반도체 소재가 접합된 구조이며, 상기 또 다른 반도체 소재는 상기 게이트 전극으로부터의 누설전류를 차단하는 절연체인 것을 특징으로 하는 전자소자.
According to claim 3,
An electronic device characterized in that the channel material of the transistor is a structure in which the two-dimensional semiconductor material and the another semiconductor material are bonded, and the another semiconductor material is an insulator blocking leakage current from the gate electrode.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023063766A1 (en) * 2021-10-14 2023-04-20 기초과학연구원 Composite structure comprising conductive channel, semiconductor device comprising same, and manufacturing method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023063766A1 (en) * 2021-10-14 2023-04-20 기초과학연구원 Composite structure comprising conductive channel, semiconductor device comprising same, and manufacturing method therefor

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