KR20200049397A - Liquid crystal display device - Google Patents

Abstract

According to one embodiment of the present invention, a liquid crystal display changes a required storage capacitance value for each frequency when a driving frequency is variable. The liquid crystal display includes: an array substrate and a color filter substrate; a plurality of gate lines and data lines crossing over the array substrate to define a plurality of sub-pixels; a plurality of common electrodes and pixel electrodes alternately disposed in the sub-pixels; a first common line disposed parallel to a gate line and connected to the common electrode; a thin film transistor disposed in the sub-pixel; a pixel electrode line connected to the plurality of pixel electrodes and electrically connected to a drain electrode of the thin film transistor; and a second common line disposed on the color filter substrate opposite to the pixel electrode line; and a spacer disposed between the color filter substrate and the array substrate, and constituting a variable capacitor together with the second common line and the pixel electrode line.

Description

Liquid crystal display device {LIQUID CRYSTAL DISPLAY DEVICE}

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of low-frequency driving.

As the information society develops, demands for display devices for displaying images are increasing in various forms, such as liquid crystal display devices (LCDs) and organic light emitting diodes (OLEDs). Various flat display devices are used.

Among these flat panel display devices, liquid crystal display devices are widely used because they have advantages of miniaturization, light weight, thinness, and low power driving.

In general, a liquid crystal display device receives a clock at a driving frequency of 60 Hz input from an external system and operates according to the driving frequency.

In this case, the display device operates at substantially the same driving frequency for an image having a large change in image as a moving image as well as a still image having a large change in image, such as a moving image, thereby increasing power consumption.

To improve this, the variable frequency driving (Variable Refresh Rate :) to reduce power consumption by driving a normal frequency of 60 Hz when displaying a video and driving a display device at a lower frequency than the normal frequency when displaying a still image VRR) technology has been proposed.

Among the products, there is a product group that needs to vary the storage capacitance value according to the driving frequency. In this case, the size of the storage capacitance corresponding to each sub-pixel is determined by the design and stacking structure of the individual sub-pixels. That is, in a typical liquid crystal display device, the size of the storage capacitance is determined by the area and distance of the pixel electrode and the common electrode, and the dielectric constant of the dielectric, and thus has a disadvantage of being driven at a value determined once.

Accordingly, a problem to be solved by the present invention is to provide a liquid crystal display device capable of changing and providing a required storage capacitance value for each frequency when a variable driving frequency is required.

The problems of the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description.

In order to solve the problems as described above, the liquid crystal display according to an exemplary embodiment of the present invention defines an array substrate, a color filter substrate, and a plurality of sub-pixels crossing over the array substrate through a liquid crystal layer. A plurality of gate lines and data lines, a plurality of common electrodes and pixel electrodes alternately disposed in the sub-pixel, a first common line disposed in parallel to the gate line, and connected to the common electrode, the sub- A thin film transistor disposed in a pixel, a pixel electrode line connected to the plurality of pixel electrodes and electrically connected to a drain electrode of the thin film transistor, and a second common line disposed on the color filter substrate facing the pixel electrode line And the second common line and the pixel disposed between the color filter substrate and the array substrate. With the pole line may include a spacer constituting a variable capacitor.

In order to solve the problems as described above, the liquid crystal display device according to another exemplary embodiment of the present invention includes a plurality of sub-pixels intersecting the array substrate and the color filter substrate and the array substrate to be opposingly bonded through a liquid crystal layer. A plurality of gate lines and data lines to be defined, a plurality of common electrodes and pixel electrodes alternately disposed in the sub-pixel, a first common line connected to the common electrode to supply a first common voltage, the pixel electrode and the A liquid crystal capacitor composed of a common electrode and the liquid crystal layer filled between the pixel electrode and the common electrode, a pixel electrode line connected to the plurality of pixel electrodes and supplying a pixel voltage, and the color filter facing the pixel electrode line A second common line disposed on a substrate and supplying a second common voltage, and the color filter substrate and the array substrate A spacer constituting a variable capacitor together with the second common line and the pixel electrode line is disposed, and when the driving frequency is variable, the second common voltage is the value of the variable capacitor required for each frequency. You can change it by adjusting.

Details of other embodiments are included in the detailed description and drawings.

The present invention provides an effect of preventing deterioration of image quality by changing a required storage capacitance value for each frequency when a driving frequency is variable.

The effects according to the present invention are not limited by the contents exemplified above, and more various effects are included in the present specification.

1 is a block diagram schematically showing a liquid crystal display device according to the present invention.
2 is a diagram schematically showing the structure of a liquid crystal display according to a first embodiment of the present invention.
3 is a plan view showing an example of an array substrate of a liquid crystal display according to a first embodiment of the present invention.
4 is a plan view showing an example of a color filter substrate of a liquid crystal display device according to a first embodiment of the present invention.
5 is a view schematically showing a cross-section cut along the line A-A 'in the liquid crystal display according to the first embodiment of the present invention shown in FIG. 3.
6 is an equivalent circuit diagram illustrating one sub-pixel as an example in the liquid crystal display according to the first embodiment of the present invention shown in FIG. 2.
7 is a cross-sectional view showing another example of a liquid crystal display device according to a first embodiment of the present invention.
8 is a plan view showing an example of an array substrate of a liquid crystal display according to a second embodiment of the present invention.
9 is a view schematically showing a cross-section cut along the line B-B 'in the liquid crystal display device according to the second embodiment of the present invention shown in FIG. 8.
10 is a cross-sectional view showing another example of a liquid crystal display according to a second embodiment of the present invention.
11 is a plan view showing an example of an array substrate of a liquid crystal display according to a third embodiment of the present invention.
12 is a view schematically showing a cross-section cut along the line C-C 'in the liquid crystal display device according to the third embodiment of the present invention shown in FIG.
13 is a cross-sectional view showing another example of a liquid crystal display according to a third embodiment of the present invention.

Advantages and features of the present invention, and methods for achieving them will be clarified with reference to embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the present embodiments allow the disclosure of the present invention to be complete, and the ordinary knowledge in the technical field to which the present invention pertains. It is provided to fully inform the holder of the scope of the invention, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for describing the embodiments of the present invention are exemplary and the present invention is not limited to the illustrated matters. In addition, in the description of the present invention, when it is determined that detailed descriptions of related known technologies may unnecessarily obscure the subject matter of the present invention, detailed descriptions thereof will be omitted. When 'include', 'have', 'consist of', etc. mentioned in this specification are used, other parts may be added unless '~ man' is used. When a component is expressed as a singular number, the plural number is included unless otherwise specified.

In interpreting the components, it is interpreted as including the error range even if there is no explicit description.

In the case of the description of the positional relationship, for example, when the positional relationship of two parts is described as '~ top', '~ upper', '~ bottom', '~ side', etc., 'right' Alternatively, one or more other parts may be located between the two parts unless 'direct' is used.

When an element or layer is referred to as another element or layer (on), it includes all cases in which another layer or another element is interposed immediately above or in between.

Although the first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

The same reference numerals refer to the same components throughout the specification.

The size and thickness of each component shown in the drawings are illustrated for convenience of description, and the present invention is not necessarily limited to the size and thickness of the illustrated component.

Each of the features of the various embodiments of the present invention may be partially or totally combined or combined with each other, and technically various interlocking and driving may be possible as those skilled in the art can fully understand, and each of the embodiments may be implemented independently of each other. It can also be implemented together in an associative relationship.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically showing a liquid crystal display device according to the present invention.

Referring to FIG. 1, the liquid crystal display device according to the present invention may include a display panel 100 in which a plurality of sub-pixels P are arranged in a matrix form and a driving circuit driving the display panel 100. . The driving circuit for driving the display panel 100 may include a data driving circuit 200, a gate driving circuit 300 and a timing control circuit 400.

The liquid crystal display device according to the present invention may be configured as a variable refresh rate (VRR) type liquid crystal display device in which the frequency fluctuates according to the displayed image. In this case, when an image having a large change of image, such as a video, is displayed, the liquid crystal display device may be driven in a normal frequency mode according to a normal frequency of 60 Hz as a driving frequency input from an external system. In addition, in the case of displaying an image in which the change of the image is not large, such as a still image, the liquid crystal display device may be driven in a low frequency mode according to a low frequency lower than a normal frequency. In the low frequency mode, since the number of frames is reduced compared to the normal frequency mode, data writing, that is, the number of refreshes is reduced, power consumption of the liquid crystal display device can be reduced.

Looking at the display panel 100, various wirings that transmit driving signals for driving the sub-pixels P may be formed on the display panel 100.

In this case, as an example, each of the plurality of data lines DL transmitting the data voltage may extend along the column line direction and be connected to the sub-pixel P of the corresponding column line. In addition, each of the plurality of gate lines GL transferring the gate voltage may be extended along the row line direction to be connected to the sub-pixel P of the corresponding row line.

The timing control circuit 400 may control driving timings of the data driving circuit 200 and the gate driving circuit 300. The timing control circuit 400 may rearrange digital data (RGB) input from an external system according to the resolution of the display panel 100 and supply it to the data driving circuit 200.

In addition, the timing control circuit 400 is based on the timing signals of the vertical synchronization signal (Vsync), the horizontal synchronization signal (Hsync), the clock signal (CLK) and the data enable signal (DE) of the data driving circuit (200) The data control signal DCS for controlling the operation timing and the gate control signal GCS for controlling the operation timing of the gate driving circuit 300 may be generated.

The data driving circuit 200 drives the data line DL. That is, the data driving circuit 200 may convert the input digital data RGB based on the data control signal DCS into an analog data voltage and supply it to the corresponding data line DL.

The gate driving circuit 300 drives the gate line GL. That is, the gate driving circuit 300 may generate a gate voltage based on the gate control signal GCS and supply it to the gate line GL in a line sequential manner.

2 is a diagram schematically showing the structure of a liquid crystal display according to a first embodiment of the present invention.

3 is a plan view showing an example of an array substrate of a liquid crystal display according to a first embodiment of the present invention.

4 is a plan view showing an example of a color filter substrate of a liquid crystal display device according to a first embodiment of the present invention.

3 and 4 show structures of an array substrate and a color filter substrate for one sub-pixel as an example.

5 is a view schematically showing a cross-section cut along the line A-A 'in the liquid crystal display according to the first embodiment of the present invention shown in FIG. 3.

6 is an equivalent circuit diagram illustrating one sub-pixel as an example in the liquid crystal display according to the first embodiment of the present invention shown in FIG. 2.

2 to 6, the display panel 100 according to the first exemplary embodiment of the present invention can be largely formed by bonding the color filter substrate 105 and the array substrate 110 with the liquid crystal layer 130 interposed therebetween. have.

Although not shown in detail, the color filter substrate 105 may include a color filter configured for each of the plurality of sub-pixels P and a black matrix formed between the color filters. However, the present invention is not limited thereto, and for example, in the case of a color filter on TFT (COT) structure, the color filter may be formed on the array substrate 110 together with the thin film transistor TR.

The array substrate 110 includes a thin film transistor TR configured at a crossing point between the gate line 116 and the data line 117 and the gate line 116 and the data line 117 defining the plurality of sub-pixels P. ).

In addition, a plurality of spacers 150a, 150b, and 150c for maintaining a gap between two substrates 105 and 110 may be configured between the color filter substrate 105 and the array substrate 110.

The plurality of sub-pixels P may be arranged in a matrix form by crossing a plurality of gate lines 116 and data lines 117 on the array substrate 110. That is, the plurality of sub-pixels P may be arranged in a row direction and a column direction to be arranged in a matrix form.

The gate line 116 may be disposed on the array substrate 110 in a first direction. Further, the data line 117 may be disposed in a second direction different from the first direction to partition the plurality of sub-pixels P along with the gate line 116.

The common line 108l may be disposed in the first direction.

Each of the plurality of sub-pixels P may embody light of a specific color. For example, the sub-pixel P may be configured as one of a red sub-pixel that implements red, a green sub-pixel that implements green, and a blue sub-pixel that implements blue. In this case, a group of red sub-pixels, green sub-pixels, and blue sub-pixels may constitute one pixel. However, the present invention is not limited to this, and one pixel may be composed of a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.

The sub-pixel P according to the first embodiment of the present invention includes a thin film transistor TR and a plurality of wirings, that is, a gate line 116, a data line 117, a first common line 108l and a second It may be configured to include the liquid crystal capacitors Cst_lc formed by the common line 128l and the first and second storage capacitors Cst_ovl and Cst_var.

For example, the thin film transistor TR may be disposed at a region where the gate line 116 and the data line 117 intersect, that is, the upper and lower neighboring sub-pixels P. In addition, the first common line 108l and the second common line 128l may be disposed at the boundary of the sub-pixels P neighboring up and down.

In this sub-pixel P, a plurality of common electrodes 108 and pixel electrodes 118 may be alternately arranged.

In this case, the thin film transistor TR includes a gate electrode 121 connected to the gate line 116, an active layer 124 disposed on the gate electrode 121, a source electrode 122 and a source connected to the data line 117. A drain electrode 123 disposed opposite to the electrode 122 may be included.

That is, the thin film transistor TR functioning as a switching element is connected to the corresponding gate line 116 and data line 117 to receive a gate voltage and a data voltage, respectively. The gate electrode 121 of the thin film transistor TR is connected to the gate line 116, the source electrode 122 is connected to the data line 117, and the drain electrode 123 is connected to the first contact hole 140a. It may be connected to the pixel electrode line 118L. Here, the thin film transistor TR may be formed of an active layer 124 using an oxide semiconductor having excellent mobility or off-current characteristics, but the present invention is not limited thereto. When forming the active layer 124 using amorphous silicon, an ohmic-contact layer 125 may be formed between the active layer 124 and the source / drain electrodes 122 and 123 as shown in FIG. 5. have.

The liquid crystal capacitor Cst_lc may be formed of a pixel electrode 118 and a common electrode 108 facing each other, and a liquid crystal layer 130 filled between the pixel electrode 118 and the common electrode 108.

The pixel electrode 118 is electrically connected to the drain electrode 123 of the thin film transistor TR through the first contact hole 140a to receive the pixel voltage, and the common electrode 108 is the second contact hole 140b. It is electrically connected to the first common line 108l through which a first common voltage can be applied. An electric field is generated between the pixel electrode 118 and the common electrode 108 due to a voltage difference between the pixel voltage and the first common voltage, thereby changing the arrangement of liquid crystal molecules to display an image.

The pixel electrode 118 may be arranged on the array substrate 110 alternately with the common electrode 108 in a second direction, and may have a bent structure as illustrated in FIG. 3. However, the present invention is not limited to this.

The plurality of pixel electrodes 118 may have one end connected to the pixel electrode line 118L and electrically connected to the drain electrode 123 of the thin film transistor TR through the first contact hole 140a.

The plurality of common electrodes 108 may be alternately disposed with the plurality of pixel electrodes 118 to form a horizontal electric field together with the pixel electrodes 118. The plurality of common electrodes 108 may have a bent structure together with the pixel electrode 118. However, the present invention is not limited to this.

The common electrode 108 may include an outermost common electrode 108 ′ disposed on the data line 117 located at the edge of the sub-pixel P.

The plurality of common electrodes 108 including the outermost common electrode 108 'may be connected to a common electrode line 108 ", one end of which is arranged in the first direction. And, the outermost common electrode 108' The other end of) may be electrically connected to the first common line 108l through the second contact hole 140b to apply the first common voltage to the common electrode 108.

Meanwhile, a shielding line 108a branched from the first common line 108l may be disposed on the side of the data line 117, and the shielding line 108a may be connected to a connection line 108b arranged in the first direction. Can be.

The first and second storage capacitors Cst_ovl and Cst_var are connected in parallel to the liquid crystal capacitor Cst_lc to store the data voltage applied to the pixel electrode 118, that is, the pixel voltage until the next frame.

The first storage capacitor Cst_ovl includes the first common line 108l and the drain electrode 123 facing each other, and the first insulating layer 115a interposed between the first common line 108l and the drain electrode 123. It can be composed of.

The second storage capacitor Cst_var includes the liquid crystal layer 130 interposed between the pixel electrode line 118L and the second common line 128l and the pixel electrode line 118L and the second common line 128l facing each other. And / or auxiliary spacers 150a.

The size of the second storage capacitor Cst_var can be controlled by the pixel voltage of the pixel electrode line 118L and the second common voltage of the second common line 128l, and the dielectric constant ε∥ of the liquid crystal in the liquid crystal layer 130 , and the size of d 'and the area of the second common line 128l contacting the liquid crystal layer 130 and / or the auxiliary spacer 150a.

Referring to FIG. 2, the second common line 128l may receive a second common voltage from the data driving circuit 200. To this end, the second common line 128l may be electrically connected to the data driving circuit 200 through the second common voltage supply wiring 128.

For example, the second common voltage supply wiring 128 includes a lower second common voltage supply wiring 128a disposed on the array substrate 110 and an upper second common voltage supply wiring disposed on the color filter substrate 105 ( 128b) and the horizontal second common voltage supply wiring 128c disposed in the first direction, that is, in the horizontal direction, on the color filter substrate 105. However, the present invention is not limited to this.

The lower second common voltage supply wiring 128a is disposed on the array substrate 110 and electrically connected to the data driving circuit 200 to receive the second common voltage. The upper second common voltage supply wiring 128b is disposed on the color filter substrate 105 and is electrically connected to the lower second common voltage supply wiring 128a through connecting means 160 such as silver dots. Voltage is applied. The horizontal second common voltage supply wiring 128c is disposed on the color filter substrate 105 and is electrically connected to the upper second common voltage supply wiring 128b to transfer the second common voltage to the second common line 128l. Can be.

The second common voltage supply wiring 128 may be formed of a low-resistance opaque metal, for example, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum ( Mo), silver (Ag), silver alloy (Ag alloy), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), It may also include at least one selected from a group of conductive metals containing molybdenum (MoTi), or a combination of two or more thereof, or other suitable materials.

The second common line 128l may be formed of a transparent conductive metal including indium-tin-oxide (ITO) and indium-zinc-oxide (IZO), or the low-resistance opaque metal described above. When the second common line 128l is formed of a low-resistance opaque metal, it may extend in the first direction to form a horizontal second common voltage supply wiring 128c.

On the other hand, the auxiliary spacer 150a according to the first embodiment of the present invention, the upper auxiliary spacer separated into two by left and right by the liquid crystal layer 130 on the lower auxiliary spacer 150a 'and the lower auxiliary spacer 150a' ( 150a "). However, the present invention is not limited thereto.

The second common line 128l may be disposed on the surface of the color filter substrate 105 between the two upper auxiliary spacers 150a "while simultaneously surrounding the side and lower surfaces of the two upper auxiliary spacers 150a". .

In this case, d 'is the distance between the second common line 128l and the lower auxiliary spacer 150a' disposed on the surface of the color filter substrate 105, and is the second common at the thickness d of the liquid crystal layer 130. It may have a value excluding the thickness of the line 128l and the lower auxiliary spacer 150a '.

Meanwhile, the spacers 150a, 150b, and 150c include a gap spacer 150b for maintaining a spaced gap between the color filter substrate 105 and the array substrate 110 in addition to the aforementioned auxiliary spacer 150a. It may include a pressing spacer 150c to prevent pressing. However, the present invention is not limited to this, and when the auxiliary spacer 150a serves as the gap spacer 150b, the gap spacer 150b may be omitted.

The pressing spacer 150c serves to prevent light leakage due to pressing applied to the liquid crystal panel 100 from the outside.

In more detail, when the external force such as pressing from the outside is applied to the liquid crystal panel 100, light leakage is generated. This light leakage defect is caused by the sliding between the array substrate 110 and the color filter substrate 105 due to external force, which causes the warpage of the liquid crystal panel 100. That is, in the bending direction of the liquid crystal panel 100, the rubbing direction of the array substrate 110 and the color filter substrate 105 is not parallel, which causes the array substrate 110 and the color filter substrate 105 to be adjacent to the surfaces. The liquid crystals are arranged in parallel in the bending direction, so that they are arranged differently from the initial state as a whole.

In this case, the arrangement of the liquid crystal is unable to maintain the initial black state, and the light passing through the liquid crystal layer 130 rotates while undergoing a retardation different from that of the normal portion, resulting in light leakage.

For the above reasons, the pressing spacer 150c is required in addition to the gap spacer 150b. Since the gap spacer 150b functions to maintain a spaced gap between the array substrate 110 and the color filter substrate 105, the gap spacer 150b should be configured to contact the two substrates 105 and 110, and the pressed spacer 150c It should be spaced apart from any one of the two substrates (105, 110).

It is advantageous in terms of image quality that the spacers 150a, 150b, and 150c of the present invention are positioned in a region avoiding them, rather than in a pixel region. Therefore, it is located in the region where the thin film transistor TR is located and the gate line 116, the data line 117, or the first common line 108l, and in particular, the gap spacer 150b corresponds to the thin film transistor TR. ), And the pressed spacer 150c may be positioned corresponding to the gate line 116 or the data line 117. Also, the auxiliary spacer 150a may be positioned above the first common line 108l. However, the present invention is not limited to this.

The liquid crystal display device according to the present invention configured as described above prevents deterioration of image quality by changing a required storage capacitance value for each frequency when a driving frequency is variable. To this end, the present invention forms an electric field together with the lower pixel electrode line 118L by applying a second common voltage to the upper second common line 128l, and the voltage of the liquid crystal is greater than or equal to a predetermined threshold voltage Vth. When applied, the size of the second storage capacitor Cst_var is determined by the horizontal dielectric constant (ε∥), whereas when applied below Vth, the size of the second storage capacitor Cst_var is determined and adjusted by the vertical dielectric constant (ε 조절) This is possible.

At this time, the size of the second storage capacitor Cst_var is changed according to the size of the second common voltage by adjusting the distance and the overlapping area between the upper second common line 128l and the lower pixel electrode line 118L. Can be.

That is, the size of the second storage capacitor Cst_var may be changed according to the size of the second common voltage according to the variable driving frequency.

Hereinafter, a laminated structure of the liquid crystal display device according to the first embodiment of the present invention configured as described above will be described in detail.

The gate line 116, the gate electrode 121 and the first common line 108l may be disposed on the same layer on the array substrate 110.

The gate electrode 121 may form part of the gate line 116.

The gate line 116 and the first common line 108l may be arranged in a first direction.

At this time, the shielding line 108a may be disposed on at least one side of the data line 117, and the shielding line 108a may be connected to the first common line 108l. However, the present invention is not limited to this.

The shielding line 108a may be disposed in a second direction different from the first direction, and may shield the interference of the data signal with respect to the transverse electric field.

One end of the shielding line 108a may be connected to the connection line 108b arranged in the first direction, but the present invention is not limited thereto.

The gate line 116, the gate electrode 121, the shielding line 108a, and the connection line 108b may be formed as a first metal layer on the array substrate 110.

As the first metal layer, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy), gold (Au) ), Including gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum titanium (MoTi), copper / molybdenum titanium (Cu / MoTi) It may also include at least one selected from conductive metal groups, or a combination of two or more thereof, or other suitable materials.

A first insulating layer 115a may be provided on the gate line 116, the gate electrode 121, the shielding line 108a, and the connection line 108b.

As the first insulating layer 115a, a silicon (Si) -based oxide film, a nitride film, or a compound containing the same, and a metal oxide film containing Al ₂ O ₃ (metal oxide), an organic insulating film, and a low dielectric constant (low- k) may include a material having a value.

For example, as the first insulating layer 115a, silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O). , Or a combination of two or more of these, or other suitable materials.

The active layer 124 may be disposed on the first insulating layer 115a.

The active layer 124 may be formed of a semiconductor layer.

As the semiconductor layer, amorphous silicon (a-Si), low temperature polysilicon (LTPS), oxide semiconductor of IGZO series, compound semiconductor, carbon nano tube, graphene and organic semiconductor And the like.

As the oxide semiconductor, one or more materials selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga), and aluminum (Al) and zinc ( Zn) may be made of a material in which silicon (Si) is added to the oxide semiconductor. For example, the semiconductor layer may be made of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc composite oxide (InZnO).

When the semiconductor layer is made of SIZO, the composition ratio of the atomic content of silicon (Si) to the total content of zinc (Zn), indium (In) and silicon (Si) atoms in the active layer is about 0.001% by weight (wt%) to about 30 It may also be wt%. The higher the silicon (Si) atom content is, the stronger the role of controlling electron generation is, the lower the mobility may be, but the stability of the device may be improved.

As the oxide semiconductor, in addition to the above-mentioned materials, Group I elements such as lithium (Li) or potassium (K), Group II elements such as magnesium (Mg), calcium (Ca) or strontium (Sr), gallium (Ga), aluminum Group III elements such as (Al), indium (In) or yttrium (Y), elements of Group IV such as titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge), tantalum (Ta), a group V element such as vanadium (V), niobium (Nb) or antimony (Sb), or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm) , Samarium (Sm), Europium (Eu), Gadolinium (Gd), Terbium (Tb), Dysprosium (Dy), Holmium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb) or Ruthedium A lanthanide (Ln) -based element such as (Lu) may be further included.

The data line 117, the source electrode 122, and the drain electrode 123 may be disposed on the same layer on the active layer 124.

When the data line 117 and the active layer 124 are formed in the same mask process, a semiconductor pattern made of the same semiconductor layer as the active layer 124 may be disposed under the data line 117. However, the present invention is not limited thereto, and when the data line 117 and the active layer 124 are formed in different mask processes, a semiconductor pattern may not be disposed under the data line 117.

The data line 117, the source electrode 122, and the drain electrode 123 may be formed of a second metal layer.

As the second metal layer, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy), gold (Au) ), Including gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum titanium (MoTi), copper / molybdenum titanium (Cu / MoTi) It may also include at least one selected from conductive metal groups, or a combination of two or more thereof, or other suitable materials.

As described above, the data line 117 may be disposed in a second direction different from the first direction to partition the plurality of sub-pixels P together with the gate line 116.

The data line 117 may have a bent structure together with the shielding line 108a, but the present invention is not limited thereto.

The gate electrode 121 connected to the gate line 116, the active layer 124 disposed on the gate electrode 121, the source electrode 122 connected to the data line 117 and the source electrode 122 are disposed to face each other The drain electrode 123 may constitute a thin film transistor TR.

The drain electrode 123 may extend above the first common line 108l to form a first storage capacitor Cst_ovl. That is, the first storage capacitor Cst_ovl includes the first common layer 108l and the drain electrode 123 facing each other, and the first insulating layer interposed between the first common line 108l and the drain electrode 123 ( 115a).

The second insulating layer 115b may be disposed on the same layer on the data line 117, the source electrode 122, and the drain electrode 123.

As the second insulating layer 115b, a silicon (Si) -based oxide film, a nitride film, or a compound containing the same, and a metal oxide film containing Al ₂ O ₃ (metal oxide), an organic insulating film, and a low dielectric constant (low- k) may include a material having a value.

For example, as the second insulating layer 115b, silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O). , Or a combination of two or more of these, or other suitable materials.

The common electrode 108 and the pixel electrode 118 may be disposed on the same layer on the second insulating layer 115b.

The pixel electrode 118 may be alternately disposed with the common electrode 108 in the sub-pixel P to form a lateral electric field.

The plurality of common electrodes 108 may be disposed within the sub-pixel P in the form of a finger or a herringbone, but the present invention is not limited thereto, and the common electrode 108 may be in a vertical direction. It may be arranged in a straight line in a horizontal direction.

The plurality of pixel electrodes 118 may be disposed in the sub-pixel P in the form of a finger or a herringbone, but the present invention is not limited thereto, and the pixel electrode 118 may be in a vertical direction. It may be arranged in a straight line in a horizontal direction.

A portion of the second insulating layer 115b may be removed to form a first contact hole 140a exposing a portion of the drain electrode 123. Also, a second contact hole 140b exposing a portion of the first common line 108l may be formed by removing portions of the second insulating layer 115b and the first insulating layer 115a.

One end of the plurality of pixel electrodes 118 may be connected to the pixel electrode line 118L arranged side by side with respect to the gate line 116. Therefore, the pixel electrode line 118L may be electrically connected to the drain electrode 123 through the first contact hole 140a.

The common electrode 108 may include an outermost common electrode 108 ′ disposed on the data line 117 located at the edge of the sub-pixel P.

The plurality of common electrodes 108 including the outermost common electrode 108 'may be connected to a common electrode line 108 ", one end of which is arranged in the first direction. And, the outermost common electrode 108' The other end of) may be electrically connected to the first common line 108l through the second contact hole 140b to apply the first common voltage to the common electrode 108.

The array substrate 110 configured as described above is bonded to the upper color filter substrate 105 to form the liquid crystal panel 100, and the liquid crystal layer 130 is filled between the array substrate 110 and the color filter substrate 105. . In addition, a plurality of spacers 150a, 150b, and 150c for maintaining a gap between two substrates 105 and 110 may be configured between the color filter substrate 105 and the array substrate 110.

In this case, the spacers 150a, 150b, and 150c maintain a spaced gap between the auxiliary spacer 150a implementing the second storage capacitor Cst_var and the color filter substrate 105 and the array substrate 110. It may include a gap spacer (150b) for preventing the pressing spacer (150c) for preventing the pressing. However, the present invention is not limited to this, and when the auxiliary spacer 150a serves as the gap spacer 150b, the gap spacer 150b may be omitted.

The second storage capacitor Cst_var includes the liquid crystal layer 130 interposed between the pixel electrode line 118L and the second common line 128l and the pixel electrode line 118L and the second common line 128l facing each other. And / or auxiliary spacers 150a.

The size of the second storage capacitor Cst_var can be controlled by the pixel voltage of the pixel electrode line 118L and the second common voltage of the second common line 128l, and the dielectric constant ε∥ of the liquid crystal in the liquid crystal layer 130 , and the size of d 'and the area of the second common line 128l contacting the liquid crystal layer 130 and / or the auxiliary spacer 150a.

At this time, the auxiliary spacer 150a according to the first embodiment of the present invention, the upper auxiliary spacer separated into two by left and right by the liquid crystal layer 130 on the lower auxiliary spacer 150a 'and the lower auxiliary spacer 150a' 150a "), but the present invention is not limited thereto.

The second common line 128l may be disposed on the surface of the color filter substrate 105 between the two upper auxiliary spacers 150a "while simultaneously surrounding the side and lower surfaces of the two upper auxiliary spacers 150a". .

Meanwhile, as described above, the auxiliary spacer 150a may serve as a gap spacer, which will be described in detail with reference to the drawings.

7 is a cross-sectional view showing another example of a liquid crystal display device according to a first embodiment of the present invention.

Another example of the liquid crystal display device according to the first embodiment of the present invention shown in FIG. 7 is the above-described FIGS. 2 to 6 except that the gap spacer is omitted as the auxiliary spacer 150a functions as a gap spacer. It has a substantially same configuration as the liquid crystal display according to the first embodiment of the present invention shown in. Therefore, the same reference numerals are used for the same configuration, and a description thereof will be omitted.

Referring to FIG. 7, the liquid crystal capacitor Cst_lc may be formed of a pixel electrode 118 and a common electrode 108 facing each other, and a liquid crystal layer 130 filled between the pixel electrode 118 and the common electrode 108. have.

The pixel electrode 118 is electrically connected to the drain electrode 123 of the thin film transistor TR through the first contact hole 140a to receive a pixel voltage, and the common electrode 108 is a second contact hole (not shown) ) To be electrically connected to the first common line 108l to receive a first common voltage. An electric field is generated between the pixel electrode 118 and the common electrode 108 due to a voltage difference between the pixel voltage and the first common voltage, thereby changing the arrangement of liquid crystal molecules to display an image.

The first and second storage capacitors Cst_ovl and Cst_var are connected in parallel to the liquid crystal capacitor Cst_lc to store the data voltage applied to the pixel electrode 118, that is, the pixel voltage until the next frame.

The first storage capacitor Cst_ovl includes the first common line 108l and the drain electrode 123 facing each other, and the first insulating layer 115a interposed between the first common line 108l and the drain electrode 123. It can be composed of.

The second storage capacitor Cst_var includes the liquid crystal layer 130 interposed between the pixel electrode line 118L and the second common line 128l and the pixel electrode line 118L and the second common line 128l facing each other. And / or auxiliary spacers 150a.

The size of the second storage capacitor Cst_var can be controlled by the pixel voltage of the pixel electrode line 118L and the second common voltage of the second common line 128l, and the dielectric constant ε∥ of the liquid crystal in the liquid crystal layer 130 , and the size of d 'and the area of the second common line 128l contacting the liquid crystal layer 130 and / or the auxiliary spacer 150a.

As described above, the auxiliary spacer 150a according to the first embodiment of the present invention is divided into two upper and lower left and right sides by the liquid crystal layer 130 on the lower auxiliary spacer 150a 'and the lower auxiliary spacer 150a'. Spacer 150a ". However, the present invention is not limited thereto.

The second common line 128l may be disposed on the surface of the color filter substrate 105 between the two upper auxiliary spacers 150a "while simultaneously surrounding the side and lower surfaces of the two upper auxiliary spacers 150a". .

In this case, d 'is the distance between the second common line 128l and the lower auxiliary spacer 150a' disposed on the surface of the color filter substrate 105, and is the second common at the thickness d of the liquid crystal layer 130. It may have a value excluding the thickness of the line 128l and the lower auxiliary spacer 150a '.

At this time, the spacers 150a and 150c may include a pressing spacer 150c to prevent pressing in addition to the aforementioned auxiliary spacer 150a, and when the auxiliary spacer 150a serves as a gap spacer, the gap spacer is Can be omitted.

It is advantageous in terms of image quality that the spacers 150a and 150c of the present invention are positioned in a region avoiding them, rather than in a pixel region.

Accordingly, the thin film transistor TR may be located in an area where the gate line 116, the data line 117, or the first common line 108l is located, and, in particular, the pressed spacer corresponding to the thin film transistor TR. 150c may be positioned, and the auxiliary spacer 150a may be positioned above the first common line 108l. However, the present invention is not limited to this.

8 is a plan view showing an example of an array substrate of a liquid crystal display according to a second embodiment of the present invention.

9 is a view schematically showing a cross-section cut along the line B-B 'in the liquid crystal display device according to the second embodiment of the present invention shown in FIG. 8.

The liquid crystal display device according to the second embodiment of the present invention shown in FIGS. 8 and 9 has substantially the same configuration as the first embodiment of the present invention, except for the auxiliary spacer.

In this case, the liquid crystal display according to the second embodiment of the present invention may include a display panel in which a plurality of sub-pixels are arranged in a matrix form and a driving circuit for driving the display panel. The liquid crystal display device according to the present invention may be configured as a variable refresh rate (VRR) type liquid crystal display device in which the frequency fluctuates according to the displayed image.

Referring to FIGS. 8 and 9, the display panel of the second embodiment of the present invention may be largely formed by bonding the color filter substrate 205 and the array substrate 210 with the liquid crystal layer 230 interposed therebetween.

Although not shown in detail, the color filter substrate 205 may include a color filter configured for each of a plurality of sub-pixels, and a black matrix formed between the color filters. However, the present invention is not limited thereto, and for example, in the case of a color filter on TFT (COT) structure, the color filter may be formed on the array substrate 210 together with the thin film transistor TR.

The array substrate 210 includes a gate line 216 and a data line 217 partitioning a plurality of sub-pixels, and a thin film transistor TR configured at the intersection of the gate line 216 and the data line 217. can do.

In addition, a plurality of spacers 250a, 250b, and 250c for maintaining a gap between two substrates 205 and 210 may be configured between the color filter substrate 205 and the array substrate 210.

The gate line 216 may be disposed on the array substrate 210 in a first direction. Further, the data line 217 may be disposed in a second direction different from the first direction to partition the plurality of sub-pixels with the gate line 216.

The common line 208l may be disposed in the first direction.

In this case, the sub-pixel according to the second embodiment of the present invention includes a thin film transistor TR and a plurality of wirings, that is, a gate line 216, a data line 217, a first common line 208l, and a second common It may be configured to include the liquid crystal capacitor Cst_lc formed by the line 228l and the first and second storage capacitors Cst_ovl and Cst_var.

A plurality of common electrodes 208 and pixel electrodes 218 may be alternately disposed in the sub-pixel.

In this case, the thin film transistor TR includes a gate electrode 221 connected to the gate line 216, an active layer 224 disposed on the gate electrode 221, a source electrode 222 connected to the data line 217, and a source. A drain electrode 223 disposed opposite to the electrode 222 may be included.

That is, the thin film transistor TR functioning as a switching element is connected to the corresponding gate line 216 and the data line 217 to receive a gate voltage and a data voltage, respectively. The gate electrode 221 of the thin film transistor TR is connected to the gate line 216, the source electrode 222 is connected to the data line 217, and the drain electrode 223 connects the first contact hole 240a. It may be connected to the pixel electrode line 218L. Here, the thin film transistor TR may be formed of an active layer 224 using an oxide semiconductor having excellent mobility or off-current characteristics, but the present invention is not limited thereto. When the active layer 224 is formed using amorphous silicon, an ohmic-contact layer 225 may be formed between the active layer 224 and the source / drain electrodes 222 and 223 as shown in FIG. 9. have.

The liquid crystal capacitor Cst_lc may include a pixel electrode 218 and a common electrode 208 facing each other, and a liquid crystal layer 230 filled between the pixel electrode 218 and the common electrode 208.

The pixel electrode 218 is electrically connected to the drain electrode 223 of the thin film transistor TR through the first contact hole 240a to receive the pixel voltage, and the common electrode 208 is the second contact hole 240b The first common voltage may be applied to the first common line 208l by being electrically connected thereto. An electric field is generated between the pixel electrode 218 and the common electrode 208 due to a voltage difference between the pixel voltage and the first common voltage, thereby displaying an image by changing the arrangement of liquid crystal molecules.

The plurality of pixel electrodes 218 may have one end connected to the pixel electrode line 218L and electrically connected to the drain electrode 223 of the thin film transistor TR through the first contact hole 240a.

The common electrode 208 may include an outermost common electrode 208 ′ disposed on the data line 217 located at the edge of the sub-pixel.

The plurality of common electrodes 208 including the outermost common electrode 208 'may be connected to a common electrode line 208 "whose one end is arranged in the first direction. And, the outermost common electrode 208' The other end of) may be electrically connected to the first common line 208l through the second contact hole 240b to apply the first common voltage to the common electrode 208.

Meanwhile, a shield line 208a branched from the first common line 208l may be disposed on a side of the data line 217, and the shield line 208a may be connected to a connection line 208b arranged in the first direction. Can be.

The first and second storage capacitors Cst_ovl and Cst_var are connected in parallel to the liquid crystal capacitor Cst_lc to store the data voltage applied to the pixel electrode 218, that is, the pixel voltage until the next frame.

The first storage capacitor Cst_ovl includes the first common line 208l and the drain electrode 223 facing each other, and the first insulating layer 215a interposed between the first common line 208l and the drain electrode 223. It can be composed of.

The second storage capacitor Cst_var includes the liquid crystal layer 230 interposed between the pixel electrode line 218L and the second common line 228l and the pixel electrode line 218L and the second common line 228l facing each other. And / or auxiliary spacers 250a.

The size of the second storage capacitor Cst_var can be controlled by the pixel voltage of the pixel electrode line 218L and the second common voltage of the second common line 228l, and the dielectric constant ε∥ of the liquid crystal in the liquid crystal layer 230 , and the size of d ′ and the area of the second common line 228l contacting the liquid crystal layer 230 and / or the auxiliary spacer 250a.

Meanwhile, in the auxiliary spacer 250a according to the second embodiment of the present invention, a portion of the center is recessed on the lower auxiliary spacer 250a 'and the lower auxiliary spacer 250a' to fill the liquid crystal layer 230. It may include an auxiliary spacer (250a "). However, the present invention is not limited thereto.

The second common line 228l may be disposed to surround the lower surface including the side and concave center of the upper auxiliary spacer 250a ".

In this case, d 'corresponds to the depth of the concave central portion, and may have a smaller value than the first embodiment of the present invention described above, and as a result, the second storage than the first embodiment of the present invention described above. The size of the capacitor Cst_var can be increased.

Meanwhile, the spacers 250a, 250b, and 250c include a gap spacer 250b for maintaining a spaced gap between the color filter substrate 205 and the array substrate 210 in addition to the aforementioned auxiliary spacer 250a. It may include a pressing spacer 250c to prevent pressing. However, the present invention is not limited thereto, and when the auxiliary spacer 250a serves as the gap spacer 250b, the gap spacer 250b may be omitted.

The auxiliary spacer 250a and the gap spacer 250b should be configured to contact the array substrate 210 and the color filter substrate 205, and the pressed spacer 250c is spaced apart from either of the two substrates 205 and 210 The distance should be kept.

It is advantageous in terms of image quality that the spacers 250a, 250b, and 250c of the present invention are positioned in a region avoiding them, rather than in the pixel region. Therefore, it is located in the region where the thin film transistor TR is located and the gate line 216, the data line 217, or the first common line 208l, and in particular, the gap spacer 250b corresponds to the thin film transistor TR. ), And the pressed spacer 250c may be positioned corresponding to the gate line 216 or the data line 217. Also, the auxiliary spacer 250a may be positioned above the first common line 208l. However, the present invention is not limited to this.

The liquid crystal display device according to the present invention configured as described above prevents deterioration of image quality by changing a required storage capacitance value for each frequency when a driving frequency is variable. To this end, the present invention applies the second common voltage to the upper second common line 228l to form an electric field together with the lower pixel electrode line 218L, and the voltage of the liquid crystal is higher than a predetermined threshold voltage Vth. When applied, the size of the second storage capacitor Cst_var is determined by the horizontal dielectric constant (ε∥), whereas when applied below Vth, the size of the second storage capacitor Cst_var is determined and adjusted by the vertical dielectric constant (ε 조절) This is possible.

At this time, the size of the second storage capacitor Cst_var is changed according to the size of the second common voltage by adjusting the distance and the overlapping area between the upper second common line 228l and the lower pixel electrode line 218L. Can be.

Meanwhile, as described above, the auxiliary spacer 250a may serve as a gap spacer, which will be described in detail with reference to the drawings.

10 is a cross-sectional view showing another example of a liquid crystal display according to a second embodiment of the present invention.

Another example of the liquid crystal display according to the second embodiment of the present invention shown in FIG. 10 is the above-described FIGS. 8 and 9 except that the gap spacer is omitted as the auxiliary spacer 250a functions as a gap spacer It is configured in substantially the same configuration as the liquid crystal display device according to the second embodiment of the present invention shown in FIG. Therefore, the same reference numerals are used for the same configuration, and a description thereof will be omitted.

Referring to FIG. 10, as described above, the liquid crystal capacitor Cst_lc includes a liquid crystal layer 230 filled between the pixel electrode 218 and the common electrode 208 facing each other, and between the pixel electrode 218 and the common electrode 208. ).

The pixel electrode 218 is electrically connected to the drain electrode 223 of the thin film transistor TR through the first contact hole 240a to receive a pixel voltage, and the common electrode 208 is a second contact hole (not shown) ) To be electrically connected to the first common line 208l to receive a first common voltage. An electric field is generated between the pixel electrode 218 and the common electrode 208 due to a voltage difference between the pixel voltage and the first common voltage, thereby displaying an image by changing the arrangement of liquid crystal molecules.

The first and second storage capacitors Cst_ovl and Cst_var are connected in parallel to the liquid crystal capacitor Cst_lc to store the data voltage applied to the pixel electrode 218, that is, the pixel voltage until the next frame.

The first storage capacitor Cst_ovl includes the first common line 208l and the drain electrode 223 facing each other, and the first insulating layer 215a interposed between the first common line 208l and the drain electrode 223. It can be composed of.

The second storage capacitor Cst_var includes the liquid crystal layer 230 interposed between the pixel electrode line 218L and the second common line 228l and the pixel electrode line 218L and the second common line 228l facing each other. And / or auxiliary spacers 250a.

The size of the second storage capacitor Cst_var can be controlled by the pixel voltage of the pixel electrode line 218L and the second common voltage of the second common line 228l, and the dielectric constant ε∥ of the liquid crystal in the liquid crystal layer 230 , and the size of d ′ and the area of the second common line 228l contacting the liquid crystal layer 230 and / or the auxiliary spacer 250a.

As described above, in the auxiliary spacer 250a according to the second embodiment of the present invention, a portion of the center is recessed on the lower auxiliary spacer 250a 'and the lower auxiliary spacer 250a' so that the liquid crystal layer 230 is not filled. May include an upper auxiliary spacer 250a. However, the present invention is not limited thereto.

The second common line 228l may be disposed to surround the lower surface including the side and concave center of the upper auxiliary spacer 250a ".

In this case, d 'corresponds to the depth of the concave central portion, and may have a smaller value than the first embodiment of the present invention described above, and as a result, the second storage than the first embodiment of the present invention described above. The size of the capacitor Cst_var can be increased.

In this case, the spacers 250a and 250c may include a pressing spacer 250c for preventing pressing in addition to the aforementioned auxiliary spacer 250a, and when the auxiliary spacer 250a serves as a gap spacer, the gap spacer is Can be omitted.

It is advantageous in terms of image quality that the spacers 250a and 250c of the present invention are positioned in a region avoiding them, rather than in a pixel region.

Therefore, the thin film transistor TR may be located in an area where the gate line 216, the data line 217, or the first common line 208l is located, and in particular, the pressed spacer corresponding to the thin film transistor TR. 250c may be positioned, and the auxiliary spacer 250a may be positioned above the first common line 208l. However, the present invention is not limited to this.

11 is a plan view showing an example of an array substrate of a liquid crystal display according to a third embodiment of the present invention.

12 is a view schematically showing a cross-section cut along the line C-C 'in the liquid crystal display device according to the third embodiment of the present invention shown in FIG.

The liquid crystal display device according to the third embodiment of the present invention shown in FIGS. 11 and 12 has substantially the same configuration as the first and second embodiments of the present invention except for the auxiliary spacer.

In this case, the liquid crystal display device according to the third embodiment of the present invention may include a display panel in which a plurality of sub-pixels are arranged in a matrix form and a driving circuit for driving the display panel. The liquid crystal display device according to the present invention may be configured as a variable refresh rate (VRR) type liquid crystal display device in which the frequency fluctuates according to the displayed image.

11 and 12, in the display panel of the third embodiment of the present invention, a color filter substrate 305 and an array substrate 310 may be largely bonded to each other with the liquid crystal layer 330 interposed therebetween.

Although not shown in detail, the color filter substrate 305 may include a color filter configured for each of a plurality of sub-pixels, and a black matrix formed between the color filters. However, the present invention is not limited thereto, and for example, in the case of a color filter on TFT (COT) structure, the color filter may be formed on the array substrate 310 together with the thin film transistor TR.

The array substrate 310 includes a gate line 316 and a data line 317 partitioning a plurality of sub-pixels, and a thin film transistor TR configured at the intersection of the gate line 316 and the data line 317. can do.

In addition, a plurality of spacers 350a, 350b, and 350c for maintaining a gap between the two substrates 305 and 310 may be configured between the color filter substrate 305 and the array substrate 310.

The gate line 316 may be disposed on the array substrate 310 in a first direction. Also, the data line 317 may be disposed in a second direction different from the first direction to partition the plurality of sub-pixels with the gate line 316.

The common line 308l may be disposed in the first direction.

In this case, the sub-pixel according to the third embodiment of the present invention includes a thin film transistor TR and a plurality of wirings, that is, a gate line 316, a data line 317, a first common line 308l, and a second common It may be configured to include the liquid crystal capacitor Cst_lc formed by the line 328l and the first and second storage capacitors Cst_ovl and Cst_var.

A plurality of common electrodes 308 and pixel electrodes 318 may be alternately disposed in the sub-pixel.

In this case, the thin film transistor TR includes a gate electrode 321 connected to the gate line 316, an active layer 324 disposed on the gate electrode 321, a source electrode 322 and a source connected to the data line 317. A drain electrode 323 disposed opposite to the electrode 322 may be included.

That is, the thin film transistor TR functioning as a switching element is connected to the corresponding gate line 316 and the data line 317 to receive a gate voltage and a data voltage, respectively. The gate electrode 321 of the thin film transistor TR is connected to the gate line 316, the source electrode 322 is connected to the data line 317, and the drain electrode 323 is connected to the first contact hole 340a. It may be connected to the pixel electrode line 318L. Here, the thin film transistor TR may be formed of an active layer 324 using an oxide semiconductor having excellent mobility or off-current characteristics, but the present invention is not limited thereto. When forming the active layer 324 using amorphous silicon, an ohmic-contact layer 325 may be formed between the active layer 324 and the source / drain electrodes 322 and 323 as shown in FIG. 9. have.

The liquid crystal capacitor Cst_lc may be formed of a pixel electrode 318 and a common electrode 308 facing each other, and a liquid crystal layer 330 filled between the pixel electrode 318 and the common electrode 308.

The pixel electrode 318 is electrically connected to the drain electrode 323 of the thin film transistor TR through the first contact hole 340a to receive a pixel voltage, and the common electrode 308 is the second contact hole 340b It is electrically connected to the first common line 308l to receive a first common voltage. An electric field is generated between the pixel electrode 318 and the common electrode 308 due to a voltage difference between the pixel voltage and the first common voltage to display an image by changing the arrangement of liquid crystal molecules.

The plurality of pixel electrodes 318 may have one end connected to the pixel electrode line 318L and electrically connected to the drain electrode 323 of the thin film transistor TR through the first contact hole 340a.

The common electrode 308 may include an outermost common electrode 308 ′ disposed on the data line 317 located at the edge of the sub-pixel.

The plurality of common electrodes 308 including the outermost common electrode 308 'may be connected to a common electrode line 308 ", one end of which is arranged in the first direction. And, the outermost common electrode 308' The other end of) may be electrically connected to the first common line 308l through the second contact hole 340b to apply the first common voltage to the common electrode 308.

Meanwhile, a shield line 308a branched from the first common line 308l may be disposed on the side of the data line 317, and the shield line 308a may be connected to a connection line 308b arranged in the first direction. Can be.

The first and second storage capacitors Cst_ovl and Cst_var are connected in parallel to the liquid crystal capacitor Cst_lc to store the data voltage applied to the pixel electrode 318, that is, the pixel voltage until the next frame.

The first storage capacitor Cst_ovl includes a first common line 308l and a drain electrode 323 that face each other, and a first insulating layer 315a interposed between the first common line 308l and the drain electrode 323. It can be composed of.

The second storage capacitor Cst_var includes the liquid crystal layer 330 interposed between the pixel electrode line 318L and the second common line 328l and the pixel electrode line 318L and the second common line 328l facing each other. It can be composed of.

The size of the second storage capacitor Cst_var can be controlled by the pixel voltage of the pixel electrode line 318L and the second common voltage of the second common line 328l, and the dielectric constant ε∥ of the liquid crystal in the liquid crystal layer 330 , and the size of d 'and the area of the second common line 328l contacting the liquid crystal layer 330 and / or the auxiliary spacer 350a.

Meanwhile, the auxiliary spacer 350a according to the third embodiment of the present invention may be provided on the surface of the color filter substrate 305 at a predetermined distance d ′ from the pixel electrode line 318L. However, the present invention is not limited to this.

Accordingly, the second common line 328l may be disposed to surround the side and bottom surfaces of the auxiliary spacer 350a.

Meanwhile, the spacers 350a, 350b, and 350c include a gap spacer 350b for maintaining a spaced gap between the color filter substrate 305 and the array substrate 310 in addition to the aforementioned auxiliary spacer 350a. It may include a pressing spacer 350c to prevent pressing. However, the present invention is not limited thereto, and when the auxiliary spacer 350a serves as the pressing spacer 350c, the pressing spacer 350c may be omitted.

The gap spacer 350b should be configured to contact the array substrate 310 and the color filter substrate 305, and the auxiliary spacer 350a and the pressed spacer 350c are separated from any one of the two substrates 305, 310. The distance should be kept.

It is advantageous in terms of image quality that the spacers 350a, 350b, and 350c of the present invention are positioned in a region avoiding them, rather than in the pixel region. Therefore, it is located in the region where the thin film transistor TR is located and the gate line 316, the data line 317, or the first common line 308l, and in particular, the gap spacer 350b corresponds to the thin film transistor TR. ), And the pressed spacer 350c may be positioned corresponding to the gate line 316 or the data line 317. Also, the auxiliary spacer 350a may be positioned above the first common line 308l. However, the present invention is not limited to this.

The liquid crystal display device according to the present invention configured as described above prevents deterioration of image quality by changing a required storage capacitance value for each frequency when a driving frequency is variable. To this end, the present invention applies the second common voltage to the upper second common line 328l to form an electric field together with the lower pixel electrode line 318L, and the voltage of the liquid crystal is higher than a predetermined threshold voltage Vth. When applied, the size of the second storage capacitor Cst_var is determined by the horizontal dielectric constant (ε∥), whereas when applied below Vth, the size of the second storage capacitor Cst_var is determined and adjusted by the vertical dielectric constant (ε 조절) This is possible.

At this time, the size of the second storage capacitor Cst_var is changed according to the size of the second common voltage by adjusting the distance between the second common line 328l at the top and the pixel electrode line 318L at the bottom and the overlapping area. Can be.

On the other hand, as described above, the auxiliary spacer 350a may serve as a pressed spacer, which will be described in detail with reference to the drawings.

13 is a cross-sectional view showing another example of a liquid crystal display according to a third embodiment of the present invention.

Another example of the liquid crystal display according to the third embodiment of the present invention shown in FIG. 13 is the above-described FIGS. 11 and 12 except that the pressing spacer is omitted as the auxiliary spacer 350a functions as a pressing spacer. It has a substantially same configuration as the liquid crystal display device according to the third embodiment of the present invention. Therefore, the same reference numerals are used for the same configuration, and a description thereof will be omitted.

Referring to FIG. 13, as described above, the liquid crystal capacitor Cst_lc includes a liquid crystal layer 330 filled between the pixel electrode 318 and the common electrode 308 and the pixel electrode 318 and the common electrode 308 facing each other. ).

The pixel electrode 318 is electrically connected to the drain electrode 323 of the thin film transistor TR through the first contact hole 340a to receive a pixel voltage, and the common electrode 308 is a second contact hole (not shown) ) To be electrically connected to the first common line 308l to receive a first common voltage. An electric field is generated between the pixel electrode 318 and the common electrode 308 due to a voltage difference between the pixel voltage and the first common voltage to display an image by changing the arrangement of liquid crystal molecules.

The first and second storage capacitors Cst_ovl and Cst_var are connected in parallel to the liquid crystal capacitor Cst_lc to store the data voltage applied to the pixel electrode 318, that is, the pixel voltage until the next frame.

The first storage capacitor Cst_ovl includes the first common line 308l and the drain electrode 323 facing each other, and the first insulating layer 315a interposed between the first common line 308l and the drain electrode 323. It can be composed of.

The second storage capacitor Cst_var includes the liquid crystal layer 330 interposed between the pixel electrode line 318L and the second common line 328l and the pixel electrode line 318L and the second common line 328l facing each other. It can be composed of.

The size of the second storage capacitor Cst_var can be controlled by the pixel voltage of the pixel electrode line 318L and the second common voltage of the second common line 328l, and the dielectric constant ε∥ of the liquid crystal in the liquid crystal layer 330 , and the size of d 'and the area of the second common line 328l contacting the liquid crystal layer 330 and / or the auxiliary spacer 350a.

As described above, the auxiliary spacer 350a according to the third embodiment of the present invention may be disposed of the color filter substrate 305 at a predetermined distance d ′ from the pixel electrode line 318L on the pixel electrode line 318L. It may be provided on the surface. However, the present invention is not limited to this.

Accordingly, the second common line 328l may be disposed to surround the side and bottom surfaces of the auxiliary spacer 350a.

In this case, the spacers 350a and 350b may include a gap spacer 350b for maintaining the gap between the two substrates 305 and 310 constant in addition to the aforementioned auxiliary spacer 350a, and the auxiliary spacer 350a If is the role of the pressed spacer, the pressed spacer may be omitted.

It is advantageous in terms of image quality that the spacers 350a and 350b of the present invention are positioned in a region avoiding them, rather than in a pixel region.

Therefore, the thin film transistor TR may be located in an area where the gate line 316, the data line 317, or the first common line 308l is located, and in particular, a gap spacer corresponding to the thin film transistor TR. The 350b may be positioned, and the auxiliary spacer 350a may be positioned above the first common line 308l. However, the present invention is not limited to this.

Exemplary embodiments of the present invention can be described as follows.

The liquid crystal display according to an exemplary embodiment of the present invention includes an array substrate and a color filter substrate which are oppositely bonded through a liquid crystal layer, a plurality of gate lines and data lines that define a plurality of sub-pixels across the array substrate, A plurality of common electrodes and pixel electrodes alternately disposed in the sub-pixel, a first common line disposed in parallel to the gate line, connected to the common electrode, a thin film transistor disposed in the sub-pixel, the plurality A pixel electrode line electrically connected to a drain electrode of the thin film transistor, a second common line disposed on the color filter substrate facing the pixel electrode line, and the color filter substrate and the array substrate Disposed between the second common line and the pixel electrode line to configure a variable capacitor Spacers may be included.

According to another aspect of the present invention, the thin film transistor is a gate electrode connected to the gate line, an active layer disposed on the gate electrode, a source electrode connected to the data line and the source electrode, the pixel electrode It may include a drain electrode electrically connected to.

According to another feature of the present invention, a liquid crystal display device is disposed to abut between the color filter substrate and the array substrate, and a gap for maintaining a spaced gap between the color filter substrate and the array substrate Spacers may be further included.

According to another feature of the present invention, the liquid crystal display device may further include a pressing spacer disposed to be spaced apart from any one of the color filter substrate and the array substrate.

According to another feature of the invention, the liquid crystal capacitor may be composed of the liquid crystal layer filled between the pixel electrode and the common electrode and the pixel electrode and the common electrode.

According to another feature of the invention, the variable capacitor, the liquid crystal layer and / or the spacer interposed between the pixel electrode line and the second common line and the pixel electrode line and the second common line facing each other It can be composed of.

According to another feature of the present invention, the second common line may be electrically connected to the data driving circuit through the second common voltage supply wiring to receive a second common voltage.

According to another aspect of the invention, the second common voltage supply wiring, the lower second common voltage supply wiring disposed on the array substrate, the upper second common voltage supply wiring disposed on the color filter substrate and the color filter The substrate may include a horizontal second common voltage supply wiring arranged side by side with respect to the gate line.

According to another feature of the present invention, the upper second common voltage supply wiring may be electrically connected to the lower second common voltage supply wiring through a connecting means of silver dots to receive the second common voltage.

According to another feature of the present invention, the second common line may extend in the gate line direction to constitute the horizontal second common voltage supply wiring.

According to another feature of the present invention, the spacer may include a lower spacer located on the array substrate and an upper spacer separated into at least two left and right sides by the liquid crystal layer on the lower spacer.

According to another feature of the present invention, the second common line may surround a side surface and a bottom surface of the at least two upper spacers, and be disposed on the surface of the color filter substrate between the at least two upper spacers. .

According to another feature of the invention, the spacer may serve as a gap spacer.

According to another feature of the present invention, the spacer may include a lower spacer located in the array substrate and an upper spacer in which a portion of the center is recessed and filled with the liquid crystal layer on the lower spacer.

According to another feature of the present invention, the second common line may be disposed to surround the lower surface including the side of the upper spacer and the center of the recess.

According to another feature of the invention, the variable capacitor may be composed of the liquid crystal layer interposed between the pixel electrode line and the second common line and the pixel electrode line and the second common line facing each other. .

According to another feature of the present invention, the spacer may be provided on the surface of the color filter substrate at a predetermined distance from the pixel electrode line.

According to another feature of the present invention, the second common line may surround side and bottom surfaces of the spacer.

According to another feature of the invention, the spacer can serve as a pressed spacer.

The liquid crystal display according to another exemplary embodiment of the present invention includes an array substrate and a color filter substrate, which are oppositely bonded through a liquid crystal layer, and a plurality of gate lines and data lines that define a plurality of sub-pixels across the array substrate. , A plurality of common electrodes and pixel electrodes alternately disposed in the sub-pixel, a first common line connected to the common electrode to supply a first common voltage, the pixel electrode and the common electrode, and the pixel electrode and the common A liquid crystal capacitor composed of the liquid crystal layer filled between the electrodes, a pixel electrode line connected to the plurality of pixel electrodes and supplying a pixel voltage, and disposed on the color filter substrate facing the pixel electrode line to generate a second common voltage. It is disposed between the second common line and the color filter substrate and the array substrate to be supplied, and the second common line and phase Includes a spacer constituting a variable capacitor with the pixel electrode line, and if necessary the drive of variable frequency, wherein the second common voltage to said variable capacitor values needed for each frequency can be changed by adjusting the size.

The embodiments of the present invention have been described in more detail with reference to the accompanying drawings, but the present invention is not necessarily limited to these embodiments, and may be variously modified without departing from the technical spirit of the present invention. . Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The scope of protection of the present invention should be interpreted by the claims below, and all technical spirits within the equivalent range should be interpreted as being included in the scope of the present invention.

108, 208, 308: common electrode
108 ', 208', 308 ': outermost common electrode
108 ", 208", 308 ": common electrode lines
108a, 208a, 308a: shielded lines
108b, 208b, 308b: connecting line
108l, 208l, 308l: first common line
116, 216, 316: gate line
117, 217, 317: data line
118, 218, 318: pixel electrode
118L, 218L, 318L: Pixel electrode line
121, 221, 321: gate electrode
122, 222, 322: source electrode
123, 223, 323: drain electrode
124, 224, 324: active layer
128: second common voltage supply wiring
128a: lower second common voltage supply wiring
128b: upper second common voltage supply wiring
128c: Horizontal second common voltage supply wiring
128l, 228l, 328l: second common line
130, 230, 330: liquid crystal layer
150a, 250a, 350a: auxiliary spacer
150a ', 250a', 350a ': lower auxiliary spacers
150a ", 250a", 350a ": lower auxiliary spacer
160: connection means
Cst_lc: liquid crystal capacitor
Cst_ovl: first storage capacitor
Cst_var: Second storage capacitor
TR: Thin film transistor

Claims (20)

An array substrate and a color filter substrate which are oppositely bonded through a liquid crystal layer;
A plurality of gate lines and data lines crossing over the array substrate to define a plurality of sub-pixels;
A plurality of common electrodes and pixel electrodes alternately disposed in the sub-pixels;
A first common line disposed parallel to the gate line and connected to the common electrode;
A thin film transistor disposed in the sub-pixel;
A pixel electrode line connected to the plurality of pixel electrodes and electrically connected to a drain electrode of the thin film transistor;
A second common line disposed on the color filter substrate facing the pixel electrode line; And
And a spacer configured between the color filter substrate and the array substrate and constituting a variable capacitor together with the second common line and the pixel electrode line. According to claim 1,
The thin film transistor,
A gate electrode connected to the gate line;
An active layer disposed on the gate electrode;
A source electrode connected to the data line; And
And a drain electrode disposed opposite to the source electrode and electrically connected to the pixel electrode. According to claim 1,
The liquid crystal display device is disposed to abut between the color filter substrate and the array substrate, and further includes a gap spacer for maintaining a spaced gap between the color filter substrate and the array substrate. According to claim 1,
And a pressing spacer disposed to be spaced apart from any one of the color filter substrate and the array substrate. According to claim 1,
The liquid crystal capacitor comprises a liquid crystal layer filled between the pixel electrode and the common electrode, and the pixel electrode and the common electrode. According to claim 1,
The variable capacitor is composed of the liquid crystal layer and / or the spacer interposed between the pixel electrode line and the second common line and the pixel electrode line and the second common line facing each other. According to claim 1,
The second common line is electrically connected to a data driving circuit through a second common voltage supply wiring to receive a second common voltage. The method of claim 7,
The second common voltage supply wiring,
A lower second common voltage supply wiring disposed on the array substrate;
An upper second common voltage supply wiring disposed on the color filter substrate; And
And a horizontal second common voltage supply wiring arranged side by side with respect to the gate line on the color filter substrate. The method of claim 8,
The upper second common voltage supply wiring is electrically connected to the lower second common voltage supply wiring through a connecting means of silver dots to receive the second common voltage. The method of claim 8,
The second common line extends in the direction of the gate line to constitute the horizontal second common voltage supply wiring. According to claim 1,
The spacer includes a lower spacer located on the array substrate and an upper spacer separated into at least two left and right sides by the liquid crystal layer on the lower spacer. The method of claim 11,
The second common line surrounds a side surface and a bottom surface of the at least two upper spacers, and is disposed on a surface of the color filter substrate between the at least two upper spacers. The method of claim 12,
The spacer serves as a gap spacer, a liquid crystal display device. According to claim 1,
The spacer includes a lower spacer located on the array substrate and an upper spacer in which a portion of the center is recessed and filled with the liquid crystal layer on the lower spacer. The method of claim 14,
The second common line is disposed to surround the lower surface including the side of the upper spacer and the recessed center. According to claim 1,
The variable capacitor is composed of the liquid crystal layer interposed between the pixel electrode line and the second common line and the pixel electrode line and the second common line facing each other. The method of claim 16,
The spacer is provided on a surface of the color filter substrate at a predetermined distance from the pixel electrode line, and the liquid crystal display device. The method of claim 17,
The second common line surrounds a side surface and a bottom surface of the spacer. The method of claim 18,
The spacer serves as a pressed spacer, a liquid crystal display device. An array substrate and a color filter substrate which are oppositely bonded through a liquid crystal layer;
A plurality of gate lines and data lines crossing over the array substrate to define a plurality of sub-pixels;
A plurality of common electrodes and pixel electrodes alternately disposed in the sub-pixels;
A first common line connected to the common electrode to supply a first common voltage;
A liquid crystal capacitor composed of the pixel electrode and the common electrode, and the liquid crystal layer filled between the pixel electrode and the common electrode;
A pixel electrode line connected to the plurality of pixel electrodes and supplying a pixel voltage;
A second common line disposed on the color filter substrate facing the pixel electrode line to supply a second common voltage; And
It is disposed between the color filter substrate and the array substrate, and includes a spacer constituting a variable capacitor together with the second common line and the pixel electrode line,
When it is necessary to vary the driving frequency, the liquid crystal display device changes the value of the variable capacitor required for each frequency by adjusting the magnitude of the second common voltage.

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