KR20190017603A - Source driver and display apparatus including the same - Google Patents

Abstract

A data driver capable of reducing power consumption according to an embodiment of the present invention comprises: a latch unit storing sequentially inputted first and second data; a comparison unit receiving the first and second data from the latch unit and outputting a comparison signal according to a result of comparing the received first and second data; a digital-to-analog converting unit outputting an analog signal according to a result of converting the second data stored in the latch unit through a digital-to-analog method; an output unit providing a driving current for driving a display panel based on a bias signal and the analog signal; and a bias unit adjusting the bias signal based on the comparison signal. A value of the driving current of the output unit is adjusted based on the bias signal adjusted by the bias unit.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a data driver,

Embodiments relate to a data driver and a display device including the same.

The data driver drives the source line of the display panel and includes a latch for storing data, a level shifter for converting the voltage level of the stored data, a digital-to-analog converter for converting the voltage level converted data into an analog signal, And output buffers for amplifying and outputting to the source line.

In driving a liquid crystal panel, when a voltage is applied only to one direction of a liquid crystal of a pixel, deterioration of the liquid crystal is promoted. Therefore, inversion is used to periodically apply the image data voltage applied to the liquid crystal in the opposite polarity.

The data driver may serve to charge a charge of a capacitor of a pixel by applying a specific voltage to the pixels of the display panel.

Embodiments provide a data driver capable of reducing power consumption while preventing screen deterioration and a display device including the data driver.

A data driver according to an embodiment of the present invention includes: a latch unit that sequentially stores first data and second data; A comparator for receiving the first data and the second data from the latch unit and outputting a comparison signal according to a result of comparing the first data and the second data received; A digital-analog converter for outputting an analog signal according to a result of digital-analog conversion of the second data stored in the latch unit; An output unit for providing a driving current for driving the display panel based on the bias signal and the analog signal; And a bias unit for adjusting the bias signal based on the comparison signal, wherein a current value of the driving current of the output unit can be adjusted based on the bias signal adjusted by the bias unit.

Wherein the comparator outputs a comparison signal having a first logic value when the first data and the second data are identical to each other and outputs a comparison signal having a second logic value when the first data and the second data are not identical, And the first logic value and the second logic value may be different from each other.

The comparison unit may generate the comparison signal based on a result of logarithmically multiplying the first data and the second data.

Wherein the latch unit comprises: a first latch unit for storing the first data; And a second latch unit for storing the second data, wherein the second latch unit receives the first data stored in the first latch unit and stores the received first data as the second data .

The comparison unit may receive the first data stored in the first latch unit and the second data stored in the second latch unit.

The number of bits of the first data and the number of bits of the second data may be equal to each other.

Wherein the comparison unit outputs a first logical value according to a result obtained by logically multiplying each bit of the first data and a bit corresponding to the bit of the second data; And a second logical operation unit for generating a second logical value according to a logical multiplication result of the first logical values and outputting the second logical value as the comparison signal.

Wherein the first logical operation unit includes a plurality of AND gates and each of the plurality of AND gates includes either one of the bits of the first data and a corresponding one of the bits of the second data, can do.

The bias unit may adjust the voltage level of the bias signal based on the comparison signal.

Wherein the output section includes a differential amplifier and the tail current of the differential amplifier is adjusted based on the voltage level of the bias signal adjusted by the bias section and the current value of the drive current is adjusted based on the adjusted tail current Lt; / RTI >

The first data is data for driving the Kth (K > 1 natural) row of pixels of the display panel, and the second data is data for driving pixels of the (K + 1) th row of the display panel .

A display device according to an embodiment includes a display panel including gate lines, data lines, pixels connected to the gate lines and the data lines and arranged in a matrix form in rows and columns; A data driver for driving the data lines; And a gate driver for driving the gate lines, and the data driver may be a data driver according to the above-described embodiment.

An embodiment of the present invention relates to a method of driving a display panel including pixels arranged in a matrix form connected to gate lines, data lines, the gate lines and the data lines and arranged in rows and columns, Receiving first data for driving pixels of the Kth column (K > = 1) and storing the received first data; Receiving second data for driving pixels in the (K + 1) th row of the display panel, and storing the received second data; And determining whether the stored first data and the stored second data are identical; And adjusting the current value of the driving current for driving the pixels in the (K + 1) th row to the first current value or the second current value according to the discriminated result.

And adjust the current value of the driving current to the first current value when the first data and the second data are not the same.

The current value of the driving current may be adjusted to the second current value when the first data and the second data are identical, and the second current value may be smaller than the first current value.

The number of bits of the first data and the number of bits of the second data may be equal to each other.

The determining step may determine whether the stored first data and the stored second data are the same based on a result of logically multiplying the first data and the second data.

The embodiment can reduce the power consumption while preventing deterioration of the screen.

Figure 1 shows a schematic block diagram of a data driver according to an embodiment.
Fig. 2 shows an embodiment of the comparing unit shown in Fig.
FIG. 3 shows an embodiment of the logic operation unit shown in FIG.
Fig. 4A is a conceptual diagram for explaining a general data driver driving the display panel 20. Fig.
FIG. 4B is a conceptual diagram for explaining that the data driver 100 according to the embodiment drives the display panel 201. FIG.
5 shows a display device according to an embodiment.
6 is a flowchart showing a method of driving a display panel according to an embodiment.
7 shows current values of driving currents for the periods of the (K-1) th row, the (K) th row, and the (K + 1) th row of the display panel.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG.

In describing an embodiment, when it is described as being formed "on or under" of each element, an upper or lower (on or under) Wherein both elements are in direct contact with each other or one or more other elements are indirectly formed between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

Also, the terms "first" and "second", "upper / upper / upper" and "lower / lower / lower" used in the following description are intended to mean any physical or logical relationship or order May be used solely to distinguish one entity or element from another entity or element, without necessarily requiring or implying that such entity or element is a separate entity or element. The same reference numerals denote the same elements throughout the description of the drawings.

It is also to be understood that the terms "comprises", "comprising", or "having" as used herein are meant to imply that a component can be implied unless specifically stated to the contrary, But should be construed to include other elements.

Figure 1 shows a schematic block diagram of a data driver 100 according to an embodiment.

1, the data driver 100 includes a shift register 110, a level shifter 115, a level shifter 140, a digital-analog converter 150, an output unit 160, A portion 170, and a bias portion 180.

The shift register 110 is responsive to the enable signal En and the clock signal CLK in order to control the timing at which the data (DATA), for example, the digital image data, is sequentially stored in the first latch unit 120 (SR1 to SRm, m > 1).

For example, the shift register 110 receives the horizontal start signal from the timing controller 205 (see FIG. 5) and shifts the horizontal start signal received in response to the clock signal CLK to generate the shift signals SR1 to SRm, m > 1 natural number). Here, the horizontal start signal may be mixed with a start pulse.

The latch unit 115 may store the first data DA1 and the second data DA2 that are sequentially input from the timing controller 205 (see FIG. 5).

For example, the latch unit 115 may include a first latch unit 120 for storing the first data DA1 and a second latch unit 130 for storing the second data DA2.

The first data DA1 may be data corresponding to the pixels of the Kth row of the display panel 201 (see FIG. 5), and the second data DA2 may be data corresponding to the pixels of the display panel 201 The data corresponding to the (K + 1) -th row pixels of the pixel 201 (see FIG. 5).

The first latch unit 120 receives N (N is a positive number) from the timing controller 205 (see FIG. 5) in response to shift signals SR1 to SRm generated by the shift register 110, (Rational number) bits of data (DATA) and stores the received data. At this time, the data stored in the first latch unit 120 is referred to as "first data DA1 ".

For example, the first latch unit 120 may include a plurality of (for example, M) first latches (not shown), and the first latches may include first data DA1 ). ≪ / RTI >

For example, the data DATA received from the timing controller 205 may be R (Red), G (Green), and B (Blue) data and the plurality of first latches of the first latch unit 120 may be R , G, and B data.

The data DATA received from the timing controller 205 in response to the shift signals SR1 to SRm and m> 1 can be sequentially stored in the first latches of the first latch unit 120 .

For example, the first latch unit 120 may transmit the stored first data to the second latch unit 130, and the first latch unit 120 may receive the data (DATA) received from the timing controller 205 The first data DA1 stored in the memory 120 may be updated or updated.

The second latch unit 130 receives the first data DA2 stored in the first latch unit 120 in response to a control signal (not shown) provided from the timing controller 205 and outputs the received first data DA2 DA1) as the second data DA2. The second data DA2 stored in the second latch unit 130 may be updated or updated by the first data DA2 received from the first latch unit 120. [

For example, the first data DA1 stored in the first latch unit 120 and the second data DA2 stored in the second latch unit 130 may have the same number of bits, but the present invention is not limited thereto. The number of bits of the second data DA2 stored in the second latch unit 130 may be greater than the number of bits of the first data DA1 stored in the first latch unit 120. [

For example, the number of first latches of first latch portion 120 and the number of second latches of second latch portion 130 may be the same, but are not limited thereto. The number of second latches in second latch portion 130 may be greater than the number of first latches in first latch portion 120 in other embodiments.

For example, the second latch unit 130 may store data output from the first latch unit 120 in units of a horizontal line period.

For example, the horizontal line period stores and stores data corresponding to one horizontal line or row (see Fig. 5) of the display panel 201 (see Fig. 5) in the second latches of the second latch unit 130 It may be the period required to

The level shifter 140 converts the voltage level of the second data DA2 provided from the second latch 130. [

For example, the driving voltage or the bias voltage of the level shifter 140 may be greater than the driving voltage or the bias voltage of the first latch unit 120 and the second latch unit 130.

For example, the level shifter 140 may include a plurality of level shifters, and the number of level shifters may be determined by a number of the first latches of the first latch unit 120, and / 2 latches, but is not limited thereto.

The digital-analog converter 150 converts the output of the level shifter 140, for example, the level-converted second data into an analog signal.

For example, the gradation voltages or reference voltages generated by the power supply unit (not shown) may be supplied and the output of the level shifter 140 may be converted into an analog signal.

The output unit 160 amplifies (or buffers) an analog signal output from the digital-to-analog conversion unit 150 and outputs an amplified (or buffered) analog signal, for example, (For example, P1). For example, the output section 160 may comprise a plurality of amplifiers or a plurality of buffers.

For example, each of the plurality of amplifiers of the output section 160 may include a differential amplifier. For example, each of the plurality of amplifiers of the output section 160 may include a rail to rail amplifier.

For example, the output unit 160 may output a drive current Is for driving the panel based on the bias signal and the analog signal output from the digital-analog converter unit 150. [

The comparator 170 receives the first data DA1 and the second data DA2 from the latch unit 115 and receives the first data DA1 and the second data DA2, And outputs a comparison signal CS according to the comparison result.

For example, the comparison unit 170 may receive the first data DA1 stored in the first latch unit 120 and the second data DA2 stored in the second latch unit 130, Can be output.

The bias unit 180 provides the bias signal VBias to the output unit 160. For example, the bias signal VBias may be a bias voltage.

The bias unit 180 receives the comparison signal CS from the comparison unit 170 and drives pixels (e.g., P1) of the display panel 201 (see Fig. 5) based on the received comparison signal CS The current value of the drive current Is is adjusted.

For example, the bias unit 180 may adjust the level of the bias signal VBias provided to the output unit 160 based on the comparison signal CS. As the level of the bias signal Vbias is adjusted by the bias unit 180, the current value of the drive current Is output from the output unit 160 can be adjusted.

For example, the tail current of the differential amplifier of the output section 160 can be adjusted as the voltage level of the bias signal Vbias is adjusted, and the tail current of the drive current Is can be adjusted as the tail current is adjusted. The current value can be adjusted.

The comparator 170 may output the comparison signal CS having the first logic value or the first digital value (e.g., 1) when the first data DA1 and the second data DA2 are identical.

On the other hand, the comparator 170 outputs the comparison signal CS having the second logic value or the second digital value (for example, 0) when the first data DA1 and the second data DA2 are not the same . The first logical value (or the first digital value) and the second logical value (the second digital value) are different from each other.

For example, the comparator 170 can adjust the level of the bias signal VBias, for example, the bias voltage, based on the result of logically multiplying the first data DA1 and the second data DA2.

FIG. 2 shows an embodiment of the comparison unit 170 shown in FIG.

2, the comparator 170 compares the first data DA1 (P1 to PM) stored in the first latch unit 120 and the second data DA2 (S1 to SN And outputs a comparison signal CS according to a result of logic operation (for example, logical product) of the received first data DA1 (P1 to PM) and second data DA2 (S1 to SN) And an operation unit 172. N may be equal to M but is not limited thereto.

FIG. 3 shows an embodiment of the logical operation unit 172 shown in FIG.

Referring to FIG. 3, the logic operation unit 172 may include a plurality of first AND gate gates 302-1 to 302-N and a second AND gate 303. For example, in FIG. 3, the number of bits of the first data DA1 and the second data DA2 may be equal to each other.

Each of the plurality of first AND gate gates 302-1 to 302-N includes a plurality of first AND gates 302-1 to 302-N that respectively output corresponding bits (e.g., P1 and S1) of the first data DA1 And outputs the first logical values BA_1 to BA_N according to the result of the logical multiplication and the logical multiplication.

The second AND gate 303 may logically multiply the first logical values BA_1 to BA_N and output the second logical value according to the result of the logical multiplication to the comparison signal CS.

5 shows a display device 200 according to an embodiment.

Referring to FIG. 5, the display device 200 includes a display panel 201, a timing controller 205, a data driver 210, and a gate driver 220.

The display panel 201 includes a gate line 221 forming a row and a data line 231 forming a column and intersecting with each other to form a matrix. And pixels may be included.

The pixels are connected to the gate lines and the data lines and can be arranged in a matrix form having rows and columns.

Each of the pixels may include a transistor Ta connected to the gate line and the data line, and a capacitor Ca connected to the transistor Ta.

For example, the pixels may include R (Red) sub-pixels, G (Green) subpixels, and B (Blue) subpixels, A transistor Ta connected to the line, and a capacitor Ca connected to the transistor Ta.

The timing controller 205 receives a clock signal CLK, data DATA, a first control signal CONT for controlling the data driver section 210, and a second control signal for controlling the gate driver 220 G_CONT).

For example, the first control signal CONT may include a horizontal start signal, an enable signal En, and a clock signal CLK that are input to the shift register 110 (see FIG. 1) of the data driver. The second control signal G_CONT may include a gate driving signal for driving the gate lines.

The gate driver unit 220 drives the gate lines 221, may include a plurality of gate drivers, and may output gate driving signals for controlling the transistor Ta of the pixel to the gate lines.

The data driver unit 210 drives the data lines 231 and may include a plurality of data drivers 210-1 through 210-P, a natural number P> 1.

Each of the data drivers 210-1 through 210-P, a natural number P > 1, may be the embodiment 100 shown in FIG.

FIG. 4A is a conceptual diagram for explaining that a general data driver drives the display panel 20. FIG.

4A shows a pattern in which a plurality of rows (# 1 to #K, K? 1 natural numbers) of the display panel 20 are displayed on a row basis.

The first to third rows # 1 to # 3 of the display panel 20 are displayed in the same pattern (or the same brightness or color). On the other hand, the fourth row and the fifth row of the display panel 20 are displayed in a pattern different from the first row to the third row, and the fifth row is displayed in the same pattern as the fourth row.

In FIG. 4A, the current values of the drive currents of the data drivers all have a high value (Strong) irrespective of the patterns displayed for the first to K-th rows (# 1 to #K).

Generally, regardless of the pattern displayed on the rows of the display panel, the charge of the pixel capacitor is performed with the driving current of the data driver having a current value at the level of no deterioration of the screen, thereby wasting power.

FIG. 4B is a conceptual diagram for explaining that the data driver 100 according to the embodiment drives the display panel 201. FIG.

Referring to FIG. 4B, the data driver 100 may drive the first row of the display panel with a driving current having a first current value Strong.

Since the second row (# 2) of the display panel 201 has the same display pattern as the first row (# 1), the data driver 100 outputs the second row (# 2) Can be driven.

The second current value is smaller than the first current value, and in this sense, the first current value can be expressed as "Strong" and the second current value can be expressed as "Weak".

Since the third row (# 3) has the same display pattern as the second row (# 2), the data driver 100 outputs the third row (# 3) with the driving current having the second current value Weak Can be driven.

Since the fourth row (# 4) of the display panel 201 has a display pattern different from that of the third row (# 3), the data driver 100 outputs the driving current having the first current value Strong (# 4) can be driven.

In addition, since the fifth row (# 5) of the display panel 201 has the same display pattern as that of the fourth row (# 4), the data driver 100 outputs the driving current having the second current value Weak It is possible to drive row # 4.

The data driver 100 may drive the other methods (# 6 to #K) of the display panel 201 as described above.

For example, the first row (# 1) of the display panel 201 can charge a capacitor of a pixel with a driving current having a first current value (Strong) always default.

When the display pattern of the (K + 1) -th row of the (K + 1) th row is the same as the display pattern of the K-th row, the pixel of the (K + 1) th row is charged with the driving current having the second current value Weak .

On the other hand, when the display pattern of the (K + 1) th row is different from the display pattern of the Kth row, the pixel of the (K + 1) th row is driven by the driving current having the first current value Can be charged.

 When the display pattern of the (K + 1) th row is not changed when compared with the Kth row, power consumption can be reduced by setting the current value of the driving current for the (K + 1) th row as the second current value Weak .

When the display pattern of the (K + 1) th row is not changed when compared with the Kth row, the voltage of the data line in the (K + 1) th row is the same as the voltage of the data line in the Kth row, Since the current is not consumed much, even if the current supplied from the data driver 100 to the display panel is reduced, the deterioration of the screen does not occur.

When the display pattern of the (K + 1) -th row is changed, the current value of the driving current for the (K + 1) -th row is made the first current value Strong, The charge of the pixel can be smoothly performed.

For example, in FIG. 4A, all of the rows of the dotted line are driven with a uniformly high current, while in FIG. 4B, some of the rows of the dotted line are driven with a high current, The power consumption can be reduced.

The comparing unit 170 of the data driver 100 compares the first data DA1 stored in the first latch unit 120 with the second data DA2 stored in the second latch unit 130, It is possible to determine whether the display pattern in the Kth row of the display panel and the display pattern of the (K + 1) th row change.

For example, the comparison signal CS of the comparison unit 170 can determine whether the display pattern of the Kth row and the display pattern of the (K + 1) th row of the display panel 201 change.

The current value of the driving current provided to the data lines of the display panel 201 from the output unit 160 by the bias unit 180 of the data driver 100 becomes the first current value Strong or the second current value Weak.

6 is a flowchart showing a method of driving the display panel 201 according to the embodiment.

Referring to FIG. 6, the first data DA1 for driving the pixels in the Kth row of the display panel 201 is received and the received first data DA1 is stored (S110).

Next, the second data DA2 for driving the pixels in the (K + 1) th row of the display panel 201 is received and the received second data DA2 is stored (S120).

Next, it is determined whether the first data DA1 and the second data DA2 are identical (S130).

It is possible to discriminate whether or not the first data DA1 and the second data DA2 are the same based on the result of logically multiplying the first data DA1 and the second data DA2, for example.

Next, when the first data DA1 and the second data DA2 are not the same, the current value of the driving current Is for driving the pixels in the (K + 1) th row is set to the first current value I1 or Strong (S140).

Or when the first data DA1 and the second data DA2 are the same, the current value of the driving current Is for driving the pixels in the (K + 1) th row is the second current value I2 < I1, Quot;) (S150).

7 shows the current values of the driving currents for the (K-1) th row, the (K) th row, and the (K + 1) th row of the display panel 201.

Referring to Fig. 7, it is assumed that the driving current Is of the data driver 100 at the driving period t0 to t1 of the (K-1) th row has the first current value I1 or "Strong ".

When the second data DA2 for the Kth row is the same as the first data DA1 for the (K-1) -th row, the data driver 100 The drive current Is may have the second current value I2 or "Weak ".

When the second data DA2 for the (K + 1) th row is the same as the first data DA1 for the Kth row, which is the previous row, the data driver 100 may have a second current value I2 or "Weak ".

As described above, the data driver 100 according to the embodiment can reduce the power consumption while preventing deterioration of the screen.

The features, structures, effects and the like described in the embodiments are included in at least one embodiment of the present invention and are not necessarily limited to one embodiment. Further, the features, structures, effects, and the like illustrated in the embodiments can be combined and modified by other persons having ordinary skill in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

Claims (17)

A latch unit for storing sequentially input first data and second data;
A comparator for receiving the first data and the second data from the latch unit and outputting a comparison signal according to a result of comparing the first data and the second data received;
A digital-analog converter for outputting an analog signal according to a result of digital-analog conversion of the second data stored in the latch unit;
An output unit for providing a driving current for driving the display panel based on the bias signal and the analog signal; And
And a bias unit for adjusting the bias signal based on the comparison signal,
And the current value of the drive current of the output section is adjusted based on the bias signal adjusted by the bias section. The apparatus according to claim 1,
Outputting a comparison signal having a first logic value when the first data and the second data are identical to each other and outputting a comparison signal having a second logic value when the first data and the second data are not identical, And the first logical value and the second logical value are different from each other. The apparatus according to claim 1,
And generates the comparison signal based on a result of logically multiplying the first data and the second data. The latch unit according to claim 1,
A first latch for storing the first data; And
And a second latch for storing the second data,
And the second latch unit receives the first data stored in the first latch unit and stores the received first data as the second data. 5. The method of claim 4,
And the comparator receives the first data stored in the first latch unit and the second data stored in the second latch unit. The method according to claim 1,
Wherein the number of bits of the first data and the number of bits of the second data are equal to each other. 7. The apparatus according to claim 6,
A first logical operation unit for outputting first logical values according to a result of logically multiplying each of the bits of the first data and corresponding bits of the bits of the second data; And
And a second logic operation unit for generating a second logic value according to the logical multiplication of the first logic values and outputting the second logic value as the comparison signal. 8. The method of claim 7,
Wherein the first logic remover comprises a plurality of AND gates,
Wherein each of the plurality of AND gates logically multiplies any one of the bits of the first data and a corresponding one of the bits of the second data. The method according to claim 1,
And the bias unit adjusts the voltage level of the bias signal based on the comparison signal. 10. The method of claim 9,
Wherein the output comprises a differential amplifier,
The tail current of the differential amplifier is adjusted based on the voltage level of the bias signal adjusted by the bias unit,
And the current value of the drive current is adjusted based on the adjusted tail current. The method according to claim 1,
The first data is data for driving the Kth (K is a natural number) row of pixels of the display panel, and the second data is data for driving pixels of the (K + 1) th row of the display panel Data driver. A display panel including gate lines, data lines, pixels connected to the gate lines and the data lines and arranged in a matrix in rows and columns;
A data driver for driving the data lines; And
And a gate driver for driving the gate lines,
Wherein the data driver is the data driver according to any one of claims 1 to 11. A method of driving a display panel including pixels arranged in a matrix form connected to gate lines, data lines, the gate lines and the data lines and arranged in rows and columns,
Receiving first data for driving pixels of the Kth row (K &gt; 1 natural number) of the display panel, and storing the received first data;
Receiving second data for driving pixels in the (K + 1) th row of the display panel, and storing the received second data;
Determining whether the stored first data and the stored second data are identical; And
And adjusting a current value of a driving current for driving the pixels in the (K + 1) th row to a first current value or a second current value according to the discriminated result. 14. The method of claim 13,
And adjusting the current value of the driving current to the first current value when the first data and the second data are not identical. 15. The method of claim 14,
And adjusts the current value of the driving current to the second current value when the first data and the second data are identical, and the second current value is smaller than the first current value. 14. The method of claim 13,
Wherein the number of bits of the first data and the number of bits of the second data are equal to each other. 14. The method of claim 13,
And determining whether or not the stored first data and the stored second data are the same based on a result of logically multiplying the first data and the second data.

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