KR20170140225A - 향상된 명령어 세트를 구비한 중앙 처리 유닛 - Google Patents
향상된 명령어 세트를 구비한 중앙 처리 유닛 Download PDFInfo
- Publication number
- KR20170140225A KR20170140225A KR1020177030823A KR20177030823A KR20170140225A KR 20170140225 A KR20170140225 A KR 20170140225A KR 1020177030823 A KR1020177030823 A KR 1020177030823A KR 20177030823 A KR20177030823 A KR 20177030823A KR 20170140225 A KR20170140225 A KR 20170140225A
- Authority
- KR
- South Korea
- Prior art keywords
- segment
- volatile memory
- protection
- information
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1673—Details of memory controller using buffers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
- G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1052—Security improvement
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computer Security & Cryptography (AREA)
- Executing Machine-Instructions (AREA)
- Storage Device Security (AREA)
- Advance Control (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562154927P | 2015-04-30 | 2015-04-30 | |
| US62/154,927 | 2015-04-30 | ||
| US201562195692P | 2015-07-22 | 2015-07-22 | |
| US62/195,692 | 2015-07-22 | ||
| PCT/US2016/030159 WO2016176593A1 (en) | 2015-04-30 | 2016-04-29 | Central processing unit with enhanced instruction set |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20170140225A true KR20170140225A (ko) | 2017-12-20 |
Family
ID=55963480
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020177030823A Withdrawn KR20170140225A (ko) | 2015-04-30 | 2016-04-29 | 향상된 명령어 세트를 구비한 중앙 처리 유닛 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US10983931B2 (enExample) |
| EP (1) | EP3289442B1 (enExample) |
| JP (1) | JP2018514868A (enExample) |
| KR (1) | KR20170140225A (enExample) |
| CN (1) | CN107548492B (enExample) |
| TW (1) | TW201706856A (enExample) |
| WO (1) | WO2016176593A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102032146B1 (ko) | 2018-04-11 | 2019-10-15 | 경희대학교 산학협력단 | 소자 결점을 보완하기 위한 구간 선형 정류 유닛을 사용하는 인공신경망 시스템 |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10019314B2 (en) | 2016-04-27 | 2018-07-10 | Silicon Motion Inc. | Flash memory apparatus and storage management method for flash memory |
| CN111679787B (zh) | 2016-04-27 | 2023-07-18 | 慧荣科技股份有限公司 | 闪存装置、闪存控制器及闪存存储管理方法 |
| CN109983063B (zh) | 2016-11-04 | 2022-03-08 | 株式会社Lg化学 | 热固性组合物 |
| KR102238957B1 (ko) * | 2017-06-12 | 2021-04-13 | 샌디스크 테크놀로지스 엘엘씨 | 멀티코어 온-다이 메모리 마이크로컨트롤러 |
| CN111382429B (zh) * | 2018-12-27 | 2022-12-27 | 华为技术有限公司 | 指令的执行方法、装置及存储介质 |
| CN109886416A (zh) * | 2019-02-01 | 2019-06-14 | 京微齐力(北京)科技有限公司 | 集成人工智能模块的系统芯片及机器学习方法 |
| CN109870921B (zh) * | 2019-03-26 | 2022-04-01 | 广东美的制冷设备有限公司 | 驱动控制电路与家电设备 |
| TWI715371B (zh) | 2019-12-25 | 2021-01-01 | 新唐科技股份有限公司 | 一次性可編程記憶體裝置及其容錯方法 |
Family Cites Families (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5167028A (en) * | 1989-11-13 | 1992-11-24 | Lucid Corporation | System for controlling task operation of slave processor by switching access to shared memory banks by master processor |
| US5226138A (en) * | 1990-11-27 | 1993-07-06 | Sun Microsystems, Inc. | Method for selectively transferring data instructions to a cache memory |
| US6327648B1 (en) * | 1994-12-09 | 2001-12-04 | Cirrus Logic, Inc. | Multiprocessor system for digital signal processing |
| US7272703B2 (en) * | 1997-08-01 | 2007-09-18 | Micron Technology, Inc. | Program controlled embedded-DRAM-DSP architecture and methods |
| ITMI981564A1 (it) * | 1998-07-09 | 2000-01-09 | St Microelectronics Srl | Memoria non volatile in grado di eseguire un programma autonomamente |
| US6260082B1 (en) * | 1998-12-23 | 2001-07-10 | Bops, Inc. | Methods and apparatus for providing data transfer control |
| GB2365545B (en) * | 1999-12-23 | 2004-06-02 | Ibm | Data processing system with master and slave processors |
| US6691216B2 (en) | 2000-11-08 | 2004-02-10 | Texas Instruments Incorporated | Shared program memory for use in multicore DSP devices |
| US6895479B2 (en) | 2000-11-15 | 2005-05-17 | Texas Instruments Incorporated | Multicore DSP device having shared program memory with conditional write protection |
| JP2002185430A (ja) * | 2000-12-13 | 2002-06-28 | Sony Corp | 受信装置及び方法 |
| US6349056B1 (en) | 2000-12-28 | 2002-02-19 | Sandisk Corporation | Method and structure for efficient data verification operation for non-volatile memories |
| US7007172B2 (en) * | 2001-06-01 | 2006-02-28 | Microchip Technology Incorporated | Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection |
| US7571287B2 (en) | 2003-03-13 | 2009-08-04 | Marvell World Trade Ltd. | Multiport memory architecture, devices and systems including the same, and methods of using the same |
| CN1301473C (zh) | 2003-09-17 | 2007-02-21 | 中兴通讯股份有限公司 | 多处理器系统共享引导模块的方法 |
| US7325122B2 (en) * | 2004-02-20 | 2008-01-29 | International Business Machines Corporation | Facilitating inter-DSP data communications |
| JP4575059B2 (ja) * | 2004-07-21 | 2010-11-04 | 株式会社日立製作所 | ストレージ装置 |
| US7917753B2 (en) * | 2005-05-16 | 2011-03-29 | Texas Instruments Incorporated | Transferring control between programs of different security levels |
| WO2007067562A2 (en) | 2005-12-06 | 2007-06-14 | Boston Circuits, Inc. | Methods and apparatus for multi-core processing with dedicated thread management |
| US20080235493A1 (en) * | 2007-03-23 | 2008-09-25 | Qualcomm Incorporated | Instruction communication techniques for multi-processor system |
| JP4643740B2 (ja) * | 2007-06-18 | 2011-03-02 | 富士通株式会社 | プロセッサおよびプリフェッチ支援プログラム |
| US8650440B2 (en) * | 2008-01-16 | 2014-02-11 | Freescale Semiconductor, Inc. | Processor based system having ECC based check and access validation information means |
| US20110087922A1 (en) * | 2009-10-09 | 2011-04-14 | National Tsing Hua University | Test method and tool for master-slave systems on multicore processors |
| US8478974B2 (en) | 2010-06-23 | 2013-07-02 | Assured Information Security, Inc. | Method and system for reducing an impact of malware during a booting sequence |
| US8904190B2 (en) | 2010-10-20 | 2014-12-02 | Advanced Micro Devices, Inc. | Method and apparatus including architecture for protecting sensitive code and data |
| US9021170B2 (en) * | 2011-06-29 | 2015-04-28 | Texas Instruments Incorporated | System and method for improving ECC enabled memory timing |
| US9195581B2 (en) * | 2011-07-01 | 2015-11-24 | Apple Inc. | Techniques for moving data between memory types |
| GB2513727B (en) * | 2012-06-27 | 2015-06-24 | Nordic Semiconductor Asa | Memory protection |
| US9858229B2 (en) | 2014-09-30 | 2018-01-02 | International Business Machines Corporation | Data access protection for computer systems |
| RU2580016C1 (ru) * | 2014-10-17 | 2016-04-10 | Закрытое акционерное общество "Лаборатория Касперского" | Способ передачи управления между областями памяти |
-
2016
- 2016-04-29 EP EP16722012.8A patent/EP3289442B1/en active Active
- 2016-04-29 KR KR1020177030823A patent/KR20170140225A/ko not_active Withdrawn
- 2016-04-29 CN CN201680024293.4A patent/CN107548492B/zh active Active
- 2016-04-29 WO PCT/US2016/030159 patent/WO2016176593A1/en not_active Ceased
- 2016-04-29 US US15/141,823 patent/US10983931B2/en active Active
- 2016-04-29 JP JP2017554326A patent/JP2018514868A/ja active Pending
- 2016-05-02 TW TW105113680A patent/TW201706856A/zh unknown
-
2019
- 2019-01-17 US US16/250,274 patent/US10776292B2/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102032146B1 (ko) | 2018-04-11 | 2019-10-15 | 경희대학교 산학협력단 | 소자 결점을 보완하기 위한 구간 선형 정류 유닛을 사용하는 인공신경망 시스템 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20160321202A1 (en) | 2016-11-03 |
| US20190188163A1 (en) | 2019-06-20 |
| EP3289442A1 (en) | 2018-03-07 |
| US10776292B2 (en) | 2020-09-15 |
| WO2016176593A1 (en) | 2016-11-03 |
| EP3289442B1 (en) | 2023-04-19 |
| CN107548492B (zh) | 2021-10-01 |
| US10983931B2 (en) | 2021-04-20 |
| JP2018514868A (ja) | 2018-06-07 |
| TW201706856A (zh) | 2017-02-16 |
| CN107548492A (zh) | 2018-01-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
Patent event date: 20171025 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PG1501 | Laying open of application | ||
| PC1203 | Withdrawal of no request for examination |