KR20170122868A - Method of manufacturing a circuit board - Google Patents

Method of manufacturing a circuit board Download PDF

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Publication number
KR20170122868A
KR20170122868A KR1020160051217A KR20160051217A KR20170122868A KR 20170122868 A KR20170122868 A KR 20170122868A KR 1020160051217 A KR1020160051217 A KR 1020160051217A KR 20160051217 A KR20160051217 A KR 20160051217A KR 20170122868 A KR20170122868 A KR 20170122868A
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South Korea
Prior art keywords
circuit board
via hole
present
plating
substrate
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KR1020160051217A
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Korean (ko)
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배재만
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대덕전자 주식회사
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Priority to KR1020160051217A priority Critical patent/KR20170122868A/en
Publication of KR20170122868A publication Critical patent/KR20170122868A/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/187—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating means therefor, e.g. baths, apparatus
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H05K3/424—Plated through-holes or plated via connections characterised by electroplating method by direct electroplating

Abstract

The present invention relates to a manufacturing method of a circuit board which is applied to a method for forming a chemical copper seed layer film on an inner wall of a via hole and an exposure surface of a circuit substrate by using a vertical plating facility. The present invention is vertically fluctuated so as to be inclined at a predetermined positive angle () with respect to a jig axis fixing the circuit board and a circuit board panel is rotated, is inclined at a predetermined negative angle () and is vertically fluctuated, so that a chemical copper plating liquid is easily penetrated into the via hole of the circuit substrate.

Description

회로기판 제조방법{METHOD OF MANUFACTURING A CIRCUIT BOARD}[0001] METHOD OF MANUFACTURING A CIRCUIT BOARD [0002]

본 발명은 회로기판(PCB; Printed Circuit Board) 제조기술에 관한 것으로서, 특히 수직라인 자동화 도금설비에 있어 화학동 도금기술에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PCB (Printed Circuit Board) manufacturing technology, and more particularly, to a copper plating technique in a vertical line automated plating facility.

전자기기의 발전에 수반하여 소형화와 고기능화가 가속화되고 있으며, 이에 따라 패키지기판(Package Substrate)을 비롯한 인쇄회로기판의 입출력단자(I/O)도 고밀도화 되어가고 있다. Accompanying the development of electronic devices, miniaturization and high functionality have been accelerated, and input / output terminals (I / O) of a printed circuit board including a package substrate have been increasingly densified.

에폭시 수지를 절연재로 한 회로기판에서, 층간 전기접속을 위해서는 층간에 물리적으로 비아 홀(Via Hole)을 가공하여, 이를 도전성 피막으로 채우는 도금공정(plating process)이 필수적이다. In a circuit board made of an epoxy resin as an insulating material, a plating process for physically forming a via hole (vias) between layers and filling it with a conductive film is indispensable for interlayer electrical connection.

회로기판 패널을 동(Cu)으로 도금하기 위해서는 수평도금방식 또는 수직도금방식이 사용되는데, 수평도금방식이란 장방형의 패널을 수평으로 눕혀서 자동화 라인을 따라 이동하면서 도금을 하는 방식이고 수직도금방식은 패널을 상하로 세워서 이동시키면서 도금을 하는 방식이다. In order to coat the circuit board panel with copper (Cu), a horizontal plating method or a vertical plating method is used. In the horizontal plating method, a rectangular panel is laid horizontally and is plated while moving along an automated line. And the plating is carried out while moving up and down.

비아홀 내벽을 동(Cu)으로 도금하기 위해서는 무전해 방식의 화학동 공정으로 종자층(Seed-layer)를 표면에 형성하여야 한다. 특히 비아홀 내부에 보이드(void)가 발생하는 것을 방지하고, 비아홀 미충진 문제를 해결하기 위해서는, 비아홀 내벽에 피복되는 화학동 커버리지 두께(Coverage thickness) 특성이 개선되어야 한다. In order to coat the inner wall of the via hole with copper, a seed layer should be formed on the surface by an electroless copper plating process. Particularly, in order to prevent a void from occurring in the via hole and to solve the problem of filling the via hole, the coverage thickness characteristic to be coated on the inner wall of the via hole should be improved.

이러한 화학동 커버리지 특성 개선을 위해서는 수평도금방식보다는 수직형태의 화학동이 더 유리하며, 화학동의 커버리지 향상을 위하여 기판을 삽입한 지그(Jig)를 스윙(Swing)으로 흔들어주거나 다양한 형태의 요동, 진동 방식을 적용한다. In order to improve the chemical copper coverage characteristics, the vertical type of chemical copper is more advantageous than the horizontal plating method. In order to improve the chemical copper coverage, the jig inserted with the substrate is swung by the swing, Is applied.

그런데 패키지기판의 경우 기판의 두께가 매우 얇은 박판구조(ultra thin)인 경우가 대부분이므로 외부의 물리적 충격에 매우 취약하다. 따라서 패키지기판의 도금공정에 있어, 일반 PCB의 경우와 같이 스윙(Swing) 또는 진동(vibration)을 적용할 경우, 박판의 기판이 찢어지거나 손상되는 문제가 발생한다. 따라서 현재 실무적으로 기판 파손의 우려가 있는 박판 패키지제품은 상하 요동만을 제한적으로 적용한다. However, in the case of a package substrate, the substrate is very thin, which is very thin. Therefore, it is very vulnerable to external physical shock. Therefore, in the plating process of the package substrate, when the swing or the vibration is applied as in the case of the general PCB, the substrate of the thin plate is torn or damaged. Therefore, the thin plate package products, which have the possibility of substrate breakage at present, apply only limited up and down movement.

게다가, 약품을 노즐(nozzle)로 분사하여 압력을 가하는 수평도금방식에 비교하여 기판을 지그(Jig)에 삽입하는 수직 화학동은 노즐분사의 효과를 기대할 수 없어 약품의 침투력도 양호할 수 없으며, 커버리지(Coverage와)는 별개로 에어 버블(Air Bubble)에 의한 보이드(Void)나 미도금 발생문제에 취약하게 된다. In addition, as compared with the horizontal plating method in which a chemical is injected by a nozzle and pressure is applied, a vertical chemical force for inserting a substrate into a jig can not expect the effect of nozzle injection, Coverage is separately vulnerable to voids or uncoated problems caused by air bubbles.

1. 대한민국 특허공개 제10-2014-0037312호.1. Korean Patent Publication No. 10-2014-0037312. 2. 대한민국 특허공개 제10-2004-0027413호.2. Korean Patent Publication No. 10-2004-0027413. 3. 대한민국 특허공개 제10-2015-0030743호.3. Korean Patent Publication No. 10-2015-0030743. 4. 대한민국 특허공개 제10-2003-0020642호.4. Korean Patent Publication No. 10-2003-0020642. 5. 대한민국 특허공개 제10-2001-0100890호.5. Korean Patent Publication No. 10-2001-0100890.

본 발명의 제1 목적은 두께가 얇은 박판 회로기판을 수직도금방식으로 화학 동도금을 하는 기술을 제공하는데 있다.A first object of the present invention is to provide a technique of chemically plating a thin plate circuit board by a vertical plating method.

본 발명의 제2 목적은 상기 제1 목적에 부가하여, 박판 회로기판의 층간 비아홀 내벽에 보이드 발생 없이 양호하게 화학동을 도금하는 방법을 제공하는데 있다.It is a second object of the present invention to provide a method for plating chemical copper on the inner wall of an interlayer via hole of a thin plate circuit board without causing voids in addition to the first object.

본 발명은 수직도금설비를 사용해서 회로기판의 비아홀 내벽 및 노출표면에 화학동 종자층(seed layer) 피막을 형성하는 방법에 있어서, 상기 회로기판을 고정하는 지그 축에 대해 소정의 양의 각도(Θ)만큼 경사지도록 세워서 상하요동 하다가, 다시 상기 회로기판패널을 회전해서 소정의 음의 각도(Θ)만큼 경사지도록 세워서 상하요동 함으로써, 상기 회로기판의 비아홀 속으로 화학동 도금액이 침투하도록 하는 도금방법을 제공한다. A method of forming a chemical seed layer coating on an inner wall of a via hole and an exposed surface of a circuit board using a vertical plating facility, the method comprising the steps of: And a plating method in which the copper plating solution is infiltrated into the via hole of the circuit board by vertically pivoting the circuit board panel so as to be inclined by a predetermined negative angle &thetas; .

그 결과, 본 발명은 비아홀 내로 도금액의 침투력을 향상시키는 효과가 있다. 연속적인 스윙 방식과는 달리 공정진행 단계에 따라 기판의 경사각을 바꿔 물리적 운동을 최대한 억제하므로 박판 기판에 적용하더라도 기판이 파손되거나 찢어지는 문제가 발생하지 않는다. 또한, 도금액의 침투력이 향상함에 따라 에어 버블의 제거력이 향상된다.As a result, the present invention has the effect of improving the penetration ability of the plating solution into the via hole. Unlike the continuous swing method, the inclination angle of the substrate is changed in accordance with the progress of the process so that the physical movement is minimized, so that the substrate is not damaged or torn even when applied to the thin plate substrate. Further, as the penetration ability of the plating liquid is improved, the removing performance of the air bubbles is improved.

도1은 종래기술에 따른 수직도금방식을 나타낸 도면.
도2는 본 발명의 양호한 실시예에 따른 수직도금방식을 나타낸 도면.
도3a 내지 도3f는 본 발명에 따른 수직도금방식이 적용되는 무전해 동도금 프로세스를 나타낸 공정순서 단면도.
도4a 및 도4b는 본 발명에 따른 수직도금방식을 나타낸 도면.BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 shows a vertical plating scheme according to the prior art.
Figure 2 illustrates a vertical plating scheme in accordance with a preferred embodiment of the present invention.
FIGS. 3A through 3F are cross-sectional views illustrating an electroless copper plating process to which the vertical plating method according to the present invention is applied; FIG.
4A and 4B are views showing a vertical plating method according to the present invention.

이하, 첨부도면 도1 내지 도4를 참조하여 본 발명을 상세히 설명한다. Hereinafter, the present invention will be described in detail with reference to the accompanying drawings 1 to 4.

도1은 종래기술에 따른 수직도금방식을 나타낸 도면으로서, 본 발명에 따른 수직도금기술을 종래기술과 대비하기 위해 참고로 나타낸 도면이다. 도1을 참조하면, 종래기술은 회로기판 패널(100)을 수직으로 지그에 부착하므로, 요동에 의한 약품조 내 약품의 흐름의 홀(110) 내부 침투력이 떨어져서 에어 버블(120)에 의한 보이드 발생 가능성이 높은 단점이 있다.FIG. 1 is a view showing a vertical plating method according to the prior art, and is a drawing for the purpose of comparing the vertical plating technique according to the present invention with the prior art. 1, since the circuit board panel 100 is vertically attached to the jig, the penetration force of the flow of the medicine in the chemical tank due to the swinging is decreased and voids are generated by the air bubble 120 There is a high disadvantage.

도2는 본 발명의 양호한 실시예에 따른 수직도금방식을 나타낸 도면이다. 도2를 참조하면, 본 발명은 회로기판 패널(100)을 지그(200)에 약간 경사지게 고정하여 상하요동을 제공함으로써 도금액의 비아홀(110) 침투력을 향상시키는 특징이 있다. 2 is a view illustrating a vertical plating method according to a preferred embodiment of the present invention. Referring to FIG. 2, the circuit board panel 100 is fixed to the jig 200 at a slight inclination, thereby increasing the penetration of the plating liquid into the via hole 110 by providing up and down movement.

본 발명은 수직도금설비를 사용해서 회로기판의 비아홀 내벽 및 노출표면에 화학동 종자층(seed layer) 피막을 형성하는 방법에 적용한다. 본 발명은 회로기판을 고정하는 지그 축에 대해 소정의 양의 각도(Θ)만큼 경사지도록 세워서 상하요동 하다가, 다시 상기 회로기판패널을 회전해서 소정의 음의 각도(Θ)만큼 경사지도록 세워서 상하요동 함으로써, 상기 회로기판의 비아홀 속으로 화학동 도금액이 쉽게 침투하도록 한다. The present invention is applied to a method for forming a chemical seed layer film on the inner wall and exposed surface of a via hole of a circuit board by using a vertical plating facility. The present invention is characterized in that the circuit board is vertically pivoted by being inclined by a predetermined positive angle (?) With respect to the jig axis for fixing the circuit board, and then the circuit board panel is rotated so as to be inclined by a predetermined negative angle Thereby easily allowing the chemical copper plating solution to penetrate into the via hole of the circuit board.

본 발명은 수직도금라인의 진행에 맞춰 기판의 경사각 (Θ)을 변화시켜 비아홀(110)로부터 에어 버블(120)이 쉽게 탈출할 수 있도록 한다. 경사각의 양호한 실시예로서, 5° 정도를 적용할 수 있다. 본 발명에 따른 수직도금방식은 무전해 화학동에 적용할 수 있으며, 비아홀 내벽에 종자층(seed-layer)을 형성하는데 적용할 수 있다. The inclination angle? Of the substrate is changed according to the progress of the vertical plating line so that the air bubble 120 can easily escape from the via hole 110. As a preferable example of the inclination angle, about 5 degrees can be applied. The vertical plating method according to the present invention can be applied to electroless copper plating and can be applied to form a seed layer on the inner wall of a via hole.

도3a 내지 도3f는 본 발명에 따른 수직도금방식이 적용되는 무전해동도금 프로세스를 나타낸 공정순서 단면도이다. 3A to 3F are cross-sectional views illustrating an electroless copper plating process to which a vertical plating method according to the present invention is applied.

도3a를 참조하면, 기판의 상하 표면에 동박이 형성되어 있고, 기판을 관통하는 비아홀을 형성하고 표면을 세정한다. 이어서 도3b를 참조하면, 소프트에칭을 진행해서 표면에 조도(roughness)를 형성한다. Referring to FIG. 3A, a copper foil is formed on upper and lower surfaces of a substrate, and a via hole penetrating the substrate is formed and the surface is cleaned. Referring now to FIG. 3B, soft etching proceeds to form a roughness on the surface.

도3c를 참조하면, 프리딥(Pre-dip) 공정을 실시해서 표면에 음이온 계면활성제를 형성한다. 도3d를 참조하면, 촉매(activator), 예를 들어 팔라듐(Pd)을 피복한다. 도3e를 참조하면, 환원반응에 의해 Pd+2를 Pd으로 표면에 형성한다. 도3f를 참조하면, 무전해 동도금을 실시해서 표면에 동(Cu)을 피복한다. Referring to FIG. 3C, a pre-dip process is performed to form an anionic surfactant on the surface. Referring to FIG. 3D, an activator, such as palladium (Pd), is coated. Referring to FIG. 3E, Pd + 2 is formed on the surface as Pd by a reduction reaction. Referring to FIG. 3F, copper is coated on the surface by electroless copper plating.

도4a 및 도4b는 본 발명에 따른 수직도금방식을 나타낸 도면이다. 본 발명의 양호한 실시예로서, 도4a에 도시한 대로 회로기판 패널(100)을 지그(200)에 약간 5도(°) 정도 경사지게 부착하여 상하요동을 제공하다가, 도4b에 도시한 대로 방향을 반대로 해서 회로기판 패널(100)을 지그(200)에 약간 5도(°) 정도 경사지게 부착하여 상하요동을 제공한다. 4A and 4B are views showing a vertical plating method according to the present invention. As a preferred embodiment of the present invention, the circuit board panel 100 is attached to the jig 200 at an angle of about 5 degrees (about 5 degrees) as shown in FIG. 4A to provide up and down movement, The circuit board panel 100 is attached to the jig 200 at an angle of about 5 degrees to provide vertical shaking.

전술한 내용은 후술할 발명의 특허청구범위를 더욱 잘 이해할 수 있도록 본 발명의 특징과 기술적 장점을 다소 폭넓게 개선하였다. 본 발명의 특허청구범위를 구성하는 부가적인 특징과 장점들이 이하에서 상술 될 것이다. 개시된 본 발명의 개념과 특정 실시예는 본 발명과 유사 목적을 수행하기 위한 다른 구조의 설계나 수정의 기본으로서 즉시 사용될 수 있음이 당해 기술 분야의 숙련된 사람들에 의해 인식되어야 한다. The foregoing has somewhat improved the features and technical advantages of the present invention in order to better understand the claims of the invention described below. Additional features and advantages that constitute the claims of the present invention will be described in detail below. It should be appreciated by those skilled in the art that the disclosed concepts and specific embodiments of the invention can be used immediately as a basis for designing or modifying other structures to accomplish the invention and similar purposes.

또한, 본 발명에서 개시된 발명 개념과 실시예가 본 발명의 동일 목적을 수행하기 위하여 다른 구조로 수정하거나 설계하기 위한 기초로서 당해 기술 분야의 숙련된 사람들에 의해 사용될 수 있을 것이다. 또한, 당해 기술 분야의 숙련된 사람에 의한 그와 같은 수정 또는 변경된 등가 구조는 특허 청구 범위에서 기술한 발명의 사상이나 범위를 벗어나지 않는 한도 내에서 다양한 진화, 치환 및 변경이 가능하다. In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures to accomplish the same purpose of the present invention. It will be apparent to those skilled in the art that various modifications, substitutions and alterations can be made hereto without departing from the spirit or scope of the invention as defined in the appended claims.

본 발명은 비아홀 내로 도금액의 침투력을 향상시키는 효과가 있다. 연속적인 스윙 방시과는 달리 공정진행 단계에 따라 기판의 경사각을 바꿔 물리적 운동을 최대한 억제하므로 박판 기판에 적용하더라도 기판이 파손되거나 찢어지는 문제가 발생하지 않는다. 또한, 도금액의 침투력이 향상함에 따라 에어 버블의 제거력이 향상된다.The present invention has the effect of improving the penetration ability of the plating solution into the via hole. Unlike the continuous swing break, the inclination angle of the substrate is changed according to the progress of the process, so that the physical movement is suppressed to the utmost, so that the substrate is not broken or torn even if it is applied to the thin plate substrate. Further, as the penetration ability of the plating liquid is improved, the removing performance of the air bubbles is improved.

Claims (1)

수직도금설비를 사용해서 회로기판의 비아홀 내벽 및 노출표면에 화학동 종자층(seed layer) 피막을 형성하는 방법에 있어서, 상기 회로기판을 고정하는 지그 축에 대해 소정의 양의 각도(Θ)만큼 경사지도록 세워서 상하요동 하다가, 다시 상기 회로기판패널을 회전해서 소정의 음의 각도(Θ)만큼 경사지도록 세워서 상하요동 함으로써, 상기 회로기판의 비아홀 속으로 화학동 도금액이 침투하도록 하는 도금방법. A method for forming a chemical seed layer film on an inner wall of a via hole and an exposed surface of a circuit board using a vertical plating facility, the method comprising the steps of: applying a predetermined amount of angle (?) To a jig axis Wherein the copper plating liquid is allowed to penetrate into the via hole of the circuit board by vertically pivoting the circuit board panel so that the circuit board panel is rotated and inclined by a predetermined negative angle?
KR1020160051217A 2016-04-27 2016-04-27 Method of manufacturing a circuit board KR20170122868A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109097814A (en) * 2018-10-31 2018-12-28 广州兴森快捷电路科技有限公司 Plating fills out the method for through-hole and applied to the container in this method
CN114786366A (en) * 2022-06-22 2022-07-22 四川英创力电子科技股份有限公司 Floating type chemical plating device and method for driving bubbles in holes of circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109097814A (en) * 2018-10-31 2018-12-28 广州兴森快捷电路科技有限公司 Plating fills out the method for through-hole and applied to the container in this method
CN114786366A (en) * 2022-06-22 2022-07-22 四川英创力电子科技股份有限公司 Floating type chemical plating device and method for driving bubbles in holes of circuit board

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