KR20160134498A - Module for transmitting light using graphene protected copper and the method for manufacturing the same - Google Patents

Abstract

The present invention relates to an optical transmission integrated module using a graphene-protected copper prepared by using an optical waveguide method of surface plasmon polaritons (SPP) generated on a surface of the graphene-protected copper; and a method of manufacturing the same. A method of manufacturing the optical transmission integrated module comprises: a process of sequentially stacking lower cladding silica and core silica on a silicon substrate; a process of forming core silica having components of the optical transmission integrated module on the lower cladding silica by patterning and etching the core silica; a process of depositing copper on an upper surface of a portion of the lower cladding silica to be connected to a planar lightwave circuit (PLC) made of the core silica; a process of stacking graphene on the copper; a process of forming upper cladding silica on an entire area of the lower cladding silica; a process of exposing one portion of the graphene on the copper, exposing and forming a surface plasmon grating pattern on the other portion of the graphene; and a step of forming an electrode and an Au bumper around the surface plasmon grating pattern, and mounting a VCSEL chip on the surface plasmon grating pattern such that a current electrically flows through the VCSEL chip.

Description

TECHNICAL FIELD [0001] The present invention relates to an optical transmission integrated module using graphene protection copper and a manufacturing method thereof,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical transmission integrated module using graphene protected copper and a method of fabricating the same, and more particularly, to a surface plasmon polariton (SPP) (VCSEL) using a waveguide method, and a method of fabricating the same. 2. Description of the Related Art

Generally, surface plasmon is a vibration wave of charge density proceeding along the interface between materials having opposite signs, and is easily formed mainly at the boundary between metal and dielectric.

Surface Plasmon Polariton (SPP) is an electromagnetic wave that travels in combination with surface plasmon. These SPPs are bound to metal surfaces and propagate. SPP has a transverse magnet (TM) polarization characteristic perpendicular to the metal surface, and the transverse magnetic field of SPP has the largest value at the interface between the metal and the dielectric. As the distance from the interface increases, .

Therefore, the interface between the metal and the dielectric is usable as a planar optical waveguide having a confinement condition perpendicular to the interface.

In recent years, technologies for high-speed and high-speed transmission such as 40 Giga and 100 Giga have been developed. For example, in a multichannel optical transmission module for performing a large-capacity super high-speed transmission, transmission is performed through a single optical fiber using a MUX device.

A distributed feedback type laser diode (DFB LD) is mainly used as a method of hybrid coupling with a mux element in a conventional multi-channel optical transmission module. That is, the conventional multi-channel optical transmission module collects the light from the DFB LD into a lens, and performs active optical alignment to use a mux element and a hybrid packaging method.

In this case, the light coupling efficiency between the light emitted through the lens and the mux element is low, and the optical alignment time is long. Also, in the single mode, since the alignment tolerance is less than 1 μm, it takes a long time to find the optimal point for increasing the optical coupling efficiency.

For example, in the prior art, when a multi-channel optical transmission module or the like is packaged, when arraying waveguide gratings (AWG devices) are arrayed in a laser diode, active optical alignment is performed while current and voltage are applied Therefore, there is a limitation that the optical alignment time is long in the single mode.

In addition, in the conventional method of packaging using a DFB LD, a lens, and an AWG device, a process time is long because alignment tolerance is required within 1 μm.

It is an object of the present invention to provide a bonding structure of a surface plasmon grating pattern and a graphene-protecting copper when packaging a multi-channel optical transmission integrated module, which is proposed in order to overcome the above- Since the light emitted from the VCSEL (Vertical Cavity Surface Emitting Laser) chip, which is a laser diode, is aligned with the surface plasmon grating pattern of several tens of micro-sized by the surface plasmon polariton optical waveguide generated by the above-mentioned coupling structure, The present invention provides an optical transmission integrated module employing a graphene-protective copper that has a tolerance of about several micrometers and is passive optical alignment capable of relatively shortening a processing time.

According to an aspect of the present invention, there is provided an optical transmission integrated module and a method of fabricating the same, the method including: sequentially stacking a lower cladding silica and a core silica on a silicon substrate; A process in which silica for a core having the components of the optical transmission integration module is formed on the silica for lower cladding by patterning and etching for the silica for core; Depositing copper on the upper surface of a part of the silica for lower cladding so as to be connected to PLC (Planar Lightwave Circuit) made of the silica for core; Depositing graphene on the copper; Forming an upper cladding silica over the entire surface of the lower cladding silica; A step of exposing a portion of the graphene on the copper and forming a surface plasmon grazing pattern on another portion of the graphene; And forming an electrode and a gold bumper around the surface plasmon grating pattern to electrically mount the VCSEL chip on the surface plasmon grating pattern.

The optical transmission integrated module to which the graphene protection copper according to the present invention is applied is different from the conventional optical alignment method using the conventional DFB LD, lens, AWG device, MUX device, There are a number of advantages to providing a passive optical alignment of a VCSEL to a surface plasmon polariton optical waveguide using graphene-protected copper.

For example, the effect of the present invention has four advantages.

First, in the present invention, the alignment tolerance is increased from 1 um to several um.

Secondly, according to the present invention, the passive optical alignment is performed through the markers, so that the alignment time is shortened.

Thirdly, in the present invention, there is an advantage of reducing to 6 degrees of freedom optical alignment and to 3 degrees of freedom optical alignment.

Finally, the process according to all the fabrication methods of the present invention has advantages of shortening the time because a CMOS (Complementary Metal Oxide Semiconductor) process and a Surface Mount Technology (SMT) process are possible.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view of an optical transmission integrated module for transmitting an optical signal by grafting a surface plasmon grating pattern made of a silica material according to an embodiment of the present invention. FIG.
FIG. 2 and FIG. 3 are manufacturing steps showing a method of manufacturing an optical transmission integrated module using the graphene-protective copper shown in FIG.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. And is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined by the claims.

It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. &Quot; comprises " and / or "comprising" when used in this specification is taken to specify the presence or absence of one or more other components, steps, operations and / Or add-ons. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view of an optical transmission module for transmitting an optical signal by grafting a surface plasmon grating pattern made of a silica material according to an embodiment of the present invention.

Referring to FIG. 1, the present embodiment differs from the first embodiment in that light emitted from a VCSEL chip (for example, reference numeral 108 in FIG. 3), which is a single mode VCSEL or a single mode vertical laser diode, is converted into a surface plasmon grating pattern M made of silica- And is converted to a surface plasmon polarized wave to transmit an optical signal.

The surface plasmon grating pattern (M) consists of a grating portion on the left side and a waveguide portion on the right side.

The grating portions of the surface plasmon grating pattern M are spaced apart from each other in parallel in FIG. 1, and are formed so that the length gradually decreases from one side to the other, so that the graphene protection copper (P) Which corresponds to a number of parallel structures that serve to convert light into surface plasmon polariton waves while focusing. That is, the grating portion of the surface plasmon grating pattern (M) serves to collect light by the surface plasmon polariton optical waveguide method.

A guided portion of the surface plasmon grating pattern M extends to one side of the grating portion and is connected to an optical waveguide T of a PLC (Planar Lightwave Circuit), and the light integrated in the grating portion is guided to the optical waveguide (T).

Optical signal data transmission technology has major performance factors such as optical coupling efficiency, optical alignment time, active optical alignment, and passive optical alignment.

In particular, when aligning optical waveguides between a laser diode such as a VCSEL chip and an AWG device, optical signals are mostly transmitted through active alignment using a lens.

In contrast, in the present invention, as shown in FIG. 1, in order to transmit an optical signal, a surface plasmon grating pattern M made of a silica material and a graphene protection copper P (P) provided on the bottom surface of the surface plasmon grating pattern M ), It is possible to transmit optical signals in a low-loss surface plasmon polariton optical waveguide system while contributing to miniaturization of the integrated optical element. The surface plasmon grating pattern M is connected to the optical waveguide T of the PLC of the silica 102 (see FIG. 2 or 3) for the core as described later.

In the present invention, single or array type (for example, N) VCSEL chips are mounted on a surface plasmon grating pattern (M) using graphene-protective copper by using a surface mount technology (SMT) Can be packaged.

A method of fabricating the optical transmission integrated module using the graphene-protective copper according to the present invention will be described with reference to FIGS. 2 and 3. FIG.

FIGS. 2 and 3 are manufacturing process diagrams illustrating a method of fabricating an optical transmission integrated module using the graphene-protective copper shown in FIG.

Referring to FIG. 2, the fabrication method of the present embodiment to be described later is implemented by a CMOS (Complementary Metal Oxide Semiconductor) process and the SMT process, and detailed process technologies that those skilled in the art can easily understand are omitted in the present embodiment It can be possible.

First, a process of sequentially stacking the lower cladding silica 101 and the core silica 102 on the silicon substrate 100 is performed.

For example, a silicon substrate 100 is prepared (see Fig. 2 (a)).

On the silicon substrate 100, a lower cladding silica 101 is formed over the entire surface of the silicon substrate 100 (see FIG. 2 (b)).

On the lower cladding silica 101, core silica 102 is formed over the entire surface of the lower cladding silica 101 (see Fig. 2 (c)).

Here, the thickness of the silica for core 102 is the same as the thickness of the AWG device, and may be formed to be larger than the thickness of the silicon substrate 100 and larger than the thickness of the lower cladding silica 101.

Then, patterning (not shown) for forming the core silica 102 using lithography and etching (e.g., etching) is performed.

For example, in the patterning of the present embodiment, an exposure mask is aligned on a photoresist film (not shown), and the weakened photoresist is removed by exposure to light through the exposure mask to form an AWG element pattern, a PLC (Planar Lightwave Circuit) .

After the pattern is formed, etching is performed to form a silica 102 for a core having components for the optical transmission integration module in a shape corresponding to the pattern, on the silica 101 for lower cladding (FIG. 2D) Reference). Here, the components for the optical transmission integration module may refer to the AWG elements, PLC, and optical splitter for each pattern.

2 (d), on the upper surface of the lower cladding silica 101, a PLC optical waveguide T having the thickness of the silica for core 102 is disposed.

1) on the upper surface of a part of the lower cladding silica 101 (for example, a position for transmitting the optical signal) so as to be connected to the end of each optical waveguide T of the PLC made of the silica 102 for core, In order to fabricate the surface plasmon grating pattern M composed of the above-mentioned graphene protective copper (P) and a silica material, copper 103 is deposited in a thickness of several tens nm to several um (see FIG. 2 (e)).

The graphene 104 may be grown on the deposited copper 103 by chemical vapor deposition (CVD), or a separate copper prepared in advance in parallel with the fabrication method of the present invention and another copper Graphene 104 is bonded to the lower cladding silica 101 by any one of the methods of mounting the graphene (not shown) (for example, a separate layer of copper and graphene) 103) (see Fig. 2 (f)). That is, the graphene 104 is formed on the copper 103.

3, after the graphene 104 is formed on the copper 103, the upper cladding silica 105 is formed over the entire surface of the lower cladding silica 101 (FIG. 3 (g) Reference).

As a result, as shown in an enlarged view in FIG. 3 (g), the portion of the core silica 102 and the copper 103 covered by the graphene 104 (for example, graphene protection copper) It can be completely covered by the car 104. [

Thereafter, the graphene 104 on the copper 103 is partly exposed by a partial chemical etching or CMOS (Complementary Metal Oxide Semiconductor) process for the upper cladding silica 104, And the surface plasmon grating pattern M is exposed and formed on another portion (see (h) of FIG. 3).

At this time, the surface plasmon grating pattern (M) is made of the same material as the upper cladding silica (105). The surface plasmon grating pattern M may be a structure remaining after the partial chemical etching of the upper cladding silica 105 or a structure made of the upper cladding silica 105 processed separately on the graphen 104 Lt; / RTI >

Next, an electrode 106 and a gold bumper 107 are formed around the surface plasmon grating pattern M, and a VCSEL chip 108 is electrically connected to the surface plasmon grating pattern M So as to be energized.

For example, a plurality of electrodes 106 for applying a current to the VCSEL chip 108 may be formed on the periphery of the surface plasmon grating pattern M by using the lower cladding silica 101 A plurality of electrodes are formed on the upper surface of the substrate (see Fig. 3 (i)).

As shown in the enlarged view in Fig. 3 (i), the plurality of electrodes 106 can be formed through a semiconductor process (e.g., a lithography and a deposition process).

The gold bumpers 107 are formed on the plurality of electrodes 106 formed at predetermined intervals and sizes using a wire bonding technique (see FIG. 3 (j)).

At this time, not only a single VCSEL chip 108 but also N array VCSEL chips 108 can be extended and applied.

Finally, the VCSEL chip 108 is placed on the gold bumper 107 by using a flip chip bonder, and heat is applied to the gold bumper 107 (see FIG. 3 (k)).

At this time, connection electrodes capable of being fused to the gold bumper 107 are formed on the bottom surface of each VCSEL chip 108 so as to correspond to the arrangement structure of the gold bumper 107.

Each VCSEL chip 108 refers to a vertical resonance type surface-emitting laser device or device.

Since the markers (not shown) are formed in the vicinity of the electrode 106 when the VCSEL chip 108 is mounted on the MUX element (not shown), passive light alignment rather than active light alignment is easier than active light alignment The optical alignment can be performed quickly.

Thus, the present embodiment is advantageous in that it can be aligned and manufactured by the CMOS process and the SMT process in each manufacturing process or process, thereby shortening the time required for the conventional active alignment.

The foregoing description is merely illustrative of the technical idea of the present invention and various changes and modifications may be made without departing from the essential characteristics of the present invention. Therefore, the embodiments described in the present invention are not intended to limit the scope of the present invention, but are intended to be illustrative, and the scope of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas which are equivalent or equivalent thereto should be interpreted as being included in the scope of the present invention.

100: silicon substrate 101: lower cladding silica
102: silica for core 103: copper
104: graphene 105: upper cladding silica
106: electrode 107: gold pump
108: VCSEL chip M: Surface plasmon grating pattern

Claims (1)

Sequentially stacking the lower cladding silica and the core silica on the silicon substrate;
A process in which silica for a core having the components of the optical transmission integration module is formed on the silica for lower cladding by patterning and etching for the silica for core;
Depositing copper on the upper surface of a part of the silica for lower cladding so as to be connected to PLC (Planar Lightwave Circuit) made of the silica for core;
Depositing graphene on the copper;
Forming an upper cladding silica over the entire surface of the lower cadding silica;
A step of exposing and forming the surface plasmon grating pattern on another portion of the graphene, the graphen on the copper being partially exposed; And
And a step of forming an electrode and a gold bumper around the surface plasmon grating pattern so that the VCSEL chip is electrically energetically mounted on the surface plasmon grating pattern
A method for fabricating an optical transmission integrated module employing phosphorous protective copper.

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