KR20160126725A - Semiconductor package and manufacturing method thereof - Google Patents

Semiconductor package and manufacturing method thereof Download PDF

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Publication number
KR20160126725A
KR20160126725A KR1020150058168A KR20150058168A KR20160126725A KR 20160126725 A KR20160126725 A KR 20160126725A KR 1020150058168 A KR1020150058168 A KR 1020150058168A KR 20150058168 A KR20150058168 A KR 20150058168A KR 20160126725 A KR20160126725 A KR 20160126725A
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KR
South Korea
Prior art keywords
underfill material
circuit board
semiconductor chip
masking tape
mounting region
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Application number
KR1020150058168A
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Korean (ko)
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KR101783711B1 (en
Inventor
이수길
송용환
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(주)파트론
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Priority to KR1020150058168A priority Critical patent/KR101783711B1/en
Publication of KR20160126725A publication Critical patent/KR20160126725A/en
Application granted granted Critical
Publication of KR101783711B1 publication Critical patent/KR101783711B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

Abstract

A semiconductor package and a method of manufacturing the same are disclosed. A semiconductor package and a method of manufacturing the same according to the present invention are a mounting region in which a semiconductor chip is located at an upper portion of a top surface in a subsequent step, and at least one electrode pad A method of manufacturing a semiconductor device, comprising: preparing a formed circuit board; attaching a masking tape to an area including a periphery of the mounting area; mounting a semiconductor chip having a solder ball on a portion corresponding to the electrode pad, And removing the underfill material attached to the upper surface of the masking tape and the masking tape attached to the periphery of the mounting area.

Description

Technical Field [0001] The present invention relates to a semiconductor package and a manufacturing method thereof,

The present invention relates to a semiconductor package and a method of manufacturing the same, and more particularly, to a method of packaging a semiconductor using an underfill process and a semiconductor package manufactured thereby.

In fabricating the semiconductor package, the semiconductor chip is mounted on the circuit board in many cases. A semiconductor chip is mounted on a circuit board by a bonding process. Die bonding, wire bonding, and flip chip bonding are mainly used for bonding.

Among them, the flip chip bonding is a method of directly connecting the semiconductor chip and the circuit board using solder balls. Flip chip bonding is superior to other methods in terms of adhesion and performance because no wires are used. Therefore, miniaturization and slimming are widely used in electronic devices. For example, it is widely used in smart phones, tablet computers, mobile phones, and the like.

In the flip chip bonding, the semiconductor chip and the circuit board are coupled with the solder balls interposed therebetween, and a spacing space can be formed therebetween. As a result, foreign matter may penetrate into the spacing space to cause defects, and the bonding between the semiconductor chip and the circuit board may not be sufficiently rigid. Therefore, an underfill process for filling a space between a semiconductor chip and a circuit board with a nonconductive resin material is widely used. As the underfill material, an epoxy resin or the like is mainly used.

The underfill material is mainly injected into the spaced space in a liquid state and then hardened. In some cases, the underfill material flows out of the space between the semiconductor chip and the circuit board before being cured. Then, when the underfill material is cured, not only the space between the semiconductor chip and the circuit board but also the peripheral portion thereof is formed.

If the semiconductor package is exposed to the outside, the underfill material formed in the peripheral portion of the spacing space may cause a problem of appearance defects. Also, when another structure is coupled to the semiconductor package, the underfill material formed in the peripheral portion of the spacing space may cause an interference problem.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a semiconductor package capable of removing an underfill material formed outside a space between a semiconductor chip and a circuit board.

Another problem to be solved by the present invention is to provide a method of manufacturing a semiconductor package in which a bezel portion can be closely attached to a peripheral portion of a semiconductor chip.

In order to solve the above problems, a semiconductor package and a method of manufacturing the same according to the present invention are characterized in that a part of the upper surface is a mounting area in which a semiconductor chip is located at an upper part in a subsequent step, and at least one electrode pad is formed in the mounting area Attaching a masking tape to an area including a periphery of the mounting area; mounting a semiconductor chip having a solder ball on a portion corresponding to the electrode pad to the mounting area; Forming an underfill material between the areas and removing the underfill material attached to the masking tape and its upper surface attached to the periphery of the mounting area.

In one embodiment of the present invention, the step of attaching the masking tape may attach a masking tape to a rim and a peripheral portion of the mounting region.

In one embodiment of the present invention, the masking tape may be applied at the step of mounting the semiconductor chip.

According to an embodiment of the present invention, the step of forming the underfill material includes the steps of: injecting an underfill material between the semiconductor chip and the mounting region; and filling the underfill material filled between the semiconductor chip and the mounting region, And curing the underfill material applied on the upper surface of the masking tape attached to the periphery of the mounting area.

In one embodiment of the present invention, in the step of injecting the underfill material, the underfill material may be applied to the upper surface of the masking tape attached to the periphery of the mounting area.

In one embodiment of the present invention, the removing may include separating a masking tape attached to a peripheral portion of the mounting region and an underfill material bonded to the upper surface of the masking tape.

In one embodiment of the present invention, the separating step may include cutting a portion corresponding to an outer edge of the mounting area by CNC cutting.

In one embodiment of the present invention, the separating step may include a step of irradiating a portion corresponding to the outer periphery of the mounting region above the circuit board by laser irradiation.

In one embodiment of the present invention, a metal layer is formed on a portion of the circuit board corresponding to the outer periphery of the mounting region, and in the cutting step, the laser may be irradiated to the metal layer.

In one embodiment of the present invention, the method may further include coupling the bezel to the periphery of the semiconductor chip.

In one embodiment of the present invention, the step of coupling the bezel may include electrically connecting the bezel to the ground of the circuit board.

In one embodiment of the present invention, the circuit board includes a metal layer formed on a portion corresponding to an outer portion of the mounting region, and the step of bonding the bezel includes electrically connecting the bezel portion to the metal layer .

According to an embodiment of the present invention, the semiconductor chip may include an upper substrate, at least one solder ball coupled to a lower surface of the upper substrate, and a sensor chip coupled to a lower surface of the upper substrate, The sensor chip may protrude downward from the lower surface of the sensor chip.

In one embodiment of the present invention, the semiconductor chip may include a fingerprint sensor chip.

According to an aspect of the present invention, there is provided a semiconductor package comprising: a circuit board having a mounting region and at least one electrode pad formed on the mounting region; a solder ball formed on a portion corresponding to the electrode pad, And an underfill material which is formed between the semiconductor chip and the mounting region and has a side edge formed by a cut surface perpendicular to the circuit board.

In one embodiment of the present invention, a masking tape may be further disposed between the lower surface of the edge portion of the underfill material and the circuit board.

In one embodiment of the present invention, the masking tape may have a heat-resistant temperature higher than a temperature applied in the process of mounting the semiconductor chip on the mounting region.

According to an embodiment of the present invention, a metal layer may be further disposed between the lower surface of the rim portion of the underfill material and the circuit board.

In one embodiment of the present invention, the metal layer may extend from a portion of the underfill material contacting the lower surface of the rim to a peripheral portion of the lower surface of the underfill material.

In one embodiment of the present invention, a bezel portion coupled to the periphery of the semiconductor chip may be further included.

In one embodiment of the present invention, the underfill material further includes a metal layer formed at a peripheral portion of a lower side of the underfill material, and the bezel portion may be electrically connected to the metal layer.

According to an embodiment of the present invention, the semiconductor chip may include an upper substrate, at least one solder ball coupled to a lower surface of the upper substrate, and a sensor chip coupled to a lower surface of the upper substrate, The sensor chip may protrude downward from the bottom surface of the sensor chip.

In one embodiment of the present invention, the semiconductor chip may include a fingerprint sensor chip.

In one embodiment of the present invention, the circuit board may be a flexible circuit board.

A semiconductor package according to an embodiment of the present invention can remove an underfill material formed on the outside of a space between a semiconductor chip and a circuit board.

In addition, the semiconductor package according to an embodiment of the present invention may be attached to the periphery of the semiconductor chip in close contact with the bezel.

1 is a flowchart illustrating a method of manufacturing a semiconductor package according to an embodiment of the present invention.
2A is a cross-sectional view illustrating a step of preparing a circuit board of a method of manufacturing a semiconductor package according to an embodiment of the present invention.
FIG. 2B is a plan view illustrating a step of preparing a circuit board of a method of manufacturing a semiconductor package according to an embodiment of the present invention. FIG.
3A is a cross-sectional view illustrating a step of attaching a masking tape in a method of manufacturing a semiconductor package according to an embodiment of the present invention.
FIG. 3B is a plan view illustrating a step of attaching a masking tape in a method of manufacturing a semiconductor package according to an embodiment of the present invention.
4 is a cross-sectional view illustrating a step of mounting a semiconductor chip in a method of manufacturing a semiconductor package according to an embodiment of the present invention.
5 is a cross-sectional view illustrating a step of forming an underfill material in a method of manufacturing a semiconductor package according to an embodiment of the present invention.
6 is a cross-sectional view illustrating a step of removing a portion of an underfill material in a method of manufacturing a semiconductor package according to an embodiment of the present invention.
7 is a cross-sectional view illustrating a step of assembling a bezel of a method of manufacturing a semiconductor package according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In describing the present invention, if it is judged that it is possible to make the gist of the present invention obscure by adding a detailed description of a technique or configuration already known in the field, it is omitted from the detailed description. In addition, terms used in the present specification are terms used to appropriately express the embodiments of the present invention, which may vary depending on the person or custom in the relevant field. Therefore, the definitions of these terms should be based on the contents throughout this specification.

Hereinafter, a method of manufacturing a semiconductor package according to an embodiment of the present invention will be described with reference to FIGS. 1 to 7 attached hereto.

1 is a flowchart illustrating a method of manufacturing a semiconductor package according to an embodiment of the present invention.

Referring to FIG. 1, a method of manufacturing a semiconductor package includes steps of preparing a circuit board (S100), attaching a masking tape (S200), mounting a semiconductor chip (S300), forming an underfill material (S400 Removing a portion of the underfill material (S500), and joining the bezel portion (S600).

Referring to Figs. 2A and 2B, a step S100 of preparing a circuit board will be described. 2A is a cross-sectional view illustrating a step of preparing a circuit board of a method of manufacturing a semiconductor package according to an embodiment of the present invention. FIG. 2B is a plan view illustrating a step of preparing a circuit board of a method of manufacturing a semiconductor package according to an embodiment of the present invention. FIG.

The circuit board 100 may be formed in a plate shape having an upper surface 101 and a lower surface 102.

The mounting area 110 may be provided on a part of the upper surface 101 of the circuit board 100. [ The mounting region 110 is a region where the semiconductor chip 300 is located at an upper portion in a subsequent step. At least one electrode pad 111 may be formed in the mounting region 110. The electrode pad 111 may be a metal pattern layer exposed on the upper surface of the circuit board 100.

The metal layer 120 may be formed on the periphery of the mounting region 110 and the periphery of the upper surface 101 of the circuit board 100. The metal layer 120 may be formed to surround at least a part of the mounting region 110. The metal layer 120 may be a thin film of a predetermined thickness formed of copper, aluminum, gold, silver, or the like. The metal layer 120 may not be cut by the laser when the laser is irradiated and may not allow the laser to pass if a laser cut is used in a subsequent step.

At least one electrode pad may be formed on the lower surface 102 of the circuit board 100. The electrode pad of the lower surface 102 may be electrically connected to the electrode pad 111 of the upper surface 101 through the inside of the circuit board 100. The electrode pad of the lower surface 102 may be electrically connected to the electrode pad of the electronic device when mounted on the electronic device in a subsequent step. The electrode pad of the lower surface 102 may be used as, for example, a signal input / output terminal, a power input terminal, a ground terminal, or the like.

The circuit board 100 may be a printed circuit board. In particular, the circuit board 100 may be a flexible circuit board. In the case of a flexible circuit board, the base may be formed of a flexible resin film such as polyimide, and a pattern formed of a conductive material such as copper, aluminum, gold, or silver may form an electrode pad.

Referring to FIGS. 3A and 3B, the step S200 of attaching the masking tape will be described. 3A is a cross-sectional view illustrating a step of attaching a masking tape in a method of manufacturing a semiconductor package according to an embodiment of the present invention. FIG. 3B is a plan view illustrating a step of attaching a masking tape in a method of manufacturing a semiconductor package according to an embodiment of the present invention.

The masking tape 200 is attached to the upper surface 101 of the circuit board 100. An adhesive material is applied to the lower surface of the masking tape 200 and can be combined with the upper surface 101 of the circuit board 100 after the masking tape 200 is attached. The masking tape 200 can be separated from the upper surface 101 of the circuit board 100 by an external force again at a later stage.

The masking tape 200 may be formed of a material having a heat-resistant temperature higher than or equal to a temperature applied in the subsequent step of mounting the semiconductor chip 300. Specifically, it is preferable that the masking tape 200 has a heat-resistant temperature of 170 占 폚 to 300 占 폚 or higher. For example, the masking tape 200 may be formed of a film formed of a material of polyimide.

The masking tape 200 is attached to an area of the upper surface 101 of the circuit board 100 including the periphery of the mounting area 110. [ More specifically, the masking tape 200 can be attached from the rim portion of the mounting region 110 to the peripheral portion outside the mounting region 110.

The masking tape 200 may be attached to cover the metal layer 120 formed on the circuit board 100. Specifically, the masking tape 200 and the metal layer 120 may overlap at least in some areas.

Referring to Fig. 4, step S300 of mounting a semiconductor chip will be described. 4 is a cross-sectional view illustrating a step of mounting a semiconductor chip in a method of manufacturing a semiconductor package according to an embodiment of the present invention.

The semiconductor chip 300 includes an upper substrate 310 and a sensor chip 320. The upper substrate 310 is placed on the mounting area 110 of the circuit board 100 in the form of a flat plate. The upper substrate 310 is spaced apart from the circuit board 100 by a predetermined distance. The lower surface of the upper substrate 310 is located opposite to the mounting region 110 of the circuit board 100. At least one electrode pad 111 may be formed on the lower surface of the upper substrate 310. The electrode pads 111 may be formed at portions corresponding to the electrode pads 111 of the mounting region 110 of the circuit board 100.

At least one solder ball 330 may be coupled to the electrode pad 111 on the lower surface of the upper substrate 310. The solder ball 330 has a predetermined height and is formed to protrude downward from the lower surface of the upper substrate 310.

The sensor chip 320 is coupled to the lower surface of the upper substrate 310. The sensor chip 320 is formed to be smaller than the upper substrate 310 and is coupled to at least a part of the lower surface of the upper substrate 310. The sensor chip 320 may be coupled to the center of the lower surface of the upper substrate 310. The sensor chip 320 may be formed to have a height smaller than that of the solder ball 330 so that the solder ball 330 protrudes more downward than the sensor chip 320 on the lower surface of the upper substrate 310. Accordingly, the sensor chip 320 is surrounded by the solder ball 330.

The sensor chip 320 may be a sensor chip 320 performing various functions. For example, the sensor chip 320 may be a fingerprint sensor chip. When the sensor chip 320 is a fingerprint recognition sensor chip, a signal generated by the sensor chip 320 may be outputted through the upper substrate 310. The output signal may be input to the upper surface of the upper substrate 310 directly or through a fingerprint that is in contact with another layer. The signal can be input to the sensor chip 320 again through the fingerprint. The sensor chip 320 can recognize the unique characteristic of the fingerprint by comparing the output signal and the input signal.

The semiconductor chip 300 is disposed on the circuit board 100 so as to correspond to the mounting region 110 so as to be mounted on the mounting region 110 of the circuit board 100. [ At this time, it is important that the solder balls 330 coupled to the semiconductor chip 300 are arranged to correspond to the electrode pads 111 of the mounting region 110 of the circuit board 100. Thereafter, the solder balls 330 are heated so that they can be melted to a certain degree. The solder balls 330 are melted and electrically connected to the electrode pads 111 of the mounting region 110 of the circuit board 100. Thereafter, the temperature is further regulated to room temperature so that the solder ball 330 is solidified. The solder ball 330 electrically connects the electrode pad 111 of the circuit board 100 and the electrode pad 111 of the semiconductor chip 300 through the above process.

The solder cream may be applied to the electrode pads 111 of the circuit board 100 before the semiconductor chip 300 is placed on the circuit board 100. [ The solder cream may help to electrically connect the solder balls 330 to the electrode pads 111 of the circuit board 100.

Referring to Fig. 5, description will be made of a step S400 of forming an underfill material. 5 is a cross-sectional view illustrating a step of forming an underfill material in a method of manufacturing a semiconductor package according to an embodiment of the present invention.

The underfill material 400 is formed by being injected between the semiconductor chip 300 and the mounting region 110. The underfill material 400 may be a non-conductive resin material. The underfill material 400 may be a resin material that is initially in a liquid state and then hardened after being injected. As the underfill material 400, for example, an epoxy resin, a silicone resin, or the like may be used.

The step S400 of forming the underfill material includes a step of injecting the underfill material and a step of curing the underfill material.

In the step of injecting the underfill material, a liquid underfill material 400 is injected between the semiconductor chip 300 and the mounting region 110 through a dispenser or the like. At this stage, the liquid underfill material 400 can flow to the periphery of the mounting region 110 without staying between the semiconductor chip 300 and the mounting region 110. Accordingly, the liquid underfill material 400 may be applied to the upper surface of the masking tape 200 attached to the peripheral portion of the mounting region 110. The liquid underfill material 400 flows out only to the upper surface of the masking tape 200 and an appropriate amount of the underfill material 400 can be injected so as not to be applied to the upper surface of the circuit board 100 outside the masking tape 200. Also, for this purpose, it is preferable that the masking tape 200 is attached with an appropriate area.

The step of curing the underfill material includes the step of curing the underfill material 400 filled between the semiconductor chip 300 and the mounting area 110 and the underfill material 400 applied to the upper surface of the masking tape 200 attached to the periphery of the mounting area 110 400). The underfill material 400 may be cured at room temperature for a predetermined time or by heating.

The underfill material 400 is firmly bonded to the lower surface of the semiconductor chip 300, the sensor chip 320, the solder ball 330, and the upper surface 101 of the circuit board 100 after being cured. Therefore, the bonding reliability between the semiconductor chip 300 and the circuit board 100 can be improved. And the semiconductor chip 300 and the mounting region 110 are filled tightly. Therefore, it is possible to suppress the failure of foreign matter to penetrate between the semiconductor chip 300 and the mounting region 110. In addition, the semiconductor chip 300 is firmly bonded to the upper surface of the masking tape 200.

Referring to FIG. 6, a description will be given of a step (S500) of removing a part of the underfill material. 6 is a cross-sectional view illustrating a step of removing a portion of an underfill material in a method of manufacturing a semiconductor package according to an embodiment of the present invention.

A portion 420 of the underfill material 400 is removed. Particularly, a portion 420 of the underfill material 400 located in the peripheral portion, which is not located between the semiconductor chip 300 and the mounting region 110, is removed. The portion 420 of the underfill material 400 is removed and the masking tape 220 combined with the underfill material 420 to be removed is also removed.

The portion 420 of the underfill material 400 that flows out to the peripheral portion rather than the portion 410 located between the semiconductor chip 300 and the mounting region 110 contributes to the improvement of the reliability of the semiconductor package and the suppression of foreign matter penetration Do not. In contrast, the portion 420 prevents the bezel 500 coupled with the semiconductor chip 300 from being closely coupled with the semiconductor chip 300 in a step to be described later. Accordingly, the bezel part 500 in a step to be described later flows out to the peripheral part so as to be closely attached to the semiconductor chip 300, and the cured underfill material 400 is selectively removed.

Particularly, the portion 410 of the underfill material 400 located between the semiconductor chip 300 and the mounting region 110, and the portions thereof closely attached thereto are left. The masking tape 210, which is combined with the remaining underfill material 410, is also left. The underfill material 420 and the masking tape 220 attached to the periphery of the mounting region 110 are removed.

The step of removing some of the underfill materials S500 includes separating the portions 210 and 410 to be removed and the portions 220 and 420 to be removed. In the separating step, the underfill material 410 to be left and the underfill material 420 to be removed are separated. Also, the masking tape 210 to be left and the masking tape 220 to be removed are separated.

The separating step may be a CNC cutting method, a laser cutting method, or both.

In the separating step, the portion to be left and the portion to be removed are cut in the vertical direction and separated. However, in this process, it is necessary that the circuit board 100 is not cut.

In the method of cutting with CNC cutting, the cutting machine starts cutting from above and cuts to the masking tape 200 coupled to the circuit board 100. As a result, the underfill material 400 and the masking tape 200 are cut, but the circuit board 100 under the cut is not cut.

A method of irradiating a laser with a laser beam irradiates the laser beam from above. The laser cuts through the underfill material 400, passes through the masking tape 200, and passes. When the laser is irradiated and moved, the underfill material 400 and the masking tape 200 are cut off. The irradiated laser beam is irradiated onto the metal layer 120 formed under the masking tape 200. The laser does not pass through the metal layer 120 and does not cut the metal layer 120. Therefore, only the underfill material 400 and the masking tape 200 are cut by the laser.

In some cases, CNC cutting and laser irradiation can be performed in combination. For example, a portion of the upper portion of the portion where the underfill material 400 and the masking tape 200 are combined may be cut by the CNC cutting method, and a portion of the lower portion may be cut by the laser irradiation method. The CNC cutting method has an advantage in that the outer surface of the upper surface cut surface is cut excellently, but has a disadvantage that it is difficult to precisely cut the circuit board 100 before cutting. On the other hand, the laser irradiation method can be controlled to be precisely cut until before the circuit board 100, but has the disadvantage that soot can be generated on the upper surface cut surface by the heat of the laser. Therefore, it is possible to precisely cut only the circuit board 100 before the circuit board 100 while maintaining excellent appearance of the upper surface cut surface by the complex cutting method as described above.

In this manner, the underfill material 400 and the masking tape 200 can be separated. Thereafter, the separated underfill material 420 and the masking tape 220 are removed from the circuit board 100 and removed. The remaining underfill material 410 thus formed has a vertically flattened side surface 411.

Referring to FIG. 7, a description will be given of a step (S600) of engaging the bezel. 7 is a cross-sectional view illustrating a step of assembling a bezel of a method of manufacturing a semiconductor package according to an embodiment of the present invention.

The bezel part 500 is located around the semiconductor chip 300. The inner peripheral surface of the bezel part 500 may be in contact with or in close contact with the side surface 411 of the underfill material 400 formed vertically and flattened vertically.

The bezel portion 500 may be formed of a conductive material. For example, the bezel portion 500 may be formed of a metal material, a conductive plastic, or the like. The bezel part 500 may be electrically connected to the ground of the circuit board 100. Specifically, the metal layer 120 formed on the periphery of the mounting region 110 and the periphery of the circuit board 100 may be grounded. The bezel portion 500 may be electrically connected to the metal layer 120 of the circuit board 100. To this end, the bezel portion 500 may be coupled to the metal layer 120 of the ground by soldering 510 or the like after being coupled to the periphery of the semiconductor chip 300. The electrical stability of the bezel portion 500 can be improved through such connection.

Hereinafter, a semiconductor package according to an embodiment of the present invention will be described with reference to FIG. 7 attached hereto. 7 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

The semiconductor package to be described below corresponds to the semiconductor package manufactured by the manufacturing method of the semiconductor package described above with reference to Figs. 1 to 7. Therefore, some of the contents overlapping with those described above are omitted.

Referring to FIG. 7, the semiconductor package includes a circuit board 100, a masking tape 200, a semiconductor chip 300, an underfill material 400, and a bezel portion 500.

The circuit board 100 is formed in a plate shape having an upper surface 101 and a lower surface 102. The circuit board 100 may be a rigid or flexible circuit board.

A part of the upper surface 101 of the circuit board 100 is the mounting area 110. The semiconductor chip 300 is positioned above the mounting region 110. At least one electrode pad 111 is formed in the mounting region 110.

A metal layer 120 is formed around the rim of the mounting region 110 of the circuit board 100 and the periphery thereof. The metal layer 120 is formed to extend over the edge portion corresponding to the mounting region 110 and the peripheral portion corresponding to the outside of the mounting region 110.

The electrode pad 111 and the metal layer 120 of the circuit board 100 may all be formed of a conductive pattern formed on the printed circuit board 100.

The semiconductor chip 300 is mounted on the mounting region 110 of the circuit board 100. Specifically, the electrode pads 111 of the semiconductor chip 300 are electrically connected to the electrode pads 111 of the circuit board 100 through the solder balls 330. The semiconductor chip 300 may include a top substrate and a sensor chip 320.

The underfill material 400 is located between the semiconductor chip 300 and the mounting region 110. A part of the underfill material 400 may be formed to protrude outwardly between the semiconductor chip 300 and the mounting area 110, but only a small area is formed to protrude. The side surface 411 of the underfill material 400 has a vertically flat shape. Specifically, the side surface 411 of the underfill material 400 may be a cut surface cut by a method such as CNC cutting or laser irradiation.

A masking tape (200) is placed between the edge of the underfill material (400) and the circuit board (100).

The bezel portion 500 may be coupled to the periphery of the semiconductor chip 300. The bezel portion 500 may be electrically connected to the ground portion of the circuit board 100.

The embodiments of the semiconductor package and the manufacturing method of the present invention have been described above. The present invention is not limited to the above-described embodiments and the accompanying drawings, and various modifications and changes may be made by those skilled in the art to which the present invention pertains. Therefore, the scope of the present invention should be determined by the equivalents of the claims and the claims.

100: circuit board 110: mounting area
111: electrode pad 120: metal layer
200: masking tape 300: semiconductor chip
310: upper substrate 320: sensor chip
330: solder ball 400: underfill material
500: Bezel portion

Claims (24)

Preparing a circuit board on which at least one electrode pad is formed in the mounting region;
Attaching a masking tape to an area including a periphery of the mounting area;
Mounting a semiconductor chip having a solder ball on a portion corresponding to the electrode pad in the mounting region;
Forming an underfill material between the semiconductor chip and the mounting region; And
Removing a masking tape attached to a peripheral portion of the mounting region and an underfill material bonded to an upper surface of the masking tape. The method according to claim 1,
Wherein attaching the masking tape comprises:
Wherein a masking tape is attached to a peripheral portion and an edge portion of the mounting region. The method according to claim 1,
Wherein the masking tape has a heat-resistant temperature equal to or higher than a temperature applied in the step of mounting the semiconductor chip. The method according to claim 1,
Wherein forming the underfill material comprises:
Implanting an underfill material between the semiconductor chip and the mounting region; And
And curing the underfill material filled between the semiconductor chip and the mounting area and the underfill material applied on the upper surface of the masking tape attached to the periphery of the mounting area. 5. The method of claim 4,
In the step of injecting the underfill material,
Wherein the underfill material is applied to the upper surface of the masking tape attached to the periphery of the mounting area. The method according to claim 1,
Wherein the removing comprises:
And separating a masking tape attached to a peripheral portion of the mounting region and an underfill material bonded to an upper surface of the masking tape. The method according to claim 6,
Wherein said separating comprises:
And cutting the portion corresponding to the outer edge of the mounting area by CNC cutting. The method according to claim 6,
Wherein said separating comprises:
And irradiating a laser beam onto a portion corresponding to an outer edge of the mounting region above the circuit board to cut the semiconductor package. 9. The method of claim 8,
Wherein a metal layer is formed on a portion of the circuit board corresponding to an outer periphery of the mounting region,
Wherein the laser is irradiated to the metal layer in the cutting step. The method according to claim 1,
And bonding a bezel portion to the periphery of the semiconductor chip. 11. The method of claim 10,
The step of engaging the bezel portion comprises:
And electrically connecting the bezel portion to the ground of the circuit board. 11. The method of claim 10,
Wherein a metal layer is formed on a portion of the circuit board corresponding to an outer periphery of the mounting region,
The step of engaging the bezel portion comprises:
And electrically connecting the bezel portion to the metal layer. The method according to claim 1,
The semiconductor chip includes an upper substrate, at least one solder ball coupled to a lower surface of the upper substrate, and a sensor chip coupled to a lower surface of the upper substrate,
Wherein the solder balls protrude from the lower surface of the upper substrate more downward than the sensor chip. The method according to claim 1,
Wherein the semiconductor chip includes a fingerprint sensor chip. A circuit board in which a part of the upper surface is a mounting area and at least one electrode pad is formed in the mounting area;
A solder ball formed on a portion corresponding to the electrode pad, the solder ball being coupled to the electrode pad, the semiconductor chip being positioned above the mounting region; And
And an underfill material formed between the semiconductor chip and the mounting region, the side frame having a cut surface perpendicular to the circuit board. 16. The method of claim 15,
And a masking tape disposed between the lower surface of the rim portion of the underfill material and the circuit board. 17. The method of claim 16,
Wherein the masking tape has a heat-resistant temperature equal to or higher than a temperature applied in the process of mounting the semiconductor chip on the mounting region. 16. The method of claim 15,
And a metal layer positioned between the lower surface of the rim portion of the underfill material and the circuit board. 19. The method of claim 18,
And the metal layer extends from the portion of the underfill material contacting the lower surface of the rim to the peripheral portion of the lower surface of the underfill material. 16. The method of claim 15,
And a bezel portion coupled to the periphery of the semiconductor chip. 21. The method of claim 20,
Further comprising a metal layer formed on a peripheral portion of a lower side of the side surface of the underfill material,
And the bezel portion is electrically connected to the metal layer. 16. The method of claim 15,
The semiconductor chip includes an upper substrate, at least one solder ball coupled to a lower surface of the upper substrate, and a sensor chip coupled to a lower surface of the upper substrate,
Wherein the solder ball protrudes further downward than the sensor chip on the lower surface of the upper substrate. 16. The method of claim 15,
Wherein the semiconductor chip includes a fingerprint sensor chip. 16. The method of claim 15,
Wherein the circuit board is a flexible circuit board.


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