KR20160087819A - 저전압 보안 디지털 (sd) 인터페이스들을 위한 시스템들 및 방법들 - Google Patents
저전압 보안 디지털 (sd) 인터페이스들을 위한 시스템들 및 방법들 Download PDFInfo
- Publication number
- KR20160087819A KR20160087819A KR1020167014334A KR20167014334A KR20160087819A KR 20160087819 A KR20160087819 A KR 20160087819A KR 1020167014334 A KR1020167014334 A KR 1020167014334A KR 20167014334 A KR20167014334 A KR 20167014334A KR 20160087819 A KR20160087819 A KR 20160087819A
- Authority
- KR
- South Korea
- Prior art keywords
- compliant
- volts
- signal
- devices
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- Y02B60/1228—
-
- Y02B60/1235—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Sources (AREA)
- Information Transfer Systems (AREA)
- Telephone Function (AREA)
- Mobile Radio Communication Systems (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/087,047 | 2013-11-22 | ||
| US14/087,047 US9899105B2 (en) | 2013-11-22 | 2013-11-22 | Systems and methods for low voltage secure digital (SD) interfaces |
| PCT/US2014/066567 WO2015077426A1 (en) | 2013-11-22 | 2014-11-20 | Systems and methods for low voltage secure digital (sd) interfaces |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20160087819A true KR20160087819A (ko) | 2016-07-22 |
Family
ID=52146685
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020167014334A Withdrawn KR20160087819A (ko) | 2013-11-22 | 2014-11-20 | 저전압 보안 디지털 (sd) 인터페이스들을 위한 시스템들 및 방법들 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9899105B2 (enExample) |
| EP (1) | EP3072056B1 (enExample) |
| JP (2) | JP2016540300A (enExample) |
| KR (1) | KR20160087819A (enExample) |
| CN (1) | CN105745633A (enExample) |
| WO (1) | WO2015077426A1 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10235312B2 (en) | 2016-10-07 | 2019-03-19 | Samsung Electronics Co., Ltd. | Memory system and host device that maintain compatibility with memory devices under previous standards and/or versions of standards |
| CN109428587B (zh) * | 2017-08-31 | 2023-10-27 | 恩智浦美国有限公司 | 电平移位器备用单元 |
| CN111370052B (zh) * | 2018-12-25 | 2022-03-29 | 北京兆易创新科技股份有限公司 | 一种非易失存储器验证系统及方法 |
| US12197264B2 (en) * | 2020-11-10 | 2025-01-14 | Micron Technology, Inc. | Power management for a memory device |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2886681Y (zh) * | 2006-01-20 | 2007-04-04 | 骆建军 | 集成电压转换器的存储控制器 |
| US7483329B2 (en) * | 2000-01-06 | 2009-01-27 | Super Talent Electronics, Inc. | Flash card and controller with integrated voltage converter for attachment to a bus that can operate at either of two power-supply voltages |
| US6438638B1 (en) * | 2000-07-06 | 2002-08-20 | Onspec Electronic, Inc. | Flashtoaster for reading several types of flash-memory cards with or without a PC |
| JP2003281485A (ja) | 2002-03-26 | 2003-10-03 | Toshiba Corp | メモリカード及びメモリカードのデータ記録方法 |
| JP2004241995A (ja) * | 2003-02-05 | 2004-08-26 | Yazaki Corp | 車両用電源重畳多重通信システム |
| US6944028B1 (en) | 2004-06-19 | 2005-09-13 | C-One Technology Corporation | Storage memory device |
| WO2006035738A1 (ja) | 2004-09-28 | 2006-04-06 | Zentek Technology Japan, Inc. | ホストコントローラ |
| US7587544B2 (en) | 2006-09-26 | 2009-09-08 | Intel Corporation | Extending secure digital input output capability on a controller bus |
| US7890287B2 (en) * | 2007-06-30 | 2011-02-15 | Intel Corporation | Link transmitter swing compensation |
| CN201134901Y (zh) | 2007-12-24 | 2008-10-15 | 深圳市三木通信技术有限公司 | 一种通信终端 |
| US8233551B2 (en) * | 2008-07-07 | 2012-07-31 | Intel Corporation | Adjustable transmitter power for high speed links with constant bit error rate |
| US8019923B2 (en) * | 2008-12-01 | 2011-09-13 | Sandisk Il Ltd. | Memory card adapter |
| KR101626528B1 (ko) * | 2009-06-19 | 2016-06-01 | 삼성전자주식회사 | 플래시 메모리 장치 및 이의 데이터 독출 방법 |
| US9135109B2 (en) * | 2013-03-11 | 2015-09-15 | Seagate Technology Llc | Determination of optimum threshold voltage to read data values in memory cells |
-
2013
- 2013-11-22 US US14/087,047 patent/US9899105B2/en active Active
-
2014
- 2014-11-20 EP EP14819144.8A patent/EP3072056B1/en not_active Not-in-force
- 2014-11-20 KR KR1020167014334A patent/KR20160087819A/ko not_active Withdrawn
- 2014-11-20 JP JP2016530857A patent/JP2016540300A/ja active Pending
- 2014-11-20 CN CN201480063693.7A patent/CN105745633A/zh active Pending
- 2014-11-20 WO PCT/US2014/066567 patent/WO2015077426A1/en not_active Ceased
-
2019
- 2019-08-22 JP JP2019151909A patent/JP2019197598A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP3072056A1 (en) | 2016-09-28 |
| EP3072056B1 (en) | 2018-05-02 |
| CN105745633A (zh) | 2016-07-06 |
| JP2016540300A (ja) | 2016-12-22 |
| JP2019197598A (ja) | 2019-11-14 |
| WO2015077426A1 (en) | 2015-05-28 |
| US9899105B2 (en) | 2018-02-20 |
| US20150149841A1 (en) | 2015-05-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP3158698B1 (en) | Systems and methods for providing power savings and interference mitigation on physical transmission media | |
| KR101678348B1 (ko) | 대용량 스토리지-기반 인터페이스들을 통한 m-phy 기반 통신들의 동작, 및 관련된 커넥터들, 시스템들, 및 방법들 | |
| US20200008144A1 (en) | Link speed control systems for power optimization | |
| US20080245878A1 (en) | Ic card | |
| JP2019197598A (ja) | 低電圧セキュアデジタル(sd)インターフェースのためのシステムおよび方法 | |
| CN109479021B (zh) | 用于通信总线的从动设备发起的中断 | |
| KR20230073209A (ko) | 시스템 전력 관리 인터페이스 (spmi) 시스템에서의 확장된 기능 데이터그램 | |
| CN106489137A (zh) | 通用串行总线(usb)通信系统和方法 | |
| US20160210254A1 (en) | Fast link training in embedded systems | |
| JP6066224B2 (ja) | 修正された高速同期式シリアルインターフェース(hsi)プロトコルデバイスを動作させるための方法および電子デバイス | |
| US20140289393A1 (en) | Network apparatus and connection detecting method thereof | |
| US12468655B2 (en) | Configurable bus park cycle period | |
| US9860741B2 (en) | Environmental configuration for improving wireless communication performance | |
| CN117055813A (zh) | 针对存储器元件的分叉存储器管理 | |
| CN103427261A (zh) | 储存卡转接装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
Patent event date: 20160530 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PG1501 | Laying open of application | ||
| PC1203 | Withdrawal of no request for examination | ||
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |