KR20160015731A - Light emitting diode and method of fabricating the same - Google Patents

Light emitting diode and method of fabricating the same Download PDF

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Publication number
KR20160015731A
KR20160015731A KR1020140098364A KR20140098364A KR20160015731A KR 20160015731 A KR20160015731 A KR 20160015731A KR 1020140098364 A KR1020140098364 A KR 1020140098364A KR 20140098364 A KR20140098364 A KR 20140098364A KR 20160015731 A KR20160015731 A KR 20160015731A
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South Korea
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layer
semiconductor layer
substrate
light emitting
bragg reflector
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KR1020140098364A
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Korean (ko)
Inventor
이섬근
양명학
김경완
윤여진
이진웅
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서울바이오시스 주식회사
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Priority to KR1020140098364A priority Critical patent/KR20160015731A/en
Publication of KR20160015731A publication Critical patent/KR20160015731A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2011—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline insulating material, e.g. sapphire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The present invention relates to a light emitting diode having a buffer layer including a distributed Bragg reflector and a manufacturing method thereof. A light emitting diode according to the present invention includes a substrate; A buffer layer disposed on the substrate; And a second conductivity type semiconductor layer and a second conductivity type semiconductor layer which are located on the buffer layer and are spaced apart from each other and which are located on one region of the first conductivity type semiconductor layer, A plurality of light emitting cells including an active layer disposed between the light emitting cells; An insulating layer covering an exposed region of the buffer layer between the light emitting cells spaced apart from each other; And a second conductive type semiconductor layer disposed on the insulating layer and electrically connecting adjacent light emitting cells, wherein the first conductive type semiconductor layer, the active layer, and the second conductive type semiconductor layer are a gallium nitride based semiconductor layer, and the buffer layer is a distributed Bragg reflector And the distributed Bragg reflector comprises a SiO 2 layer AlN layers are stacked alternately, and an AlN layer is disposed at the top of the distributed Bragg reflector.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode

The present invention relates to a light emitting diode and a method of manufacturing the same. More particularly, the present invention relates to a light emitting diode having a buffer layer including a distributed Bragg reflector and a method of manufacturing the same.

Generally, nitrides of Group III elements such as gallium nitride (GaN) and aluminum nitride (AlN) have excellent thermal stability and have a direct bandgap energy band structure. Therefore, recently, It is attracting much attention as a material. In particular, blue and green light emitting devices using indium gallium nitride (InGaN) are utilized in various applications such as large-scale color flat panel displays, traffic lights, indoor lighting, high density light sources, high resolution output systems and optical communication.

The nitride based compound semiconductor is grown on a different substrate such as sapphire or silicon carbide. The sapphire substrate is chemically durable, hard and transparent, but sapphire and gallium nitride crystals have large lattice constants and generate strong tensile stress in the gallium nitride layer grown on the sapphire substrate. Such a tensile stress causes a high-density crystal defect (e.g., dislocation) in the gallium nitride layer, and the dislocation is transferred to the active layer region of the multiple quantum well structure to lower the luminous efficiency, . In order to solve this problem, the prior art has devised a method of improving the quality of the epitaxial crystal by forming a buffer layer containing a nitride based compound semiconductor on a sapphire substrate. However, although the prior art can reduce the potential of the epilayer as the buffer layer is thicker, as the thickness of the entire epilayer becomes thicker, the time and cost increase in dividing the epilayer grown on the wafer into individual elements . Therefore, there is a process difficulty in manufacturing a serial or parallel light emitting diode array capable of driving at a high voltage. Therefore, there is a demand for a light emitting diode capable of outputting light with high output and high efficiency under a high voltage AC power source by forming a plurality of light emitting cells on a substrate and connecting them in series and / or parallelly while having a thickness thinner than that of the buffer layer of the prior art .

Also, by using a patterned sapphire substrate, light traveling from the active region to the substrate side can be scattered to improve light extraction efficiency of the light emitting diode. However, the patterned sapphire substrate not only has the problem of the sapphire substrate described above, but also has a problem in that the quality of the crystal of the epi layer is lowered compared to a case of a flat sapphire substrate on the patterned sapphire substrate .

On the other hand, in the vertical type light emitting diode, since the lower semiconductor layer and the upper semiconductor layer are formed in different conductivity types and electrodes connected to the upper and lower semiconductor layers are required, a process of separating the growth substrate from the semiconductor layer is essential In the case of a flip chip type light emitting diode, the heat emission efficiency and the light extraction efficiency of the light emitting diode can be improved by separating the growth substrate. Generally, laser lift-off, chemical lift-off, and stress lift-off processes can be performed to separate the growth substrate and the epi layer. However, since physical and / or chemical impact is applied to the epi layer during the growth substrate removal process, There is a problem that defects such as cracks are generated in the epi layer.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a light emitting diode capable of outputting light with high output and high efficiency under a high voltage AC power source by connecting a plurality of light emitting cells in series and / or in parallel with a relatively thin thickness .

Another object of the present invention is to provide a light emitting diode having improved light extraction efficiency and high quality epitaxial crystal.

A further object of the present invention is to provide a light emitting diode in which damage to an epi layer is prevented at the time of removing a growth substrate.

Another object of the present invention is to provide a light emitting diode manufacturing method capable of manufacturing a light emitting diode capable of solving the above problems.

A light emitting diode according to an embodiment of the present invention includes a substrate; A buffer layer disposed on the substrate; And a second conductivity type semiconductor layer disposed on the buffer layer, the first conductivity type semiconductor layer and the second conductivity type semiconductor layer being located on one region of the first conductivity type semiconductor layer, A plurality of light emitting cells including an active layer disposed between the conductive semiconductor layers; An insulating layer covering an exposed region of the buffer layer between the light emitting cells spaced apart from each other; And a plurality of wirings arranged on the insulating layer and electrically connecting neighboring light emitting cells, wherein the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer are gallium nitride based semiconductor layers, Comprises a distributed Bragg reflector, wherein the distributed Bragg reflector comprises a SiO 2 layer AlN layers are stacked alternately, and an AlN layer may be disposed on the top of the distributed Bragg reflector.

Furthermore, the substrate may be one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate.

The substrate may be a patterned sapphire substrate.

And an undoped semiconductor layer disposed between the substrate and the buffer layer, wherein the undoped semiconductor layer may be a gallium nitride based semiconductor layer.

According to another aspect of the present invention, there is provided a light emitting diode including: a support substrate; A second nitride semiconductor layer disposed on the supporting substrate, a first nitride semiconductor layer, and an active layer disposed between the first nitride semiconductor layer and the second nitride semiconductor layer; A buffer layer disposed on the first nitride semiconductor layer and including a part of the open region for opening a part of the first nitride semiconductor layer; And an upper electrode electrically connected to the first nitride semiconductor layer through the open region, wherein the buffer layer includes a distributed Bragg reflector, wherein the distributed Bragg reflector comprises an AlN layer and an SiO 2 layer alternately stacked Structure.

In addition, an AlN layer may be disposed at the lowermost part of the distributed Bragg reflector to be in contact with the first conductive type semiconductor layer, and the first conductive type semiconductor layer may be a gallium nitride type semiconductor layer.

A method of fabricating a light emitting diode according to an embodiment of the present invention includes: preparing a growth substrate; Forming a buffer layer on the growth substrate; A first conductive semiconductor layer, a second conductive semiconductor layer, and a second conductive semiconductor layer, the first conductive semiconductor layer and the second conductive semiconductor layer being spaced apart from each other on the buffer layer, Forming a plurality of light emitting cells including an active layer disposed between the first and second semiconductor layers; Forming an insulating layer covering an exposed region of the buffer layer between the light emitting cells spaced apart from each other; And forming wirings disposed on the insulating layer and electrically connecting adjacent light emitting cells, wherein the buffer layer comprises a distributed Bragg reflector, the distributed Bragg reflector comprises a SiO 2 layer and AlN layers are stacked alternately, and the AlN layer is disposed at the top of the distributed Bragg reflector.

Further, the AlN layer disposed on the uppermost portion of the distributed Bragg reflector and the first conductive type semiconductor layer are in contact with each other, and the first conductive type semiconductor layer may be a gallium nitride type semiconductor layer.

The growth substrate may be a patterned sapphire substrate.

The undoped semiconductor layer may further include an undoped semiconductor layer disposed between the growth substrate and the buffer layer, wherein the undoped semiconductor layer may be a gallium nitride based semiconductor layer.

In some embodiments, the distributed Bragg reflector may be fabricated using any suitable technique, such as molecular beam epitaxy, E-beam evaporation, ion beam assisted deposition, reactive plasma deposition, And may be formed through a sputtering process.

The growth substrate may be one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate.

A method of fabricating a light emitting diode according to another embodiment of the present invention includes: preparing a growth substrate; Forming a buffer layer on the growth substrate; Forming a first conductive semiconductor layer, a second conductive semiconductor layer, the first conductive semiconductor layer, and a second conductive semiconductor layer on the buffer layer; Forming a supporting substrate on the second conductive type semiconductor layer; And removing the growth substrate, wherein the buffer layer includes a distributed Bragg reflector, wherein the distributed Bragg reflector has a structure in which an AlN layer and an SiO 2 layer are alternately laminated, and at the lowermost portion of the distributed Bragg reflector, an AlN layer And the first conductivity type semiconductor layer may be a gallium nitride based semiconductor layer.

Further, the distributed Bragg reflector may be fabricated by a method such as Molecular Beam Epitaxy, E-beam evaporation, Ion-Beam Assisted Deposition, Reactive Plasma Deposition or Sputtering As shown in FIG.

The growth substrate may be one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate.

The light emitting diode according to the present invention can include a nitride semiconductor layer of high quality with few crystal defects and improve the light extraction efficiency through the buffer layer including the distributed Bragg reflector. In addition, the light emitting diode can prevent the epilayer from being damaged even when the growth substrate is separated. Since the light emitting diode can reduce the thickness of the epi layer, it is possible to manufacture a light emitting diode capable of outputting high output and high efficiency light under a high voltage AC power source by connecting a plurality of light emitting cells in series and / or in parallel. In addition, the nitride-based semiconductor layer of high quality can be grown through various growth substrates without limitation of the substrate type.

1 is a cross-sectional view illustrating a light emitting diode according to an exemplary embodiment of the present invention.
2 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention.
3 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention.
4 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so that those skilled in the art can sufficiently convey the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, etc. of components may be exaggerated for convenience. It is also to be understood that when an element is referred to as being "above" or "above" another element, But also includes the case where there are other components in between. Like reference numerals designate like elements throughout the specification.

1 is a cross-sectional view illustrating a light emitting diode according to an exemplary embodiment of the present invention.

1 (a) is a cross-sectional view showing a path L in which light emitted from the active layer is reflected by a buffer layer, and FIG. 2 (b) is a cross-sectional view showing a path L through which the light passes through the buffer layer .

Referring to FIG. 1, a buffer layer 11 and an epilayer 20 are disposed on a substrate 10. The substrate 10 is not limited as long as it can grow the epitaxial layer 20 and may include, for example, a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate. In particular, in the present embodiment, the substrate 10 may be a sapphire substrate, but is not limited thereto.

A buffer layer 11 may be formed on the substrate 10. The buffer layer 11 may include a distributed Bragg reflector (DBR), and the distributed Bragg reflector may be formed by laminating layers of materials having different refractive indices. In the present embodiment, the buffer layer 11 may include a distributed Bragg reflector having a structure in which the SiO 2 layer 11a and the AlN layer 11b are alternately stacked. The AlN layer 11b included in the buffer layer 11 is disposed at the top of the buffer layer 11 and can contact the first conductivity type semiconductor layer 13 on the buffer layer 11. [ Since the AlN layer 11b and the gallium nitride are similar in lattice constant and thermal expansion coefficient to each other and the uppermost material layer of the buffer layer 11 is AlN 11b, ) Can be formed with a high-quality crystal structure.

The buffer layer 11 may be formed by a method such as molecular beam epitaxy, E-beam evaporation, ion beam assisted deposition, reactive plasma deposition, and sputtering As shown in FIG.

Since the distributed Bragg reflector included in the buffer layer 11 can be formed on various types of substrates regardless of the type of the substrate, the substrate 10 in the present embodiment is not limited to the type, and may be applied as a growth substrate for the epitaxial layer . Thus, in this embodiment, a silicon substrate which is relatively inexpensive but whose use has been limited due to high visible light absorption, can also be used as a growth substrate. Since the silicon substrate can be easily wet or dry-etched compared to the sapphire substrate, the growth substrate can be effectively removed while preventing damage to the epi layer during the growth substrate removal process.

The epitaxial layer 20 is disposed on the uppermost AlN layer 11b of the buffer layer 11. [ The epitaxial layer 20 includes a first conductivity type semiconductor layer 13, an active layer 15, and a second conductivity type semiconductor layer 17. The first conductivity type semiconductor layer 13 may include an n-type gallium nitride based semiconductor layer and the second conductivity type semiconductor layer 17 may include a p-type gallium nitride based semiconductor layer. In addition, the active layer 15 may be a single quantum well structure or a multiple quantum well structure, and may include a well layer and a barrier layer. Further, the well layer may be selected from its compositional elements depending on the wavelength of the required light, and may include, for example, InGaN.

The first conductive semiconductor layer 13 and the second conductive semiconductor layer 17 may be semiconductor layers having different conductivity types, and the semiconductor layers 13, 15, and 17 may be formed by metal organic chemical vapor deposition (MOCVD). Metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), and the like.

Hereinafter, a description of a well-known technique concerning semiconductor layers will be omitted.

The buffer layer 11 including the distributed Bragg reflector can be designed to transmit or reflect light of a specific wavelength band so that the light emitted from the active layer 15 Or transmit the light emitted from the active layer 15, as in the path L of the embodiment of FIG. 1 (b). Further, in this embodiment, crystal defects of the epi-layer 20 can be reduced without growing the epitaxial layer 20 thickly through the buffer layer 11 including the distributed Bragg reflector. Therefore, since the epi layer 20 according to the present invention has a relatively thin thickness compared to the prior art, it is easy to fabricate a light emitting diode array manufactured by connecting a plurality of light emitting cells in series and / or in parallel.

2 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention. The embodiment of FIG. 2 is the same as the embodiment of FIG. 1 except that the epi layer is formed of a plurality of light emitting cells and connected through wiring. Therefore, description of the same components will be omitted.

2 (a) is a cross-sectional view for explaining a light emitting diode in which a plurality of light emitting cells are connected through wiring, and FIG. 2 (b) Fig. 5 is a cross-sectional view for explaining a light-emitting diode including the light-

2, the buffer layer 11 may be disposed on the substrate 10, and the buffer layer 11 may have a structure in which the SiO 2 layer 11a and the AlN layer 11b are repeatedly stacked as described above . The epi layer 20 may be formed of a plurality of light emitting cells through etching, and a part of the buffer layer 11 may be exposed between the light emitting cells. Each of the plurality of light emitting cells includes a first conductivity type semiconductor layer 13, a second conductivity type semiconductor layer 17 disposed on one region of the first conductivity type semiconductor layer 13, 13 and the active layer 15 disposed between the second conductivity type semiconductor layer 17.

A part of the exposed buffer layer 11 may be the SiO 2 layer 11a or the AlN layer 11b. The light emitting cells formed through the epi layer 20 are covered with the insulating layer 23 and the wirings 25 are electrically connected to each other through openings that open a part of the first conductivity type semiconductor layer 13 and a part of the electrode layer 21. [ The first conductivity type semiconductor layer 13 and the electrode layer 21 on the second conductivity type semiconductor 17 may be electrically connected. That is, the wiring 25 may form a serial array of light emitting cells by electrically connecting the first conductivity type semiconductor layers 13 and the second conductivity type semiconductor layers 17 of adjacent light emitting cells. A plurality of such arrays may be formed, and a plurality of arrays may be connected in antiparallel to each other and connected to an AC power source to be driven. Further, a bridge rectifier (not shown) connected to the serial array of the light emitting cells may be formed, and the light emitting cells may be driven by the bridge rectifier under the AC power. The bridge rectifier may be formed by connecting light emitting cells having the same structure as the light emitting cells by using wirings.

The insulating layer 23 may be formed of, for example, a silicon oxide film or a silicon nitride film using plasma enhanced chemical vapor deposition (CVD). In this case, the insulating layer 23 may be deposited in a temperature range of 200 to 300 ° C, and may be formed to a thickness of 4500 Å to 1 탆.

The wirings 25 may be formed using a plating technique or a general electron beam deposition, a chemical vapor deposition, or a physical vapor deposition technique. On the other hand, the wirings 25 may be formed of a conductive material, for example, a doped semiconductor material such as polycrystalline silicon, or a metal. In particular, the interconnects 25 may be formed in a multi-layer structure, for example, a lower layer containing Cr or Ti, an upper layer containing Cr or Ti, or an intermediate layer containing Au, Au / Ni or Au / And may be disposed between the lower layer and the upper layer. The wirings 25 may be heat-treated in a temperature range of 300 to 500 ° C to improve the adhesion with the insulating layer 23.

In the present invention, since the buffer layer 11 has an insulating property, the etching of the epi layer 20 for forming the light emitting structure can be effectively performed. In addition, since the epi layer 20 of the present invention can have a thin thickness as described above, it is easy to fabricate a light emitting diode array manufactured by connecting a plurality of light emitting cells in series and / or in parallel.

There is a problem that the thickness of the distributed Bragg reflector must be increased in order for the buffer layer 11 including the distributed Bragg reflector to reflect light for a wide incident angle. The substrate 10 may be a patterned sapphire substrate (PSS) in order to enhance light extraction efficiency by diffusing or totally reflecting light that reaches the substrate 10 through the buffer layer 11. In this case, crystal defects of the epi layer 20 may be a problem. Referring back to FIG. 2 (b), an undoped semiconductor layer 12 may be disposed between the substrate 10 and the buffer layer 11 to prevent crystal defects in the epi layer 20 . The undoped semiconductor layer 12 may be a gallium nitride semiconductor layer which is not doped with n-type or p-type and may be formed in the same process as the semiconductor layers 13, 15, and 17 forming the epi layer 20 . In this embodiment, even when the substrate 10 is a patterned sapphire substrate, the undoped semiconductor layer 12 is formed on the substrate 10, and the buffer layer 11 is formed thereon, so that the epitaxial layer 20 Can be prevented from occurring.

3 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention. The present embodiment relates to a flip chip type light emitting diode to which the buffer layer of the present invention is applied.

The embodiment of Fig. 3 is the same as the embodiment of Fig. 1, except that it is a flip chip type light emitting diode. Therefore, description of the same components will be omitted.

Referring to FIG. 3, the light emitting diode includes a substrate 10, a buffer layer 11 disposed on the substrate 10, and an epi layer 20 disposed on the buffer layer 11. In addition, a reflective metal layer 140 and a barrier metal layer 150 are formed on the epi layer 20. The reflective metal layer 140 may include at least one of Ni, Pt, Pd, Rh, W, Ti, Al, Ag and Au and may be formed of multiple layers such as Ni / Ag / have. The barrier metal layer 150 may include at least one of Ni, Cr, Ti, Pt, Pd, Rh, and W as a layer for preventing mutual diffusion of the reflective metal layer 140 and other materials. .

The barrier metal layer 150 may be in ohmic contact with one of the bump electrodes 190 in a portion of the open area and the other area except the open area may be covered with the first insulating layer 160. A contact layer 170 is disposed on the first insulating layer 160 and may extend to the side of the light emitting diode and may be electrically connected to the first conductive semiconductor layer 13 although not shown. The contact layer 170 may be in ohmic contact with the other of the bump electrodes 190. The second insulating layer 180 may cover the entire surface of the light emitting diode except for a region where each of the bump electrodes 190 is in ohmic contact with the barrier metal layer 150 and the contact layer 170. [

The flip chip type light emitting diode according to the present embodiment can form a buffer layer 11 on the substrate 10 to form a high quality epi layer 20 as well as to form the epi layer 20 The substrate 10 can be easily removed without damaging the substrate 10.

4 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention. This embodiment relates to a vertical type light emitting diode including the buffer layer of the present invention.

The embodiment of Fig. 4 is the same as the embodiment of Fig. 1 except that it is a vertical type light emitting diode. Therefore, redundant description of the same constituent elements is omitted. Referring to FIG. 4, the light emitting diode includes a bonding metal layer 210, a barrier metal layer 220, and a reflective metal layer 230 on a substrate 10. The buffer layer 11 includes an epi layer 20 on the reflective metal layer 230 and an upper electrode 260 in ohmic contact with the second conductive semiconductor layer 17 through an open region.

In this embodiment, the substrate 10 may be a support substrate separated from a growth substrate for growing compound semiconductor layers and attached to the already grown compound semiconductor layers. The substrate 10 may be a conductive substrate, such as a metal substrate or a semiconductor substrate.

The reflective metal layer 230 may be in ohmic contact with the epi layer 20. The reflective metal layer 230 may comprise at least one of Ni, Pt, Pd, Rh, W, Ti, Al, Ag and Au and may be formed of multiple layers such as Ni / Ag / have. The barrier metal layer 220 may include at least one of Ni, Cr, Ti, Pt, Pd, Rh, and W as a layer for preventing mutual diffusion of the reflective metal layer 230 and other materials. .

The substrate 10 may be bonded through the barrier metal layer 220 and the bonding metal layer 210. The bonding metal layer 210 may be formed, for example, by Au-Sn using eutectic bonding.

The upper electrode 260 may be in ohmic contact with the second conductive type semiconductor layer 17 through a part of the open region in the buffer layer 11 so that current can be injected into the epi layer 20. [

In this embodiment, since the light emitting diode is a vertical type light emitting diode, separation of the growth substrate is essential. Accordingly, when the buffer layer 11 of the present invention is formed, separation between the growth substrate (not shown) and the epi-layer 20 is facilitated, and damage to the epi-layer 20 can be prevented at the time of separation. Therefore, the vertical light emitting diode according to the present invention may include an epi layer 20 having a high-quality crystal structure.

It will be apparent to those skilled in the art that various modifications, substitutions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. will be. Therefore, the embodiments disclosed in the present invention and the accompanying drawings are intended to illustrate and not to limit the technical spirit of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments and the accompanying drawings . The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

10: substrate
11: Epic
11a: SiO 2 layer
11b: AlN layer
13: First conductive type semiconductor layer
15:
17: second conductive type semiconductor layer
20: Epi layer
21: electrode layer
23: Insulating layer
25: Wiring
140, 230: reflective metal layer
150, 220: barrier metal layer
160: first insulating layer
170: contact layer
180: second insulating layer
190: Bump electrode layer
210: Bonding metal layer
260: upper electrode

Claims (15)

Board;
A buffer layer disposed on the substrate; And
A first conductive semiconductor layer, a second conductive semiconductor layer, and a second conductive semiconductor layer, the first conductive semiconductor layer and the second conductive semiconductor layer being spaced apart from each other on the buffer layer, A plurality of light emitting cells including an active layer disposed between the first and second semiconductor layers;
An insulating layer covering an exposed region of the buffer layer between the light emitting cells spaced apart from each other; And
And wires that are disposed on the insulating layer and electrically connect the adjacent light emitting cells,
Wherein the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer are gallium nitride-
Wherein the buffer layer comprises a distributed Bragg reflector, the distributed Bragg reflector comprises a SiO 2 layer and AlN layers are alternately stacked,
And an AlN layer is disposed on the top of the distributed Bragg reflector. The method according to claim 1,
Wherein the substrate is one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate. The method according to claim 1,
Wherein the substrate is a patterned sapphire substrate. The method of claim 3,
Further comprising an undoped semiconductor layer disposed between the substrate and the buffer layer,
And the undoped semiconductor layer is a gallium nitride-based semiconductor layer. A support substrate;
A second nitride semiconductor layer disposed on the supporting substrate, a first nitride semiconductor layer, and an active layer disposed between the first nitride semiconductor layer and the second nitride semiconductor layer;
A buffer layer disposed on the first nitride semiconductor layer and including a part of the open region for opening a part of the first nitride semiconductor layer; And
And an upper electrode electrically connected to the first nitride semiconductor layer through the partial open region,
Wherein the buffer layer includes a distributed Bragg reflector, and the distributed Bragg reflector has a structure in which an AlN layer and an SiO 2 layer are alternately stacked. The method of claim 5,
Wherein an AlN layer is disposed on the lowermost portion of the distributed Bragg reflector so as to be in contact with the first conductivity type semiconductor layer and the first conductivity type semiconductor layer is a gallium nitride type semiconductor layer. Preparing a growth substrate;
Forming a buffer layer on the growth substrate;
A first conductive semiconductor layer, a second conductive semiconductor layer, and a second conductive semiconductor layer, the first conductive semiconductor layer and the second conductive semiconductor layer being spaced apart from each other on the buffer layer, Forming a plurality of light emitting cells including an active layer disposed between the first and second semiconductor layers;
Forming an insulating layer covering an exposed region of the buffer layer between the light emitting cells spaced apart from each other; And
And forming wirings disposed on the insulating layer and electrically connecting the adjacent light emitting cells,
Wherein the buffer layer comprises a distributed Bragg reflector, the distributed Bragg reflector comprises a SiO 2 layer and AlN layers are alternately stacked,
And a top portion of the distributed Bragg reflector is disposed with an AlN layer. The method of claim 7,
Wherein the AlN layer disposed on the uppermost portion of the distributed Bragg reflector and the first conductive type semiconductor layer are in contact with each other and the first conductive type semiconductor layer is a gallium nitride type semiconductor layer. The method of claim 7,
Wherein the growth substrate is a patterned sapphire substrate. The method of claim 9,
Further comprising an undoped semiconductor layer disposed between the growth substrate and the buffer layer,
And the undoped semiconductor layer is a gallium nitride-based semiconductor layer. The method of claim 7,
The distributed Bragg reflector may be fabricated through molecular beam epitaxy, E-beam evaporation, ion beam assisted deposition, reactive plasma deposition, or sputtering Wherein the light emitting diode is formed on the substrate. The method of claim 7,
Wherein the growth substrate is one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate. Preparing a growth substrate;
Forming a buffer layer on the growth substrate;
Forming a first conductive semiconductor layer, a second conductive semiconductor layer, the first conductive semiconductor layer, and a second conductive semiconductor layer on the buffer layer;
Forming a supporting substrate on the second conductive type semiconductor layer; And
Removing the growth substrate
Wherein the buffer layer comprises a distributed Bragg reflector, the distributed Bragg reflector has a structure in which an AlN layer and an SiO 2 layer are alternately laminated,
Wherein an AlN layer is disposed on the lowermost portion of the distributed Bragg reflector so as to be in contact with the first conductive type semiconductor layer and the first conductive type semiconductor layer is a gallium nitride based semiconductor layer. 14. The method of claim 13,
The distributed Bragg reflector may be fabricated through molecular beam epitaxy, E-beam evaporation, ion beam assisted deposition, reactive plasma deposition, or sputtering Wherein the light emitting diode is formed on the substrate. 14. The method of claim 13,
Wherein the growth substrate is one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, a spinel substrate, and a nitride substrate.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111261760A (en) * 2018-11-30 2020-06-09 首尔伟傲世有限公司 Light emitting element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111261760A (en) * 2018-11-30 2020-06-09 首尔伟傲世有限公司 Light emitting element

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