CN111261760A - Light emitting element - Google Patents
Light emitting element Download PDFInfo
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- CN111261760A CN111261760A CN201910694186.8A CN201910694186A CN111261760A CN 111261760 A CN111261760 A CN 111261760A CN 201910694186 A CN201910694186 A CN 201910694186A CN 111261760 A CN111261760 A CN 111261760A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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- Microelectronics & Electronic Packaging (AREA)
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- General Physics & Mathematics (AREA)
- Led Devices (AREA)
Abstract
A light emitting element is provided. The light emitting element includes: a substrate; a plurality of protrusion patterns disposed on the substrate and including a first layer containing a substance identical to a substance constituting the substrate and a second layer containing a substance different from the substance constituting the substrate on the first layer; and a light emitting part disposed in the first region of the substrate, wherein the height of the protruding pattern disposed in the first region is different from the height of the protruding pattern disposed in the second region, and the second region includes a region between the first region and the outer contour of the substrate.
Description
Technical Field
The present invention relates to a light emitting element, and more particularly, to a light emitting element including a gallium nitride semiconductor layer.
Background
Light emitting diodes are inorganic light sources and are widely used in a variety of fields such as display devices, vehicle lamps, and general lighting. Light emitting diodes have advantages of long life, low power consumption, fast response speed, etc., and are rapidly replacing conventional light sources.
Disclosure of Invention
The present invention is directed to a light emitting device with improved light efficiency and light extraction.
The technical problems to be solved by the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned can be clearly understood by those skilled in the art from the following description.
A light-emitting element of an embodiment of the present invention for solving the problems includes: a substrate; a plurality of protrusion patterns disposed on the substrate and including a first layer containing a substance identical to a substance constituting the substrate and a second layer containing a substance different from the substance constituting the substrate on the first layer; and a light emitting section disposed in a first region of the substrate, wherein a height of the protruding pattern disposed in the first region is different from a height of the protruding pattern disposed in a second region including a region between the first region and an outer contour of the substrate.
According to an embodiment, the second layer of the protrusion patterns disposed in the first region may have a different height from the second layer of the protrusion patterns disposed in the second region.
According to the embodiment, the light emitting element may further include an insulating film extending to the second region of the substrate.
According to the embodiment, the protrusion pattern disposed in the second region may be in contact with the insulating film.
According to an embodiment, the insulating film may include a Distributed Bragg Reflector (Distributed Bragg Reflector) in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately stacked.
According to an embodiment, the second layer may include silicon oxide, the insulating film in contact with the second layer may include a first silicon oxide layer, and a uniform silicon oxide layer may be formed on the first layer of the protrusion pattern disposed in the second region.
According to an embodiment, the first silicon oxide layer of the insulating film may have a first thickness on the substrate, and a second thickness obtained by subtracting the first thickness from the uniform silicon oxide layer may be a height of the second layer of the protrusion pattern in the second region.
According to an embodiment, a height of the second layer of the protrusion patterns disposed in the first region may be smaller than a height of the second layer of the protrusion patterns disposed in the second region.
According to an embodiment, each of the protrusion patterns may have a width gradually narrowing as it goes away from the substrate.
According to an embodiment, each of the protrusion patterns may have a circular cross-section and may be tapered toward an apex, and each of the protrusion patterns may have a sidewall having a curved surface.
According to an embodiment, the light emitting portion may include a first cavity (void) formed by connecting the first layer to an interface between the first layer and the second layer.
According to the embodiment, the light emitting portion may further include a second cavity formed between the cavity and the substrate and having a size smaller than that of the first cavity.
According to an embodiment, the refractive index of the second layer may be greater than the refractive index of the first layer.
According to an embodiment, the second layer of each of the protrusion patterns may include silicon oxide formed by a Plasma Enhanced Chemical Vapor Deposition (pecvd) process.
A light emitting element according to an embodiment of the present invention includes: a substrate; a plurality of protrusion patterns disposed on the substrate and including a first layer containing a substance identical to a substance constituting the substrate and a second layer containing a substance different from the substance constituting the substrate on the first layer; a first light emitting unit disposed in a first region of the substrate; and a second light emitting unit disposed in a second region of the substrate, wherein the respective heights of the protrusion patterns disposed in the first region and the second region are different from the height of the protrusion pattern disposed in a third region, and the third region includes: a region between the first region and the second region; and a region between each of the first region and the second region and an outline of the substrate.
According to an embodiment, the second layer of the protrusion patterns disposed in the first region and the second region may have a different height from the second layer of the protrusion patterns disposed in the third region.
According to the embodiment, the light emitting element may further include an insulating film extending to a third region of the substrate on the first light emitting unit and the second light emitting unit.
According to the embodiment, the protrusion pattern disposed in the third region may be in contact with the insulating film.
According to an embodiment, the insulating film may include a distributed bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately stacked.
Other embodiments are also specifically described in the above description and the accompanying drawings.
According to the light-emitting element of the embodiment of the invention, the plurality of convex patterns having the first layer and the second layer having different refractive indexes are formed on the substrate, so that the light extraction efficiency of the light-emitting element can be increased. In addition, the second layer comprises SiO2And SiO of distributed Bragg reflector at the edge of the substrate2The bonding reliability is improved, and the peeling of the distributed Bragg reflector in the subsequent process can be prevented.
Drawings
Fig. 1a is a top view for explaining a light-emitting element according to an embodiment of the present invention.
FIG. 1b is a cross-sectional view of the light emitting element of FIG. 1a taken along A-A'.
Fig. 1c is an enlarged view of a portion B of fig. 1B.
Fig. 1d is a plan view for explaining the first region of the substrate of fig. 1 a.
Fig. 1e is an enlarged view of a portion C of fig. 1C.
Fig. 2a is a top view for explaining a light-emitting element according to another embodiment of the present invention.
Fig. 2b is a cross-sectional view of the light emitting element of fig. 2a taken along a-a'.
Fig. 3a is a top view for explaining a light emitting element according to still another embodiment of the present invention.
Fig. 3b is a cross-sectional view of the light emitting element of fig. 3a taken along a-a'.
Fig. 4 to 9 are sectional views for explaining a method of manufacturing a light emitting element according to an embodiment of the present invention.
Description of the reference numerals
100: substrate
PRT1, PRT2, PRT: embossed pattern
LY1-1, LY2-1, LY 1: first layer
LY1-2, LY2-2, LY 2: second layer
110: semiconductor layer of first conductivity type
120: active layer
130: semiconductor layer of second conductivity type
140: ohmic layer
MS: table top structure
Detailed Description
In order to fully understand the structure and effects of the present invention, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and various modifications can be made while implementing various aspects.
In addition, terms used in the embodiments of the present invention may be construed as commonly understood by one having ordinary knowledge in the art, as long as they are not defined.
Hereinafter, a light-emitting element according to an embodiment of the present invention will be described in detail with reference to the drawings.
Fig. 1a is a plan view illustrating a light emitting device according to an embodiment of the present invention, fig. 1B is a cross-sectional view of the light emitting device of fig. 1a taken along a-a', fig. 1C is an enlarged view of a portion B of fig. 1B, fig. 1d is a plan view illustrating a first region of a substrate of fig. 1a, and fig. 1e is an enlarged view of a portion C of fig. 1C.
Referring to fig. 1a to 1e, the light emitting device may include a substrate 100 and a light emitting portion disposed on one surface 102 of the substrate 100.
As the substrate 100, a semiconductor single crystal, for example, a growth substrate for nitride single crystal growth can be used. Sapphire (Al) may be used as the substrate 1002O3) A substrate. However, the material of the substrate 100 is not limited thereto, and various materials such as SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, Ga may be used2O3And the like.
According to an embodiment, the substrate 100 is formed by patterning, and the protrusion patterns PRT1 and PRT2 may be formed on one surface 102 of the substrate 100. The protrusion patterns PRT1, PRT2 may respectively include first layers LY1-1, LY2-1 and second layers LY1-2, LY2-2 sequentially disposed on one side 102 of the substrate 100.
The first layers LY1-1, LY2-1 may be formed as an undivided body with the substrate 100. The first layer LY1-1, LY2-1 may comprise the same species as the substrate 100. In this embodiment, it is possible that the substrate 100 includes sapphire, and the first layers LY1-1 and LY2-1 also include sapphire.
The second layer LY1-2, LY2-2 may be disposed on the first layer LY1-1, LY 2-1. The second layer LY1-2, LY2-2 may comprise a different species than the first layer LY1-1, LY 2-1. The second layers LY1-2, LY2-2 may have a different index of refraction than the first layers LY1-1, LY 2-1. According to an embodiment, the refractive index of the first layers LY1-1, LY2-1 may be greater than the refractive index of the second layers LY1-2, LY 2-2. The second layer LY1-2, LY2-2 may comprise a substance having a refractive index lower than that of the first layer LY1-1, LY2-1, for example an insulating substance having a refractive index of 1.0 to 1.7. For example, the second layers LY1-2, LY2-2 may comprise SiO2、SiOxNyAnd SiNxOne kind of (1). According to an embodiment, the second layers LY1-2, LY2-2 may comprise SiO formed by a plasma enhanced Chemical Vapor Deposition (PEVD) process2. SiO formed by PEVD process2May be greater than the SiO formed by an electron beam (e-beam) process2The crystal density of (a).
For example, the first layer LY1-1, LY2-1 contains sapphireThe second layer LY1-2, LY2-2 comprises SiO2In the case of (1), the first layers LY1-1, LY2-1 have a refractive index of 1.76, and the second layers LY1-2, LY2-2 have a refractive index of 1.46, and thus may be smaller than the refractive index of the substrate 100.
The projecting patterns PRT1 and PRT2 are each formed so as to project from the one surface 102 of the substrate 100. The width of the protrusion pattern decreases the farther away from the substrate 100.
According to one embodiment, the protrusion pattern may have a circular cross-section and a curved sidewall, and may be tapered toward a vertex. As an example, the protrusion patterns PRT1, PRT2 may be bullet-shaped (bullet shape).
As described above, in the protrusion patterns PRT1, PRT2, the first layers LY1-1, LY2-1 and the second layers LY1-2, LY2-2 each contain different substances, and the sidewalls of the protrusion patterns PRT1, PRT2 may have a curved surface continuous without a height difference (stepped portion) at the interface between the first layers LY1-1, LY2-1 and the second layers LY1-2, LY 2-2. That is, the differential values (inclination values of the contacts) of the side wall contacts with respect to the protrusion patterns PRT1 and PRT2 can be continuously increased from the apex to the lower side without an inflection point.
As another example, the protrusion patterns PRT1, PRT2 may have a conical shape. The conical shaped protrusion patterns PRT1, PRT2 may have a triangular structure in cross-sectional view.
The protrusion patterns PRT1, PRT2 may be regularly spaced from each other. In contrast, the protrusion patterns PRT1, PRT2 may be randomly spaced. According to an embodiment, one side 102 of the substrate 100 may be exposed between the spaced apart protrusion patterns PRT1, PRT 2.
According to an embodiment, in the case where the protrusion patterns PRT1, PRT2 are each formed of one substance of sapphire, there is a limitation in realizing the height of the protrusion patterns when only sapphire is etched to form the protrusion patterns. Accordingly, the height of each of the protrusion patterns PRT1, PRT2 composed of the first and second layers LY1-1, LY2-1 and LY1-2, LY2-2 may be greater than the height of each of the protrusion patterns PRT1, PRT2 composed of a single layer of sapphire. According to the present embodiment, the protrusion patterns PRT1, PRT2 have a high height, whereby the light extraction efficiency of the light emitting element can be increased. Although the heights of the respective protrusion patterns PRT1 and PRT2 are increased, the shapes of the respective protrusion patterns PRT1 and PRT2 and the intervals between the adjacent protrusion patterns PRT1 and PRT2 are the same as those of the conventional art, and thus the processes can be performed without changing the subsequent epitaxial process.
The substrate 100 may include: a first area AR1 in which a light emitting section is arranged; and a second area AR2 between the first area AR1 and the outline 104 of the substrate 100. For example, the first area AR1 may be the center area of the substrate 100, and the second area AR2 may be the edge area.
According to an embodiment, as shown in fig. 1c, the protrusion patterns PRT1, PRT2 may include a first protrusion pattern PRT1 disposed in the first area AR1 of the substrate 100 and a second protrusion pattern PRT2 disposed in the second area AR 2. It may be that each of the first protrusion patterns PRT1 has a first height HT1(height), and each of the second protrusion patterns PRT2 has a second height HT2 different from the first height HT 1. It may be that the height HT1-1 of the first layers LY1-1, LY2-1 of the respective first protrusion patterns PRT1 is the same as the height HT2-1 of the first layers LY1-1, LY2-1 of the respective second protrusion patterns PRT2, and the height HT1-2 of the second layers LY1-2, LY2-2 of the respective first protrusion patterns PRT1 is different from the height HT2-2 of the second layers LY1-2, LY2-2 of the respective second protrusion patterns PRT 2. As an example, the height HT1-2 of the second layers LY1-2, LY2-2 of the first protrusion pattern PRT1 may be greater than the height HT2-2 of the second layers LY1-2, LY2-2 of the second protrusion pattern PRT 2.
Referring to fig. 1a and 1b, the light emitting part may include a mesa structure MS having a first conductive type semiconductor layer 110, an active layer 120, a second conductive type semiconductor layer 130, and an ohmic layer 140.
According to an embodiment, the first conductive type semiconductor layer 110 may be disposed to cover the first area AR of the substrate 100. The mesa structure MS may expose a portion of the first conductive type semiconductor layer 110. The first conductive type semiconductor layer 110 and the mesa structure MS may each have an inclined side surface through an etching process.
The first conductive type semiconductor layer 110 may be disposed on one surface 102 of the substrate 100. According to an embodiment, the first conductive type semiconductor layer 110 may be disposed to cover the first protrusion pattern PRT1 on the one surface 102 of the substrate 100. For this, the first conductive type semiconductor layer 110 may be epitaxially grown (epitaxialgrowth) from the one surface 102 of the substrate 100 exposed between the first protrusion patterns PRT 1. In this case, the first conductive type semiconductor layer 110 may be grown in an upward direction so as to completely cover the side and upper surfaces of the respective first protrusion patterns PRT 1. According to an embodiment, the first conductive type semiconductor layer 110 may form a plurality of cavities VD1, VD2(voids) at positions corresponding to the sides of the respective protrusion patterns. This will be described later.
The first conductive type semiconductor layer 110 may be a semiconductor layer doped with a first conductive dopant. The first conductive type dopant may be an n-type dopant. The first conductive type dopant may include one of Si, Ge, Se, Te, and C.
According to an embodiment, the first conductive type semiconductor layer 110 may include a nitride-based semiconductor material. For example, the first conductive type semiconductor layer 110 may include InxAlyGa1-x-yN (x is more than or equal to 0 and less than or equal to 1, y is more than or equal to 0 and less than or equal to 1, and x + y is more than or equal to 0 and less than or equal to 1). In one embodiment, the nitride-based semiconductor material of the first conductive type semiconductor layer 110 may include one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The first conductive type semiconductor layer 110 may be formed by growing an n-type dopant containing one of Si, Ge, Sn, Se, and Te using a semiconductor material.
The active layer 120 may be provided on the first conductive type semiconductor layer 110 and may correspond to a light emitting layer. The active layer 120 may be the following layer: a layer that electrons (or holes) injected through the first conductive type semiconductor layer 110 collide with holes (or electrons) injected through the second conductive type semiconductor layer 130 to release light through a band gap difference of an energy band (energy band) based on a formation substance of the active layer 120. The active layer 120 may emit light having at least one peak wavelength of ultraviolet, blue, green, and red.
The active layer 120 may be implemented by a compound semiconductor. For example, the active layer 120 may be implemented by at least one of group iii-group v or group ii-group v compound semiconductors. The active layer 120 may have a quantum well structure, and may have a multiple quantum well structure (multi quantum well) in which quantum well layers and barrier layers are alternately stacked. However, the structure of the active layer 120 is not limited thereto, and may have a quantum wire (quantum wire) structure or a quantum dot (quantum dot) structure.
According to an embodiment, a configurable circuit having InxAlyGa1-x-yN (x is more than or equal to 0 and less than or equal to 1, y is more than or equal to 0 and less than or equal to 1, and x + y is more than or equal to 0 and less than or equal to 1). The barrier layer may be formed of a material having InxAlyGa1-x-yA semiconductor material of the composition formula of N (0. ltoreq. x.ltoreq.1, 0. ltoreq. y.ltoreq.1, 0. ltoreq. x + y. ltoreq.1) and may be provided in a composition ratio different from that of the well layer. Wherein the barrier layer may have a bandgap wider than that of the well layer.
For example, the well layer and the barrier layer may be formed of at least one pair of pairs of AlGaAs/GaAs, InGaAs/GaAs, InGaN/GaN, GaN/AlGaN, AlGaN/AlGaN, InGaN/InGaN, InGaP/InGaP, InGaP/GaP, AlInGaP/InGaP, InP/GaAs. According to an embodiment, the well layer of the active layer 120 may be implemented by InGaN, and the barrier layer may be implemented by an AlGaN-based semiconductor. In addition, the indium composition of the well layer may be larger than that of the barrier layer, and the barrier layer may have no indium composition. In addition, the well layer may not contain aluminum, and the barrier layer may contain aluminum. However, the compositions of the well layer and the barrier layer are not limited thereto.
The second conductive type semiconductor layer 130 may be disposed on the active layer 120. The second conductive type semiconductor layer 130 may be a semiconductor layer having a second conductive type dopant of opposite polarity to the first conductive type dopant. The second conductive type dopant may be a p-type dopant, and the second conductive type dopant may include, for example, one of Mg, Zn, Ca, Sr, and Ba.
According to an embodiment, the second conductive type semiconductor layer 130 may include a nitride-based semiconductor material. The second conductive type semiconductor layer 130 may include InxAlyGa1-x-yN (x is more than or equal to 0 and less than or equal to 1, y is more than or equal to 0 and less than or equal to 1, and x + y is more than or equal to 0 and less than or equal to 1). The nitride-based semiconductor material of the second conductive type semiconductor layer 130 may include one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The second conductive type semiconductor layer 130 may be grown to include Mg,One of Zn, Ca, Sr and Ba is doped with a p-type dopant.
In the present embodiment, the first conductive type semiconductor layer 110 is an n-type semiconductor layer containing an n-type dopant, and the second conductive type semiconductor layer 130 is a p-type semiconductor layer containing a p-type dopant, but the first conductive type semiconductor layer 110 may be a p-type semiconductor layer, and the second conductive type semiconductor layer 130 may be an n-type semiconductor layer.
The ohmic layer 140 may be disposed on the second conductive type semiconductor layer 130. The ohmic layer 140 may be a transparent Oxide (TCO) layer such as ZnO or ito (indium Tin Oxide).
Although not shown, functional layers such as a buffer layer and/or an electron isolation layer may be additionally provided in addition to the substrate 100, the first conductive type semiconductor layer 110, the active layer 120, and the second conductive type semiconductor layer 130. For example, a buffer layer may be provided on the substrate 100 and the first conductive type semiconductor layer 110. The buffer layer may be formed as a single layer or multiple layers. According to an embodiment, the buffer layer may be formed of InxAlyGa1-x-yN (0. ltoreq. x.ltoreq.1, 0. ltoreq. y.ltoreq.1, 0. ltoreq. x + y. ltoreq.1) and may include, for example, at least one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and ZnO. An electron isolation layer may be additionally disposed between the second conductive type semiconductor layer 130 and the active layer 120. The electron isolation layer can reduce the decrease in crystallinity caused by the dopant in the second conductive type semiconductor layer 130 and prevent the dopant in the second conductive type semiconductor layer 130 from diffusing into the active layer 120. The electron isolation layer can block electrons from the active layer 120 from moving to the second conductive type semiconductor layer 130, thereby preventing a current diffusion phenomenon between the electron isolation layer and the second conductive type semiconductor layer 130. According to an embodiment, the electron isolation layer may be formed of a material having InxAlyGa1-x-yN (x is more than or equal to 0 and less than or equal to 1, y is more than or equal to 0 and less than or equal to 1, and x + y is more than or equal to 0 and less than or equal to 1). For example, the electron isolation layer may include at least one of GaN, AlGaN, InGaN, InAlGaN, and AlInN.
As an example, the buffer layer and the electron isolation layer are shown, and at least one of the buffer layer and the electron isolation layer may be omitted. In addition, an additional functional layer other than the buffer layer and the electron isolation layer may be further added to the light-emitting element.
The light emitting element may further include: a first conductive pattern CP1 electrically adhered to the first conductive type semiconductor layer 110 on the first conductive type semiconductor layer 110 exposed through the mesa structure MS; and a second conductive pattern CP2 electrically adhered to the ohmic layer 140 on the mesa structure MS.
According to an embodiment, the first conductive pattern CP1 may include: a first portion PT1 extending toward the second conductive pattern CP 2; and a second portion PT2 extending from the first portion PT1 in a direction perpendicular to the direction in which the first portion PT1 extends. Both end portions of the second portion PT2 may have a structure bent in the direction of the second conductive pattern CP 2. The first conductive pattern CP1 has a structure spreading in the direction of the second conductive pattern CP2, and thus current spreading (currentspreading) of the light emitting element can be improved.
Each of the first and second conductive patterns CP1 and CP2 may have a multi-layer structure. Each of the first and second conductive patterns CP1 and CP2 may include at least one selected from the group consisting of Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu. In addition, alloys of the above-listed materials may be included.
The light emitting element may further include an insulating film DL covering the first and second conductive patterns CP1 and CP2 on the light emitting portion and extending onto the second protrusion pattern PRT2 of the second region AR 2. According to an embodiment, the end of the insulating film DL may be the same plane as the outline 104 of the substrate 100.
The insulating film DL may include a plurality of SiO2Layer and a plurality of TiO2A Distributed Bragg Reflector (DBR) in which layers are alternately stacked. The insulating film DL having the distributed bragg reflector has insulating properties and can reflect light generated from the active layer 120 toward the substrate 100.
The insulating film DL may be formed of SiO2Alternately laminating TiO layers in turn2Layer T1, SiO2Layer S2, TiO2Layer T2. Thus, the second of the insulating film DLA SiO2The layer S1 may be in contact not only with the light emitting portion but also with the second protrusion pattern PRT2 arranged at the second area AR 2.
According to an embodiment, as shown in fig. 1c, the second layers LY1-2, LY2-2, which may be the respective second protrusion patterns PRT2, include SiO2The first layer S1 of the insulating film DL in contact with the second layers LY1-2, LY2-2 of the respective second protrusion patterns PRT2 contains SiO2. Therefore, the adhesion reliability of the second protrusion pattern PRT2 and the insulating film DL can be improved.
On the other hand, the second layers LY1-2, LY2-2 of the respective second protrusion patterns PRT2 and the first layer S1 of the insulating film DL comprise SiO2Thus, in the second area AR2, the interface between the second layers LY1-2, LY2-2 of the respective second protrusion patterns PRT2 and the first layer S1 of the insulating film DL may be unclear.
According to an embodiment, the height HT1 of each first protrusion pattern PRT1 may be greater than the height HT2 of each second protrusion pattern PRT 2. It may be that the height HT1-1 of the first layers LY1-1, LY2-1 of the first protrusion pattern PRT1 is the same as the height HT1-2 of the first layers LY1-1, LY2-1 of the second protrusion pattern PRT2, but the height HT1-2 of the second layers LY1-2, LY2-2 of the first protrusion pattern PRT1 is greater than the height HT2-2 of the second layers LY1-2, LY2-2 of the second protrusion pattern PRT 2. However, the first layer S1 of the insulating film DL contains the same substance as the second layers LY1-2, LY2-2, namely SiO2Thus, the interface between the second layers LY1-2, LY2-2 and the insulating film DL is unclear. At this time, the first layers LY1-1, LY2-1 of the second protrusion pattern PRT2 are sapphire, and the second layers LY1-2, LY2-2 contain SiO2Therefore, the interfaces of the first layers LY1-1, LY2-1 and the second layers LY1-2, LY2-2 are clear, and the first layer S1 of the insulating film DL is SiO2Layer, the second layer T2 being TiO2The interface between the first layer S1 and the second layer T2 of the insulating film DL can be defined. Accordingly, the second layer T2, i.e., TiO, of the insulating film DL is formed from the upper face portion of the first layers LY1-1, LY2-1 of the second protrusion pattern PRT22The thickness HTA of the lower layer removes the thickness TH of the first layer S1 of the insulating film DL in contact with the one surface 102 of the substrate 100 of the second area AR2, and it can be confirmed that the second layer of the second protrusion pattern PRT2LY1-2, LY2-2 has a height HT 2-2.
It may be that the second layers LY1-2, LY2-2 of the respective embossed patterns PRT1, PRT2 contain SiO formed by PEVD2In contrast, SiO of the insulating film DL2The layers are formed by electron beams, respectively. In general, electron beams can be used to form SiO with small thickness2And (3) a layer. In this case, the SiO of the second layers LY1-2, LY2-22May be greater than SiO of the insulating film DL2The crystalline density of the layer. The second layer LY1-2, LY2-2 comprises SiO formed by PEVD2Thereby forming a first SiO with the insulating film DL2The adhesion of the layer S1 is excellent.
Referring to fig. 1a and 1b, the light emitting device may further include: a first pad PD1 disposed on the insulating film DL and electrically connected to the first conductive pattern CP 1; and a second pad PD2 electrically connected with the second conductive pattern CP 2. The first pad PD1 may apply a negative voltage to the first conductive type semiconductor layer 110 through the first conductive pattern CP1, and the second pad PD2 may apply a positive voltage to the second conductive type semiconductor layer 130 through the second conductive pattern CP2 and the ohmic layer 140.
According to an embodiment, the first and second pads PD1 and PD2 may include at least one selected from the group consisting of Au, Ag, Ni, Al, Rh, PD, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu. Further, an alloy of the above-listed substances may be contained.
As described above, in the light emitting element of the embodiment of the present invention, the plurality of protrusion patterns PRT1, PRT2 and the cavities are provided on the substrate 100, and the protrusion patterns PRT1, PRT2 and the cavities VD1, VD2 are described in detail below.
Referring to fig. 1c to 1e, protrusion patterns PRT1, PRT2 including first and second layers LY1-1 and LY2-1 and LY1-2 and LY2-2 may be disposed on one side 102 of the substrate 100. In a plane angle, each of the protrusion patterns PRT1, PRT2 may have a circular shape. In the case where the projected pattern has a bullet shape, the vertex of the bullet may be the center of the circle. In the cross-sectional view, the diameter DM of the protrusion pattern may be the width of the lowermost end of the protrusion pattern PRT1, PRT2, and the heights HT1, HT2 of the protrusion patterns PRT1, PRT2 may be the distances from the face 102 of the substrate 100 to the apexes of the protrusion patterns PRT1, PRT 2.
The first and second layers LY1-1 and LY2-1 and LY1-2 and LY2-2 may have concentric circular shapes different from each other in diameter DM and the same center in plane view. In case the relief patterns PRT1, PRT2 have a bullet shape, the diameter DM of the first layers LY1-1, LY2-1 may be larger than the diameter DM of the second layers LY1-2, LY 2-2. At this time, the diameter DM of each of the first and second layers LY1-1 and LY2-1 and LY1-2 and LY2-2 may be the width of the lowermost end of each of the first and second layers LY1-1 and LY2-1 and LY1-2 and LY2-2 in terms of cross section.
Referring to fig. 1d, the embossed pattern PRT1 may be arranged in various patterns on one side 102 of the substrate 100. In this embodiment, a structure in which one protrusion pattern PRT1 in the second row is disposed between two adjacent protrusion patterns PRT1 in the first row in the protrusion pattern PRT1 is exemplified, but the arrangement form of the protrusion patterns PRT1 is not limited thereto in the present invention.
The diameter DM of each of the protrusion patterns PRT1 may be equal to or less than a Pitch (PTC) between adjacent two of the protrusion patterns PRT 1. At this time, the pitch PTC is the distance between the respective centers of the adjacent two protrusion patterns PRT 1. In the case where the diameter DM of the protrusion pattern PRT1 is larger than the pitch PTC, the protrusion patterns PRT1 overlap on a plane, and the area of the one face 102 of the substrate 100 exposed through the protrusion pattern PRT1 is insufficient for the epitaxial growth of the first conductive semiconductor layer 110.
As described above, the protrusion patterns PRT1, PRT2 may include the first protrusion pattern PRT1 disposed at the first area AR1 of the substrate 100 and the second protrusion pattern PRT2 disposed at the second area AR2 of the substrate 100.
According to an embodiment, a plurality of adjacent first cavities VD1 may be provided at each of the first protrusion patterns PRT 1. A plurality of first cavities VD1 may be provided at the side of the first protrusion pattern PRT1, i.e., between the first protrusion pattern PRT1 and the first conductive type semiconductor layer 110. In particular, in the first protrusion pattern PRT1, the first cavity VD1 may be formed near an edge of an interface of the first layer LY1-1, LY2-1 and the second layer LY1-2, LY 2-2. The first cavity VD1 may have a form extending in a lower direction of the extension plane, i.e., in a direction toward the substrate 100, with reference to the extension plane of the interface of the first layer LY1-1, LY2-1 and the second layer LY1-2, LY 2-2. Thus, the first cavity VD1 may be formed along the uppermost outer side of the first layer LY1-1, LY2-1, at least on one side.
Here, the first cavities VD1 may be formed corresponding to the growth direction of the crystal plane, and may be formed at the side portions corresponding to the respective vertices of the hexagon with reference to the center of the first protrusion pattern PRT 1. Each first cavity VD1 may have a triangular shape when viewed in plan. That is, the width of each of the first cavities VD1 may be narrower as the interfaces of the first layers LY1-1, LY2-1 and the second layers LY1-2, LY2-2 are closer to the substrate 100. In detail, in the case where the first protrusion pattern PRT1 is provided in the form of a bullet, it may be that the upper face of the first layer LY1-1, LY2-1 has a circular shape, and the first cavity VD1 is provided at a position corresponding to the vertex of a regular hexagon inscribed in the circle on the first layer LY1-1, LY2-1 in plan view. The first cavity VD1 may be perpendicular to the first surface 102 of the substrate 100, and may have a right triangle shape when taken along a plane passing through the center of the circle. At this time, in the right triangle shape, the inclined surface may correspond to the side of the first layer LY1-1, LY 2-1. For example, the inclined surface may be a curved surface, and may not be a complete right triangle. Further, in each of the first cavities VD1, the uppermost face forming the first cavity VD1 may be substantially the same face as the upper face of the extended first layer LY1-1, LY 2-1. That is, the respective first cavities VD1 may be formed at the first conductive type semiconductor layer 110 corresponding to the outer side of the upper surfaces of the first layers LY1-1, LY2-1, and the upper surfaces of the first layers LY1-1, LY2-1 become the upper side surfaces in the structure constituting the respective first cavities VD 1.
According to an embodiment, the first conductive type semiconductor layer 110 may be subjected to a process of merging into one crystal in a process of growing in an upward direction and/or a lateral direction from the one surface 102 of the substrate 100. In this merging process, it is intentionally controlled to form portions not in close contact with the side surfaces of the first layers LY1-1, LY2-1 of the first protrusion pattern PRT1, so that the first cavity VD1 can be formed.
The first cavity VD1 may be a hollow space where the first layers LY1-1, LY2-1 and the first conductive type semiconductor layer 110 are not provided. Accordingly, the first cavity VD1 may have a refractive index different from each other with respect to the first layers LY1-1, LY2-1 and the first conductive type semiconductor layer 110. Light refraction, scattering, and reflection occur between the interfaces between the first layers LY1-1, LY2-1 and the respective first cavities VD1 and between the first conductive type semiconductor layer 110 and the first cavities VD1, and thus, the light extraction efficiency based on the first cavities VD1 can be increased. However, in general, although the increase in the refraction, scattering, and reflection of light improves the light extraction efficiency, when the position where the first cavity VD1 is formed is too close to or too far from the one surface 102 of the substrate 100, the light extraction efficiency is rather lowered.
In an embodiment, the respective heights of the first and second layers LY1-1 and LY2-1 and LY1-2 and LY2-2 in the first protrusion pattern PRT1 may be maintained within a predetermined range so as to improve the light extraction efficiency based on the first cavity VD 1. As described above, the position of the first cavity VD1 is provided at a position corresponding to the interface of the first layers LY1-1, LY2-1 and the second layers LY1-2, LY2-2, and thus the position of the first cavity VD1 can also be adjusted by adjusting the positions of the first layers LY1-1, LY2-1 and the second layers LY1-2, LY2-2 to a specific range. Here, in the case where the height of the first layers LY1-1, LY2-1 is 0, the growth of the first conductive type semiconductor layer 110 from the substrate 100 may be inhibited by impurities or the like remaining on the one surface 102 of the substrate 100 in the process. In addition, if the heights of the second layers LY1-2, LY2-2 are greater than the heights of the first layers LY1-1, LY2-1, the crystal growth in the lateral direction of the first layers LY1-1, LY2-1 is reduced, thereby enabling to improve the crystal quality, and thus the heights of the second layers LY1-2, LY2-2 may be greater than the heights of the first layers LY1-1, LY 2-1.
In other words, in order to sufficiently improve the light extraction efficiency of the first cavity VD1, the heights of the first and second layers LY1-1, LY2-1 and LY1-2, LY2-2 and the position of the first cavity VD1 based thereon may be within a predetermined range. For example, the height of the second layers LY1-2, LY2-2 may be greater than 2.5 times and less than 9.5 times relative to the first layers LY1-1, LY 2-1. In an embodiment, the height of the second layer LY1-2, LY2-2 may be 4.25 times the height of the first layer LY1-1, LY 2-1. As an example, when the sum of the heights of the first and second layers LY1-1, LY2-1 and LY1-2, LY2-2 is about 2.1 μm, the heights of the first and second layers LY1-1, LY2-1 may be greater than about 0.2 μm and less than about 0.6 μm. According to another embodiment, when the sum of the heights of the first and second layers LY1-1, LY2-1 and LY1-2, LY2-2 is about 2.1 μm, the heights of the first and second layers LY1-1, LY2-1 may be about 0.25 μm or more and about 0.55 μm or less. According to another embodiment, the height of the first layers LY1-1, LY2-1 may be about 0.3 μm or more and 0.5 μm or less.
If the height of the first layer LY1-1, LY2-1 is less than the above range from the one surface 102 of the substrate 100, the first cavity VD1 cannot be sufficiently formed, and even if the first cavity VD1 is formed, the light scattering effect based on the first cavity VD1 may not be sufficiently exhibited. In addition, the first cavity VD1 is small in size or does not sufficiently generate or function as a defect, whereby the transmittance of light through the first cavity VD1 may be reduced. In this case, as a result, the incidence ratio of light from the first conductive type semiconductor layer 110 toward the inner direction of the substrate 100 may be reduced.
In the case where the heights of the first layers LY1-1, LY2-1 are within the above-described ranges from the one surface 102 of the substrate 100, the first cavity VD1 is sufficiently formed, and not only the scattering effect based on the first cavity VD1 increases, but also the proportion of light incident from the first conductive type semiconductor layer 110 toward the substrate 100 through the first cavity VD1 can be increased. In particular, in addition to light directly incident on the substrate 100 from the first conductive type semiconductor layer 110, there is additional light that is refracted by the first cavity VD1 and then transmitted to the one surface 102 of the substrate 100, whereby the overall light extraction efficiency can be improved.
In the case where the height of the first layer LY1-1, LY2-1 is formed larger beyond the above range from the one surface 102 of the substrate 100, the path of light traveling within the substrate 100 increases for light traveling from the first conductive type semiconductor layer 110 toward the substrate 100, whereby the light absorption rate in the substrate 100 increases, and thus the transmission amount of light passing through the substrate 100 may decrease. In addition, in this case, the heights of the first layers LY1-1, LY2-1 become relatively high, and thus crystal growth toward the side directions of the first layers LY1-1, LY2-1 occurs and crystal quality may be degraded, which may cause a decrease in light efficiency.
According to an embodiment, a second cavity VD2 may be provided between the first cavity VD1 and the substrate 100. The second cavity VD2 may be provided at the side of the first layers LY1-1, LY2-1 of the first protrusion pattern PRT1, that is, between the first layers LY1-1, LY2-1 and the first conductive type semiconductor layer 110.
As described above, each of the first cavities VD1 is formed by intentional control, and thus may have a triangular cross-section at a planar angle and a right-angled triangular cross-section at a cross-sectional angle. In contrast, the second cavity VD2 is formed during the growth of the first conductive type semiconductor layer 110, and thus, the size and structure thereof may be varied. As an example, the size of each second cavity VD2 can be smaller than the size of each first cavity VD 1.
The second cavity VD2 may be a hollow space where the first layers LY1-1, LY2-1 and the first conductive type semiconductor layer 110 are not provided. Thus, the second cavity VD2 has a refractive index different from each other with respect to the first layers LY1-1, LY2-1 and the first conductive type semiconductor layer 110, but may not greatly affect the improvement of the light extraction efficiency as described above.
On the other hand, the first and second cavities VD1 and VD2 may not provide the second protrusion pattern PRT2 at the second area AR 2. As described above, the first cavity VD1 and the second cavity VD2 are formed and generated during the epitaxial growth of the first conductive type semiconductor layer 110 on the one surface 102 of the substrate 100, respectively, and thus the second protrusion pattern PRT2 of the second region AR2 may not be provided.
Fig. 2a is a plan view of a light emitting device for explaining another embodiment of the present invention, and fig. 2b is a sectional view of the light emitting device of fig. 2a taken along a-a'.
Referring to fig. 2a and 2b, the light emitting device may include a substrate 100 and a light emitting portion disposed on the substrate 100.
On one side 102 of the substrate 100, there may be provided protrusion patterns PRT1, PRT2 in which first layers LY1-1, LY2-1 formed of the same substance as the substrate 100 and second layers LY1-2, LY2-2 formed of a different substance from the substrate 100 are sequentially stacked. According to one embodiment, it is possible that the first layer LY1-1, LY2-1 comprises sapphire, and the second layer LY1-2, LY2-2 comprises SiO2。
The substrate 100 may include a first area AR1 configured with a light emitting portion and a second area AR2 other than the first area AR 1. The second area AR2 may be a space between the first area AR1 and the outline 104 of the substrate 100. The protrusion patterns PRT1, PRT2 may include a first protrusion pattern PRT1 formed at the first area AR1 and a second protrusion pattern PRT2 formed at the second area AR2, respectively.
On the other hand, as illustrated in fig. 1a to 1e, a first cavity VD1 and a second cavity VD2 may be provided between the first protrusion pattern PRT1 and the first conductive type semiconductor layer 110.
The light emitting section may include: a first conductive type semiconductor layer 110; and a mesa structure MS in which the active layer 120, the second conductive type semiconductor layer 130, and the ohmic layer 140 are sequentially stacked so that a portion of the first conductive type semiconductor layer 110 is exposed. The first conductive type semiconductor layer 110 and the mesa structure MS may have inclined side surfaces, respectively.
The first conductive type semiconductor layer 110 may be disposed to cover the first area AR1 of the substrate 100. That is, the first conductive type semiconductor layer 110 may be disposed to cover the first protrusion pattern PRT 1.
According to an embodiment, the recess CCV may be formed at a portion of the edge of the mesa structure MS in a planar angle. The recessed portion CCV is a region recessed from the edge of the substrate 100 toward the center of the tread structure MS, and in the present embodiment, the mesa structure MS may have 4 recessed portions CCV. However, the number of the depressed portions CCV is not limited thereto. More portions of the first conductive type semiconductor layer 110 may be exposed at positions corresponding to the recess CCV.
The mesa structure MS may include a vertically stacked active layer 120, a second conductive type semiconductor layer 130, and an ohmic layer 140. On the other hand, the mesa structure MS may have an inclined side.
According to an embodiment, the mesa structure MS may have a hole exposing a portion of the first conductive type semiconductor layer 110. As shown in fig. 2, 2 holes are shown in the present embodiment, but the number of holes is not limited thereto.
The light emitting device may further include a first insulating film DL1 disposed on the ohmic layer 140. The first insulating film DL1 may contain SiN, TiN, TiO2、Ta2O5、ZrOx、HfOxAnd SiO2At least one of (1).
The first insulating film DL1 may include: a first opening OP1 exposing the first conductive type semiconductor layer 110 exposed through the recess CCV of the mesa structure MS; a second opening OP2 exposing the first conductive type semiconductor layer 110 on the bottom surface of the hole of the mesa structure MS; and a third opening OP3 partially exposing the ohmic layer 140. In the embodiment, 4 first openings OP1, 2 second openings OP2 and 3 third openings OP3 are shown, but the number of the first openings OP1, the second openings OP2 and the third openings OP3 is not limited thereto.
According to an embodiment, the first insulating film DL1 may have a structure covering the mesa structure MS and extending toward the side of the first conductive type semiconductor layer 110 without extending toward the second region AR 2. Unlike this, the first insulating film DL1 may also cover the second protrusion pattern PRT2 of the second area AR 2.
The light emitting element may further include: a first conductive pattern CP1 electrically connected to the first conductive type semiconductor layer 110 exposed through the first and second openings OP1 and OP 2; and a second conductive pattern CP2 electrically connected with the ohmic layer 140 exposed through the third opening OP 3. The first and second conductive patterns CP1 and CP2 may each include at least one of Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu.
According to an embodiment, the first conductive pattern CP1 may include a protrusion CVX corresponding to the recess CCV of the mesa structure MS in a cross-sectional view. As an example, the first conductive pattern CP1 may have 4 protrusions CVX corresponding to the 4 depressions CCV. Each of the protrusions CVX may fill the first opening OP1 and be electrically connected to the first conductive type semiconductor layer 110.
The light emitting element may further include a second insulating film DL2 covering the first conductive pattern CP1 and the second conductive pattern CP2 on the light emitting portion and extending toward the second area AR 2. The second insulating film DL2 may cover the light emitting portion of the first area AR1 and extend toward the second area AR2 to be formed up to the outline 104 of the substrate 100. That is, the end of the second insulating film DL2 may be the same plane as the outline 104 of the substrate 100.
According to an embodiment, the second insulating film DL2 may include a plurality of SiO2Layer and a plurality of TiO2Distributed Bragg reflector formed by alternately stacking layers. In the second region AR2, the second insulating film DL2 may be adhered to each of the second layers LY2-2 of the second protrusion patterns PRT 2. In this case, since the second layer LY2-2 contains SiO2The first layer of the second insulating film DL is SiO2Therefore, the adhesive strength can be improved by the same physical properties.
The second insulating film DL2 is the same as the insulating film DL described in fig. 1a to 1e, and thus detailed description thereof is omitted.
The light emitting element may further include: a first pad PD1 electrically connected to the first conductive pattern CP1 on the second insulating film DL 2; and a second pad PD2 electrically connected with the second conductive pattern CP 2.
The constituent elements of the light emitting element of the present embodiment are similar to those of the light emitting element described in fig. 1a to 1e, and thus detailed description thereof is omitted.
Fig. 3a is a plan view of a light emitting device for illustrating still another embodiment of the present invention, and fig. 3b is a sectional view of the light emitting device of fig. 3a taken along a-a'.
Referring to fig. 3a and 3b, the light emitting device may include a substrate 100 and a light emitting portion having a plurality of light emitting cells. For convenience of description, a case where the light emitting unit includes the first light emitting unit LEC1 and the second light emitting unit LEC2 is described.
On one side 102 of the substrate 100, there may be provided protrusion patterns PRT1, PRT2 in which first layers LY1-1, LY2-1 formed of the same substance as the substrate 100 and second layers LY1-2, LY2-2 formed of a different substance from the substrate 100 are sequentially stacked. According to one embodiment, it is possible that the first layer LY1-1, LY2-1 comprises sapphire, and the second layer LY1-2, LY2-2 comprises SiO2。
The substrate 100 may include: a first area AR1 for configuring the first light emitting unit LEC 1; a second area AR2 for configuring the second light emitting cells LEC 12; a third region AR3 disposed between the first region AR1 and the second region AR 2; and a fourth area AR4 disposed between the first area AR1 and the second area AR2 and the outline 104 of the substrate 100. There may be a structure in which the third area AR3 is connected with the fourth area AR 4.
The protrusion patterns PRT1, PRT2 may include a first protrusion pattern PRT1 disposed in the first area AR1 and the second area AR2, and a second protrusion pattern PRT2 disposed in the third area AR3 and the fourth area AR 4. The heights of the respective first protrusion patterns PRT1 and the heights of the respective second protrusion patterns PRT2 may be different from each other. According to an embodiment, the height of the second layers LY1-2, LY2-2 of the respective first protrusion patterns PRT1 may be different from the height of the second layers LY1-2, LY2-2 of the respective second protrusion patterns PRT 2.
Each of the first and second light emitting cells LEC1 and LEC2 may include the first conductive type semiconductor layer 110 and the mesa structure MS. The size of the mesa structure MS may be smaller than that of the first conductive type semiconductor layer 110 to expose a portion of the first conductive type semiconductor layer 110. The first conductive type semiconductor layer 110 and the mesa structure MS may have inclined side surfaces, respectively. On the other hand, the mesa structure MS may include a vertically stacked active layer 120, a second conductive type semiconductor layer 130, and an ohmic layer 140.
The light emitting element may further include an insulating film DL disposed on the substrate 100 so as to cover the first and second light emitting cells LEC1 and LEC 2. The insulating film DL may cover the first and second light emitting cells LEC1 and LEC2 and extend toward the third region AR3 between the first and second light emitting cells LEC1 and LEC2 of the substrate 100 and the fourth region AR4 between the first and second regions AR1 and AR2 of the substrate 100 and the outline 104 of the substrate 100. According to an embodiment, the end of the insulating film DL may be the same plane as the outline 104 of the substrate 100.
The insulating film DL may include a plurality of SiO2A layer and a plurality of TiO2Distributed Bragg reflector formed by alternately stacking layers. In the second region AR2, the insulating film DL may be adhered to each of the second layers LY2-2 of the second protrusion patterns PRT 2. In this case, the second layer LY2-2 contains SiO2The first layer of the insulating film DL is SiO2Therefore, the adhesive strength can be improved by the same physical properties. The insulating film DL is the same as the insulating film DL described in fig. 1, and thus detailed description thereof is omitted.
The light emitting element may include: a first pad PD1 electrically connected to the first conductive type semiconductor layer 110 of the second light emitting cell LEC2 on the insulating film DL; a second pad PD2 electrically connected to the ohmic layer 140 of the first light emitting cell LEC 1; and a connection pad CPD electrically connected to the first conductive type semiconductor layer 110 of the first light emitting cell LEC1 and the ohmic layer 140 of the second light emitting cell LEC2 on the insulating film DL.
The constituent elements of the light emitting element of the present embodiment are similar to those of the light emitting element described in fig. 1a to 1e, and thus detailed description thereof is omitted.
A method for manufacturing the light-emitting element shown in fig. 1a and 1b will be described below.
Fig. 4 to 9 are sectional views for explaining a method of manufacturing a light emitting element according to an embodiment of the present invention.
Referring to fig. 4, an initial substrate 100p may be prepared.
A material film ML may be formed on one side 102 of the initial substrate 100 p. The substance film ML may include a substance having a refractive index different from that of the substrate 100. According to one embodiment, it may be that the initial substrate 100p comprises sapphire and the substance film ML comprises SiO2。
According to one embodiment, comprises SiO2The substance film ML of (a) can be formed by PEVD. SiO formed by PEVD process2Can have a SiO ratio formed by an electron beam2A more dense crystalline structure of (a).
Referring to fig. 5, after forming a mask pattern on the substance film ML, the substance film ML and the initial substrate 100p are etched using the mask pattern as an etching mask, so that a plurality of protrusion patterns PRT can be formed. The material film ML and the initial substrate 100p can be formed by using Cl2And BCl3A dry etching process of an etchant (echant) performs etching.
After the formation of the protrusion pattern PRT, the mask pattern may be removed.
By forming the projection pattern PRT, the substrate 100 having one side 102 with a height lower than that of one side 102 of the initial substrate 100p can be formed. Each of the protrusion patterns PRT may include: a first layer LY1 comprising the same species as substrate 100; and a second layer LY2 comprising an acid addition salt on the first layer LY1The substrate 100 is a different substance. For example, it may be that the first layer LY1 contains sapphire and the second layer LY2 contains SiO2。
According to an embodiment, one side 102 of the substrate 100 may be exposed between the protrusion patterns PRT.
Referring to fig. 6, a first conductive type semiconductor layer 110, an active layer 120, a second conductive type semiconductor layer 130, and an ohmic layer 140 may be sequentially formed on a substrate 100 on which a protrusion pattern PRT is formed.
The first conductive type semiconductor layer 110, the active layer 120, and the second conductive type semiconductor layer 130 may be sequentially formed on the substrate 100 by a growth method such as Metal-Organic chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), and Metal-Organic Chloride (MOC).
The second layer LY2 of the embossed pattern PRT comprises SiO2The side 102 of the substrate 100 exposed between the embossed patterns PRT includes sapphire, whereby the first conductive type semiconductor layer 110 may be grown from the side 102 of the substrate 100 exposed between the embossed patterns PRT. The first conductive type semiconductor layer 110 may be grown in an upward direction to completely cover the side and upper surfaces of the protrusion pattern PRT. The first conductive type semiconductor layer 110 may intentionally form the first cavities VD1 at positions corresponding to the sides of the respective protrusion patterns PRT. The second cavity VD2 may be generated during the growth of the first conductive type semiconductor layer 110.
Next, the ohmic layer 140 may be formed on the second conductive type semiconductor layer 130 by a Chemical Vapor Deposition (CVD) process.
Referring to fig. 7, the mesa structure MS exposing the first conductive type semiconductor layer 110 may be formed by etching the ohmic layer 140, the second conductive type semiconductor layer 130, and the active layer 120. Next, the first conductive type semiconductor layer 110 may be etched to expose the second area AR2 of the substrate 100.
According to an embodiment, it may be that the protrusion pattern PRT1 covered by the first conductive type semiconductor layer 110 in the first area AR1 is not etched but the second layer LY2 of the protrusion pattern PR1 formed in the second area AR2 is etched during the etching of the first conductive type semiconductor layer 110.
For convenience of illustration, the protrusion patterns PRT1, PRT2 may be formed in a first protrusion pattern PRT1 covered by the first conductive type semiconductor layer 110 in the first region AR1 and a second protrusion pattern PRT2 disposed in the second region AR 2. The second protrusion patterns PRT2 may have a height lower than that of each of the first protrusion patterns PRT1 by etching (or mesa formation MS) of the first conductive type semiconductor layer 110. According to an embodiment, the height of the second layer LY2 of each of the first protrusion patterns PRT1 may be greater than the height of the second layer LY2 of the second protrusion pattern PRT 2.
In this embodiment, the case where the first conductive type semiconductor layer 110 is etched after the mesa structure MS is formed is described, but the mesa structure MS may be formed after the first conductive type semiconductor layer 110 is etched. The protrusion pattern PRT2 of the second region AR2 may be etched during the etching of the first conductive type semiconductor layer 110, and the protrusion pattern PRT2 of the second region AR2 may be further etched during the formation of the mesa structure MS.
Referring to fig. 8, a first conductive pattern CP1 electrically contacting the first conductive type semiconductor layer 110 on the first conductive type semiconductor layer 110 exposed through the mesa structure MS and a second conductive pattern CP2 electrically contacting the ohmic layer 140 on the ohmic layer 140 may be formed.
Referring to fig. 9, an insulating film DL may be formed on the substrate 100 so as to cover the first conductive pattern CP1, the second conductive pattern CP2, the mesa structure MS, and the first conductive type semiconductor layer 110.
The insulating film DL may include a plurality of SiO2Layer and a plurality of TiO2Distributed Bragg reflector formed by alternately stacking layers. In this case, SiO in the insulating film DL2The layer may be formed by electron beam.
According to an embodiment, in the second region AR2, the insulating film DL may be adhered to the second layer LY2 of each of the second protrusion patterns PRT 2. As described above, the second layer LY2 of each of the second protrusion patterns PRT2 contains SiO formed by PEVD2The first layer of the insulating film DL in contact with the second layer LY2 is SiO formed by an electron beam2Thus, two layers having the same physical properties can be connected. Therefore, although it is difficult to distinguish the interface between the second layer LY2 and the insulating film DL, the portion of the second protrusion pattern PRT2 in contact with the insulating film DL has the same physical properties, and the adhesion reliability can be improved. Therefore, the problem of peeling of the insulating film DL in the subsequent process can be prevented. In particular, the second layer LY2 of each of the second protrusion patterns PRT2 has a high-density structure formed by PEVD, and thus can improve the adhesion to the insulating film DL.
Referring to fig. 1b, it is possible to form the first pad PD1 electrically connected to the first conductive pattern CP1 through the first hole and the second pad PD2 electrically connected to the second conductive pattern CP2 through the second hole after forming the first hole exposing the first conductive pattern CP1 and the second hole exposing the second conductive pattern CP2 by etching the insulating film DL.
Although the embodiments of the present invention have been described above with reference to the drawings, those having ordinary skill in the art to which the present invention pertains will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention. Therefore, it should be understood that the above-described embodiments are illustrative embodiments in all respects, and are not intended to limit the present invention.
Claims (19)
1. A light emitting element comprising:
a substrate;
a plurality of protrusion patterns disposed on the substrate and including a first layer containing a substance identical to a substance constituting the substrate and a second layer containing a substance different from the substance constituting the substrate on the first layer; and
a light emitting section disposed in the first region of the substrate,
the height of the protruding pattern arranged in the first area is different from the height of the protruding pattern arranged in the second area,
the second region includes a region between the first region and an outline of the substrate.
2. The light-emitting element according to claim 1,
the second layer of the protruding patterns configured in the first area is different from the second layer of the protruding patterns configured in the second area in height.
3. The light-emitting element according to claim 1,
the light emitting element further includes an insulating film extending to the second region of the substrate on the light emitting portion.
4. The light-emitting element according to claim 3,
the protruding pattern disposed in the second region is in contact with the insulating film.
5. The light-emitting element according to claim 3,
the insulating film includes a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately laminated.
6. The light-emitting element according to claim 5,
the second layer comprises a silicon oxide,
the insulating film in contact with the second layer includes a first silicon oxide layer,
and forming a uniform silicon oxide layer on the first layer of the protruding pattern arranged in the second region.
7. The light-emitting element according to claim 6,
the first silicon oxide layer of the insulating film has a first thickness on the substrate,
a second thickness, which is the subtraction of the first thickness from the uniform silicon oxide layer, is the height of the second layer of the raised pattern in the second region.
8. The light-emitting element according to claim 7,
the height of the second layer of the protruding patterns configured in the first area is less than the height of the second layer of the protruding patterns configured in the second area.
9. The light-emitting element according to claim 1,
each of the protrusion patterns has a width gradually narrowing as it goes away from the substrate.
10. The light-emitting element according to claim 1,
each of the convex patterns has a circular cross section and is contracted toward a vertex, and each of the convex patterns has a sidewall having a curved surface.
11. The light-emitting element according to claim 1,
the light-emitting section includes a first cavity formed by contacting the first layer at an interface between the first layer and the second layer.
12. The light-emitting element according to claim 11,
the light emitting portion further includes a second cavity formed between the cavity and the substrate and having a size smaller than the first cavity.
13. The light-emitting element according to claim 1,
the second layer has a refractive index greater than the refractive index of the first layer.
14. The light-emitting element according to claim 1,
the second layer of each of the protrusion patterns includes silicon oxide formed by a plasma enhanced chemical vapor deposition process.
15. A light emitting element comprising:
a substrate;
a plurality of protrusion patterns disposed on the substrate and including a first layer containing a substance identical to a substance constituting the substrate and a second layer containing a substance different from the substance constituting the substrate on the first layer;
a first light emitting unit disposed in a first region of the substrate; and
a second light emitting unit disposed in a second region of the substrate,
the heights of the protruding patterns arranged in the first region and the second region are different from the heights of the protruding patterns arranged in the third region,
the third region includes: a region between the first region and the second region; and a region between each of the first region and the second region and an outline of the substrate.
16. The light-emitting element according to claim 15,
the second layer of the protrusion patterns disposed in the first region and the second region are different in height from the second layer of the protrusion patterns disposed in the third region.
17. The light-emitting element according to claim 15,
the light emitting element further includes an insulating film extending to a third region of the substrate on the first light emitting unit and the second light emitting unit.
18. The light-emitting element according to claim 17,
the convex pattern disposed in the third region is in contact with the insulating film.
19. The light-emitting element according to claim 17,
the insulating film includes a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately laminated.
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KR1020180152769A KR102702883B1 (en) | 2018-11-30 | Light emitting device |
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