KR20140117791A - Light emitting diode and method of fabricating the same - Google Patents

Light emitting diode and method of fabricating the same Download PDF

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Publication number
KR20140117791A
KR20140117791A KR1020130032481A KR20130032481A KR20140117791A KR 20140117791 A KR20140117791 A KR 20140117791A KR 1020130032481 A KR1020130032481 A KR 1020130032481A KR 20130032481 A KR20130032481 A KR 20130032481A KR 20140117791 A KR20140117791 A KR 20140117791A
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KR
South Korea
Prior art keywords
light emitting
layer
emitting cell
wiring
insulating
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KR1020130032481A
Other languages
Korean (ko)
Inventor
김매이
김재권
이섬근
윤여진
Original Assignee
서울바이오시스 주식회사
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Application filed by 서울바이오시스 주식회사 filed Critical 서울바이오시스 주식회사
Priority to KR1020130032481A priority Critical patent/KR20140117791A/en
Priority to DE112013006123.6T priority patent/DE112013006123T5/en
Priority to CN201711161861.8A priority patent/CN107768399B/en
Priority to CN201380066443.4A priority patent/CN104885236B/en
Priority to US14/135,925 priority patent/US9093627B2/en
Priority to PCT/KR2013/011914 priority patent/WO2014098510A1/en
Priority to TW102147821A priority patent/TWI601320B/en
Priority to US14/459,887 priority patent/US9356212B2/en
Publication of KR20140117791A publication Critical patent/KR20140117791A/en
Priority to US14/791,824 priority patent/US9287462B2/en
Priority to US15/013,708 priority patent/US9379282B1/en
Priority to US15/147,619 priority patent/US9735329B2/en
Priority to US15/150,863 priority patent/US9634061B2/en
Priority to US15/663,219 priority patent/US10256387B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/42—Transparent materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes

Abstract

A light emitting diode and a method for manufacturing the same are disclosed. The light emitting diode includes a first light emitting cell and a second light emitting cell which are located on a substrate and are spaced apart from each other; A first transparent electrode layer positioned on the first light emitting cell and electrically connected to the first light emitting cell; A current blocking layer disposed between the first light emitting cell and the first transparent electrode layer to separate a part of the first transparent electrode layer from the first light emitting cell; A wiring electrically connecting the first light emitting cell to the second light emitting cell; And an insulating layer for separating the wiring from the side surface of the first light emitting cell. The second light emitting cell has an inclined side surface, the wiring has a first connecting portion for electrically connecting to the first light emitting cell and a second connecting portion for electrically connecting to the second light emitting cell, Contacts the first transparent electrode layer in the upper region, and the second connection portion contacts the inclined side face of the second light emitting cell. Thereby, a light emitting diode capable of increasing the effective light emitting area of the light emitting cell can be provided.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a light emitting diode (LED)

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode and a method of manufacturing the same, and more particularly, to a light emitting diode in which a plurality of light emitting cells are interconnected by wiring on a single substrate and a method of manufacturing the same.

GaN-based LEDs are currently used in various applications such as color LED display devices, LED traffic signals, and white LEDs. In recent years, the luminous efficiency of a high-efficiency white LED is superior to the efficiency of a conventional fluorescent lamp, and is expected to replace fluorescent lamps in general illumination fields.

Generally, light emitting diodes emit light by forward current and require the supply of a direct current. Therefore, when the light emitting diode is directly connected to the AC power source, the light emitting diode repeats on / off according to the direction of the current. As a result, the light emitting diode can not emit light continuously and is easily damaged by the reverse current.

A light emitting diode capable of being directly connected to a high voltage AC power source to solve the problem of such a light emitting diode is disclosed in International Publication No. WO 2004/023568 (Al), entitled " LIGHT-EMITTING DEVICE HAVING LIGHT- EMITTING ELEMENTS, issued by SAKAI et al.

The AC light emitting diode according to WO 2004/023568 (A1) is driven by an AC power source by connecting a plurality of light emitting elements in anti-parallel connection by air bridge wiring. Such an air bridge wiring tends to be broken by an external pressure, and is liable to cause a short circuit due to deformation due to external pressure.

On the other hand, an AC light emitting diode for solving the disadvantage of the air bridge wiring has been disclosed in, for example, Korean Patent No. 10-069023 and Korean Patent No. 10-1186684.

FIG. 1 is a schematic plan view for explaining a light emitting diode having a plurality of conventional light emitting cells, and FIGS. 2 and 3 are cross-sectional views taken along a perforated line A-A of FIG. 1, respectively.

1 and 2, the light emitting diode includes a substrate 21, a plurality of light emitting cells 26 (S1, S2), a transparent electrode layer 31, an insulating layer 33, and a wiring 35 . The light emitting cells 26 may include a lower semiconductor layer 25, an active layer 27 and an upper semiconductor layer 29. The light emitting cells 26 may include a buffer layer 23 ) Can be interposed.

The light emitting cells 26 are formed by patterning the lower semiconductor layer 25, the active layer 27 and the upper semiconductor layer 29 grown on the substrate 21 and are formed on the respective light emitting cells S1 and S2 A transparent electrode layer 31 is formed. In particular, each of the light emitting cells 26 has the lower semiconductor layer 25 in which the active layer 27 and the upper semiconductor layer 29 are partly removed to expose a part of the upper surface for wiring 35 connection.

Thereafter, the insulating layer 33 covering the light emitting cells 26 is formed. The insulating layer 33 includes a side insulating layer 33a covering the side surface of the light emitting cells 26 and an insulating protective layer 33b covering the transparent electrode layer 31. [ The insulating layer 33 has an opening for exposing a part of the transparent electrode layer 31 and an opening for exposing the lower semiconductor layer 25. The wiring 35 is formed on the insulating layer 33 and the first connecting portion 35p of the wiring 35 is electrically connected to the transparent electrode layer 31 of one light emitting cell S1 through the opening of the insulating layer 33 And the second connecting portion 35n of the wiring 35 is connected to the lower semiconductor layer 25 of the adjacent one of the light emitting cells S2 through another opening of the insulating layer 33. [ The second connection portion 35n connects to the upper surface of the lower semiconductor layer 25 exposed by partially removing the active layer 27 and the upper semiconductor layer 29. [

According to the conventional technique, since the wiring 35 is formed on the insulating layer 33, it can be prevented from being deformed by an external force. Further, since the wiring 35 is separated from the light emitting cell 26 by the side insulating layer 33a, it is possible to prevent the light emitting cell 26 from being short-circuited by the wiring 35. [

However, the light emitting diode according to the prior art has a limitation in dispersing the electric current in the region of the light emitting cell 26. That is, there is a problem that the current is not uniformly dispersed in the region of the light emitting cell 26, but is concentrated to the lower portion of one end region of the wiring 35 connected to the transparent electrode layer 31. As the current density increases, the current concentration problem becomes larger.

Further, in the case of the light emitting diode according to the related art, a part of the light generated in the active layer 27 is absorbed by the wiring 35 and is lost. In order to prevent the occurrence of defects such as pinholes in the insulating layer 33, To be increased.

Further, since the upper surface portion of the lower semiconductor layer 25 is exposed for the electrical connection of the second connection portion 35n, the active layer 27 and the upper semiconductor layer 29 are partially removed to reduce the effective light emitting area.

On the other hand, a technique for disposing a current blocking layer 30 between the transparent electrode layer 31 and the light emitting cell 26 to prevent the current from concentrating below the connection end of the wiring 35 Research.

3 is a cross-sectional view illustrating a light emitting diode having a current blocking layer 30 according to the related art.

1 and 3, since the current blocking layer 30 is located under the connection end of the wiring 35, it is possible to prevent the current from being concentrated under the connection end of the wiring 35. [ Furthermore, by forming the current blocking layer 30 with a reflector such as a distributed Bragg reflector, light generated in the active layer 27 can be prevented from being absorbed by the connection end of the wiring 35. [

However, when the current blocking layer 30 is additionally formed as shown in FIG. 3, a photolithography process for forming the current blocking layer 30 is added, thereby increasing manufacturing costs.

3, a part of the light generated in the active layer 27 is absorbed by the wiring 35 and is lost, the effective light emitting area is reduced, and the light emitted from the light emitting diode in the insulating layer 33 There is still a problem of increasing the thickness thereof in order to prevent the occurrence of defects such as pinholes.

Patent Document 1: International Publication No. WO 2004/023568 (Al) Patent Document 2: Korean Patent Publication No. 10-069023 Patent Document 3: Korean Patent No. 10-1186684

SUMMARY OF THE INVENTION It is an object of the present invention to provide a light emitting diode capable of increasing the effective light emitting area of each light emitting cell in a light emitting diode having a plurality of light emitting cells, and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting diode capable of preventing the photolithography process from being increased while adopting a current blocking layer and a method of manufacturing the same.

Another object to be solved by the present invention is to provide a light emitting diode capable of reducing light absorption by wiring and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a light emitting diode comprising: a first light emitting cell and a second light emitting cell spaced apart from each other on a substrate; A first transparent electrode layer positioned on the first light emitting cell and electrically connected to the first light emitting cell; A current blocking layer disposed between the first light emitting cell and the first transparent electrode layer to separate a part of the first transparent electrode layer from the first light emitting cell; A wiring electrically connecting the first light emitting cell to the second light emitting cell; And an insulating layer for separating the wiring from the side surface of the first light emitting cell. The second light emitting cell has an inclined side surface and the wiring has a first connecting portion for electrically connecting to the first light emitting cell and a second connecting portion for electrically connecting to the second light emitting cell, The first connecting portion is in contact with the first transparent electrode layer in the upper region of the current blocking layer and the second connecting portion is in contact with the inclined side face of the second light emitting cell.

It is not necessary to partially remove the active layer in order to expose the region for contacting the second connecting portion, so that the effective light emitting area of the second light emitting cell can be increased have.

On the other hand, the second connecting portion may contact the inclined side surface of the second light emitting cell along the periphery of the second light emitting cell. Therefore, the contact area of the second connection part can be increased without reducing the effective light emission area, and therefore, the contact resistance of the second connection part can be lowered, so that the forward voltage of the light emitting diode can be lowered.

The first and second light emitting cells may include a lower semiconductor layer, an upper semiconductor layer, and an active layer disposed between the lower semiconductor layer and the upper semiconductor layer. The upper surface of the lower semiconductor layer may be covered by the active layer, and the second connection portion may be connected to a side surface of the lower semiconductor layer.

The current blocking layer and the insulating layer may be connected to each other. Therefore, an insulating layer for separating the wiring from the side surface of the light emitting cell can be formed by the same process together with the current blocking layer.

In addition, the current blocking layer and the insulating layer may include a distributed Bragg reflector. Therefore, the light absorbed by the wiring can be greatly reduced. Further, by forming the insulating layer as a multilayer distributed Bragg reflector, occurrence of defects such as pinholes can be effectively prevented.

Furthermore, the current blocking layer and the insulating layer may be located between the first light emitting cell and the wiring over the entire area where the first light emitting cell and the wiring overlap each other.

The light emitting diode may further include an insulating protective layer covering the first light emitting cell and the second light emitting cell. The insulating protection layer is located outside the region where the wiring is formed. In addition, the side surfaces of the insulating protection layer and the side surfaces of the wiring can face each other on the same plane. The side surfaces of the insulating protective layer and the side surfaces of the wiring may be in contact with each other, but are not limited thereto and may be spaced apart from each other.

In some embodiments, the light emitting diode may further include a first transparent conductive layer positioned between the insulating layer and the wiring. The first transparent conductive layer may be connected to the first transparent electrode layer. Further, the first transparent conductive layer may be the same material layer as the first transparent electrode layer.

On the other hand, the wiring and the first transparent electrode layer can be directly connected to each other without overlapping the insulating material over the entire area overlapping each other. As a result, the area of connection between the wiring and the first transparent electrode layer can be increased or the area of the wiring located above the first transparent electrode layer can be reduced as compared with the prior art.

On the other hand, the current blocking layer may be located at least below the region where the first transparent electrode layer and the wiring are connected. Thus, it is possible to prevent the current from concentrating on the lower portion of the connection region of the wiring.

In addition, the first light emitting cell and the second light emitting cell may have the same structure.

According to another aspect of the present invention, there is provided a method of manufacturing a light emitting diode, comprising: forming a first light emitting cell and a second light emitting cell on a substrate, the first light emitting cell and the second light emitting cell being spaced apart from each other, Forming a current blocking layer covering a part of the upper portion of the first light emitting cell and forming a first transparent electrode layer electrically connected to the first light emitting cell, wherein a part of the first transparent electrode layer is formed on the current blocking layer And forming a wiring electrically connecting the first light emitting cell and the second light emitting cell. Further, the wiring may have a first connecting portion for electrically connecting to the first light emitting cell and a second connecting portion for electrically connecting to the second light emitting cell, and the first connecting portion may be formed in the upper region of the current blocking layer The first connection electrode contacts the first transparent electrode layer, and the second connection unit contacts the inclined side surface of the second light emitting cell.

Since the second connection portion contacts the inclined side surface of the second light emitting cell, the effective light emitting area can be increased as compared with the conventional light emitting diode manufacturing method.

The light emitting diode manufacturing method may further include forming an insulating layer covering a part of a side surface of the first light emitting cell. The insulating layer may be formed together with the current blocking layer. Therefore, the current blocking layer and the insulating layer can be formed by the same process.

In addition, the current blocking layer and the insulating layer may be connected to each other, and the current blocking layer and the insulating layer may include a distributed Bragg reflector.

The light emitting diode manufacturing method may further include forming an insulating protective layer before forming the wiring. The insulating protective layer has an opening exposing a region where wiring is to be formed.

Further, forming the insulating protective layer may include forming a layer of an insulating material covering the first light emitting cell and the second light emitting cell, and forming a mask pattern having an opening in an area where a wiring is to be formed on the insulating material layer And etching the layer of insulating material using the mask pattern as an etch mask.

The light emitting diode manufacturing method may further include forming a first transparent conductive layer on the insulating layer. The first transparent conductive layer may be formed together with the first transparent electrode layer. The first transparent conductive layer prevents the insulating layer from being damaged while forming the insulating protective layer. The first transparent conductive layer may be connected to the first transparent electrode layer.

Further, the wiring may be formed by a lift-off technique using the mask pattern after the insulating protective layer is formed. Therefore, the insulating protective layer and the wiring are formed using the same mask pattern, thereby reducing the exposure process.

The first and second light emitting cells may include a lower semiconductor layer, an upper semiconductor layer, and an active layer disposed between the lower semiconductor layer and the upper semiconductor layer. At this time, the second connection portion of the wiring is electrically connected to the lower semiconductor layer of the second light emitting cell.

According to the embodiments of the present invention, the effective light emitting area of the light emitting cells can be increased by electrically contacting one of the connection portions of the wiring with the inclined side face of the light emitting cell. Furthermore, the current blocking layer and the side insulating layer can be formed by the same process, and the addition of the exposure process can be prevented by adopting the current blocking layer. In addition, by forming the current blocking layer and the insulating layer from a distributed Bragg reflector, light absorption by the wiring can be minimized.

1 is a schematic plan view for explaining a conventional light emitting diode.
2 and 3 are schematic cross-sectional views taken along the tear line AA of FIG. 1 to describe a conventional light emitting diode, respectively.
4 is a schematic plan view illustrating a light emitting diode according to an embodiment of the present invention.
FIG. 5 is a schematic cross-sectional view taken along the perforation line BB of FIG. 4 to illustrate a light emitting diode according to an embodiment of the present invention.
6 to 12 are schematic cross-sectional views for explaining a method of manufacturing a light emitting diode according to an embodiment of the present invention.
13 is a schematic cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention.
14 to 17 are schematic cross-sectional views for explaining a method of manufacturing a light emitting diode according to still another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, and the like of the components may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

FIG. 4 is a schematic plan view illustrating a light emitting diode according to an embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along the cut line B-B of FIG.

4 and 5, the light emitting diode includes a substrate 51, light emitting cells S1 and S2, a transparent electrode layer 61, a current blocking layer 60a, an insulating layer 60b, 63 and a wiring 65. In addition, the light emitting diode may include a buffer layer 53.

The substrate 51 may be an insulating or conductive substrate, and may be, for example, a sapphire substrate, a gallium nitride substrate, a silicon carbide (SiC) substrate, or a silicon substrate. Furthermore, the substrate 51 may be a substrate having a concavo-convex pattern (not shown) on the upper surface, such as a patterned sapphire substrate.

The first light emitting cell S1 and the second light emitting cell S2 are spaced apart from each other on a single substrate 51. [ Each of the first and second light emitting cells S1 and S2 includes a lower semiconductor layer 55, an upper semiconductor layer 59 located on one region of the lower semiconductor layer, And a laminated structure 56 including an active layer 57 sandwiched between the two layers. Here, the lower and upper semiconductor layers are respectively described as n-type and p-type, but vice versa.

The lower semiconductor layer 55, the active layer 57 and the upper semiconductor layer 59 may each be formed of a gallium nitride semiconductor material, that is, (Al, In, Ga) N. The compositional element and the composition ratio are determined so that the active layer 57 emits light of a desired wavelength such as ultraviolet or blue light and the lower semiconductor layer 55 and the upper semiconductor layer 59 have a band gap It is formed of a large material.

The lower semiconductor layer 55 and / or the upper semiconductor layer 59 may be formed as a single layer or may have a multi-layer structure as shown in the figure. In addition, the active layer 57 may have a single quantum well structure or a multiple quantum well structure.

The first and second light emitting cells S1 and S2 may have inclined side surfaces and the inclination angle of the side surfaces may be within a range of 15 degrees to 80 degrees with respect to the upper surface of the substrate 51, for example.

The active layer 57 and the upper semiconductor layer 59 are located on the lower semiconductor layer 55. The upper surface of the lower semiconductor layer 55 can be completely covered with the active layer 57, and only the side surface thereof can be exposed.

5, a part of the first light emitting cell S1 and the second light emitting cell S2 are shown, but the first light emitting cell S1 and the second light emitting cell S2 are similar to each other as shown in Fig. 4 Or may have the same structure. That is, the first light emitting cell S1 and the second light emitting cell S2 may have the same gallium nitride semiconductor laminated structure, and may have inclined side surfaces of the same structure.

On the other hand, a buffer layer 53 may be interposed between the light emitting cells S1 and S2 and the substrate 51. The buffer layer 53 is adopted to alleviate the lattice mismatch between the substrate 51 and the lower semiconductor layer 55 to be formed thereon when the substrate 51 is a growth substrate.

The transparent electrode layer 61 is located on each of the light-emitting cells S1 and S2. That is, the first transparent electrode layer 61 is located on the first light emitting cell S1, and the second transparent electrode layer 61 is located on the second light emitting cell S2. The transparent electrode layer 61 may be located on the upper surface of the upper semiconductor layer 59 and may be connected to the upper semiconductor layer 59 and may have an area smaller than that of the upper semiconductor layer 59. That is, the transparent electrode layer 61 can be recessed from the edge of the upper semiconductor layer 59. Therefore, current can be prevented from concentrating through the sidewalls of the light emitting cells S1 and S2 at the edge of the transparent electrode layer 61. [

The current blocking layer 60a may be positioned on each of the light emitting cells S1 and S2 and may be located between the transparent electrode layer 61 and the light emitting cells S1 and S2. A part of the transparent electrode layer 61 is located on the current blocking layer 60a. The current blocking layer 60a may be located near the edge of each of the light emitting cells S1 and S2 but is not limited thereto and may be located in a central region of each of the light emitting cells S1 and S2. The current blocking layer 60a may be formed of an insulating material, and may particularly include a distributed Bragg reflector in which layers having different refractive indices are alternately laminated.

On the other hand, the insulating layer 60b covers a part of the side surface of the first light emitting cell S1. 4 and 5, the insulating layer 60b may extend to a region between the first light emitting cell S1 and the second light emitting cell S2, and further, The lower semiconductor layer 55 may be formed of a semiconductor material. The insulating layer 60b may be formed of the same structure and the same material as the current blocking layer 60a and may include, but is not limited to, a distributed Bragg reflector. The insulating layer 60b may be formed of another material by a different process from the current blocking layer 60a. However, when the insulating layer 60b includes a multi-layer distributed Bragg reflector, occurrence of defects such as pin holes in the insulating layer 60b can be effectively suppressed. The insulating layer 60b may be continuously connected to the current blocking layer 60a, but the present invention is not limited thereto. The insulating layer 60b and the current blocking layer 60a may be disposed apart from each other.

The wiring 65 electrically connects the first light emitting cell S1 and the second light emitting cell S2. The wiring 65 includes a first connecting portion 65p and a second connecting portion 65n. The first connecting portion 65p is electrically connected to the transparent electrode layer 61 on the first light emitting cell S1 and the second connecting portion 65n is electrically connected to the lower semiconductor layer 55 of the second light emitting cell S2 Respectively. The first connection part 65p may be arranged close to one side edge of the first light emitting cell S1, but it is not limited thereto and may be disposed in the central area of the first light emitting cell S1.

The second connection portion 65n may contact the inclined side surface of the second light emitting cell S2 and particularly the inclined side surface of the lower semiconductor layer 55 of the second light emitting cell S2. 4, the second connecting portion 65n may extend to both sides along the periphery of the second light emitting cell S2 and may be in electrical contact with the inclined side surface of the lower semiconductor layer 55. [ The first light emitting cell S1 and the second light emitting cell S2 are connected in series by the first and second connecting portions 65p and 65n of the wiring 65. [

The wiring 65 can contact the transparent electrode layer 61 in the entire area overlapping the transparent electrode layer 61. [ A portion of the insulating layer 33 is located between the transparent electrode layer 31 and the wiring 35 in the prior art. In this embodiment, however, the wiring 65 and the transparent electrode layer 61 have no insulating material Can be contacted directly without.

The current blocking layer 60a may be positioned over the entire region where the wiring 65 and the transparent electrode layer 61 overlap each other. Further, the current blocking layer 60a may be positioned over the whole region where the wiring 65 and the first light emitting cell S1 overlap each other. The current blocking layer 60a and the insulating layer 60b may be located over the region. The insulating layer 60b may be located between the second light emitting cell S2 and the wiring 65 in a region other than the region where the wiring 65 is connected to the second light emitting cell S2.

4, the first connecting portion 65p and the second connecting portion 65n of the wiring 65 are connected to each other through two paths, but they may be connected through one path.

On the other hand, in the case where the current blocking layer 60a and the insulating layer 60b have a reflection characteristic like the distributed Bragg reflector, the current blocking layer 60a and the insulating layer 60b are formed in a region It is preferable to be located within the same area as the wiring 65 area. The current blocking layer 60a and the insulating layer 60b block the light emitted from the active layer 57 from being absorbed by the wiring 65 but can prevent the light from being emitted to the outside when it is excessively wide, It is necessary to limit the area.

On the other hand, the insulating protection layer 63 may be located outside the region of the wiring 65. The insulating protection layer 63 covers the first and second light emitting cells S1 and S2 outside the region of the wiring 65. [ The insulating protective layer 63 may be formed of a silicon oxide film (SiO 2 ) or a silicon nitride film. The insulating protective layer 63 has openings exposing the transparent electrode layer 61 on the first light emitting cells S1 and the lower semiconductor layers of the second light emitting cells S2 together and the wirings 65 are located in the openings .

The side surfaces of the insulating protection layer 63 and the side surfaces of the wiring 65 may be opposed to each other and may be in contact with each other. Alternatively, the side surfaces of the insulating protection layer 63 and the wiring 65 may be spaced apart from each other.

The second connection portion 65n of the wiring 65 is in electrical contact with the inclined side surface of the second light emitting cell S2 so that the second semiconductor chip 55 of the second light emitting cell S2 There is no need to expose the upper surface. Therefore, it is not necessary to partially remove the second semiconductor layer 59 and the active layer 57, and as a result, the effective light emitting area of the light emitting diode can be increased.

In addition, the current blocking layer 60a and the insulating layer 60b may have the same material and the same structure, and thus may be formed together by the same process. Since the wiring 65 is disposed in the opening of the insulating protection layer 63, the insulating protection layer 63 and the wiring 65 can be formed using the same mask pattern.

Although two light emitting cells of the first light emitting cell S1 and the second light emitting cell S2 are exemplified in the present embodiment, the present invention is not limited to the two light emitting cells, Can be electrically connected to each other by the wirings (65). For example, the wirings 65 may electrically connect the lower semiconductor layers 55 and the transparent electrode layers 61 of neighboring light emitting cells to form a serial array of light emitting cells. A plurality of such arrays may be formed, and a plurality of arrays may be connected in antiparallel to each other and connected to an AC power source to be driven. Further, a bridge rectifier (not shown) connected to the serial array of the light emitting cells may be formed, and the light emitting cells may be driven by the bridge rectifier under the AC power. The bridge rectifier can be formed by connecting the light emitting cells having the same structure as the light emitting cells S1 and S2 using the wirings 65. [

6 to 12 are sectional views for explaining a method of manufacturing a light emitting diode according to an embodiment of the present invention.

6, a semiconductor laminated structure 56 including a lower semiconductor layer 55, an active layer 57, and an upper semiconductor layer 59 is formed on a substrate 51. Further, the buffer layer 53 may be formed on the substrate 51 before the lower semiconductor layer 55 is formed.

The substrate 51 is a sapphire (Al 2 O 3), silicon carbide (SiC), zinc oxide (ZnO), silicon (Si), gallium arsenide (GaAs), gallium phosphide (GaP), lithium-alumina (LiAl 2 O 3 ), boron nitride (BN), aluminum nitride (AlN), or gallium nitride (GaN) substrate, but may be variously selected depending on the material of the semiconductor layer to be formed on the substrate 51 have. In addition, the substrate 51 may have a concavo-convex pattern on the upper surface, such as a patterned sapphire substrate.

The buffer layer 53 is formed to relax the lattice mismatch between the substrate 51 and the semiconductor layer 55 to be formed thereon and may be formed of gallium nitride (GaN) or aluminum nitride (AlN), for example. When the substrate 51 is a conductive substrate, the buffer layer 53 is preferably formed of an insulating layer or a semi-insulating layer, and may be formed of AlN or semi-insulating GaN.

The lower semiconductor layer 55, the active layer 57 and the upper semiconductor layer 59 may be formed of a gallium nitride semiconductor material, that is, (Al, In, Ga) N. The lower and upper semiconductor layers 55 and 59 and the active layer 57 may be formed using metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy, or hydride vapor phase epitaxy (HVPE) Or intermittently or continuously.

Here, the lower and upper semiconductor layers are described as being n-type and p-type, respectively, but vice versa. In the gallium nitride-based compound semiconductor layer, the n-type semiconductor layer may be formed by doping silicon (Si) as an impurity, for example, and the p-type semiconductor layer may be formed by doping magnesium (Mg) as an impurity.

Referring to FIG. 7, a plurality of light emitting cells S1 and S2 spaced apart from each other are formed using a photolithography process and an etching process. Each of the light emitting cells S1 and S2 is formed to have an inclined side face. In the conventional method of manufacturing a light emitting diode, a photo and etching process is added to partially expose the upper surface of the lower semiconductor layer 55 of each of the light emitting cells S1 and S2. However, in the embodiment of the present invention, the photographing and etching process for partially exposing the upper surface of the lower semiconductor layer 55 is omitted.

Referring to FIG. 8, an insulating layer 60b covering a part of the side surface of the first light emitting cell S1 is formed together with the current blocking layer 60a covering a part of the first light emitting cell S1. The insulating layer 60b may also extend to cover a region between the first and second light emitting cells S1 and S2 and may further include a second semiconductor layer A part of the side surface can be covered.

The current blocking layer 60a and the insulating layer 60b may be formed by depositing a layer of insulating material and patterning it using a photolithography and etching process. Alternatively, the current blocking layer 60a and the insulating layer 60b may be formed of a layer of insulating material using a lift-off technique. In particular, the current blocking layer 60a and the insulating layer 60b may be formed of distributed Bragg reflectors in which layers having different refractive indexes, for example, SiO2 and TiO2, are alternately laminated. When the insulating layer 60b is formed of a multi-layer distributed Bragg reflector, it is possible to prevent a defect such as a pinhole from being generated in the insulating layer 60b, so that the insulating layer 60b has a relatively thin thickness .

The current blocking layer 60a and the insulating layer 60b may be connected to each other as shown in FIG. 8, but the present invention is not necessarily limited thereto.

Subsequently, a transparent electrode layer 61 is formed on the first and second light emitting cells S1 and S2. The transparent electrode layer 61 may be formed of a conductive oxide such as indium tin oxide (ITO) or zinc oxide or a metal layer such as Ni / Au. The transparent electrode layer 61 is connected to the upper semiconductor layer 59 and a part of the transparent electrode layer 61 is located on the current blocking layer 60a. The transparent electrode layer 61 may be formed using a lift-off technique, but not limited thereto, and may be formed using a photolithography and etching process.

Referring to FIG. 9, an insulating protective layer 63 covering the first and second light emitting cells S1 and S2 is formed. The insulating protective layer 63 covers the transparent electrode layer 61 and the insulating layer 60b. Furthermore,. The insulating protection layer 63 may cover the entire area of the first light emitting cell S1 and the second light emitting cell S2. The insulating protective layer 63 is formed of a layer of an insulating material such as a silicon oxide film or a silicon nitride film using a chemical vapor deposition technique.

Referring to FIG. 10, a mask pattern 70 having an opening on the insulating protection layer 63 is formed. The opening portion of the mask pattern 70 corresponds to the wiring region. Subsequently, a portion of the insulating protection layer 63 is etched using the mask pattern 70 as an etching mask. This exposes a portion of the transparent electrode layer 61 and the insulating layer 60b to the insulating protection layer 63 and exposes an inclined side surface of the lower semiconductor layer 55 of the second light emitting cell S2 .

11, a wiring 65 is formed in the opening of the mask pattern 70 by depositing a conductive material in a state where the mask pattern 70 remains. At this time, a portion 65a of the conductive material may be deposited on the mask pattern 70. The conductive material may be formed using plating, electron beam evaporation, or sputtering techniques.

Referring to FIG. 10, a portion 65a of the conductive material on the mask pattern 70 is removed together with the mask pattern 70. Thus, the wiring 65 for electrically connecting the first and second light emitting cells S1 and S2 is completed.

The first connecting portion 65p of the wiring 65 is connected to the transparent electrode layer 61 of the first light emitting cell S1 and the second connecting portion 65n is connected to the lower semiconductor layer of the second light emitting cell S2 55). The first connecting portion 65p of the wiring 65 may be connected to the transparent electrode layer 60a in the upper region of the current blocking layer 60a. The wiring 65 is separated from the side surface of the first light emitting cell S1 by the insulating layer 60b.

In this embodiment, the current blocking layer 60a and the insulating layer 60b are formed by the same process. Thus, the insulating protection layer 63 and the wiring 65 can be formed using the same mask pattern 70. Therefore, the light-emitting diode can be formed through the same number of exposure steps while adding the current blocking layer 60a Can be manufactured.

13 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention.

Referring to FIG. 13, the light emitting diode is substantially similar to the light emitting diode described with reference to FIGS. 4 and 5, but differs in that it further includes a transparent conductive layer 62.

The substrate 51, the light-emitting cells S1 and S2, the buffer layer 53, the transparent electrode layer 61, the current blocking layer 60a, the insulating layer 60b, the insulating protective layer 63, 4 and 5, detailed description thereof will be omitted.

The transparent conductive layer 62 is located between the insulating layer 60b and the wiring 65. The transparent conductive layer 62 has a narrower width than the insulating layer 60b and thus can prevent the upper semiconductor layer 59 and the lower semiconductor layer 55 from being electrically short-circuited due to the transparent conductive layer 62 .

The transparent conductive layer 62 may be connected to the first transparent electrode layer 61 and may further electrically connect the first transparent electrode layer 61 to the second light emitting cell S2. For example, the end of the transparent conductive layer 62 may be electrically connected to the lower semiconductor layer 55 of the second light emitting cell. In addition, when two or more more than one light emitting cells are connected, the second transparent conductive layer 62 will extend from the second transparent electrode layer 61 on the second light emitting cell S2.

In this embodiment, since the transparent conductive layer 62 is disposed between the wiring 65 and the insulating layer 60b, even when the wiring 65 is broken, current can flow through the transparent conductive layer 62 Whereby the electrical stability of the light emitting diode is improved.

14 to 17 are sectional views for explaining a method of manufacturing a light emitting diode according to another embodiment of the present invention.

Referring to Fig. 14, first, as described with reference to Figs. 6 and 7, a semiconductor laminated structure 56 is formed on a substrate 51, and a plurality of light emitting cells (S1, S2) are formed. 8, an insulating layer 60b covering a part of the side surface of the first light emitting cell S1, together with the current blocking layer 60a covering a part of the first light emitting cell S1, .

As described with reference to FIG. 8, the current blocking layer 60a and the insulating layer 60b may be formed of distributed Bragg reflectors in which layers having different refractive indexes, for example, SiO2 and TiO2 are alternately laminated. When the insulating layer 60b is formed of a multi-layer distributed Bragg reflector, it is possible to prevent a defect such as a pinhole from being generated in the insulating layer 60b, so that the insulating layer 60b has a relatively thin thickness .

Then, a transparent electrode layer 61 is formed on the first and second light emitting cells S1 and S2. The transparent electrode layer 61 may be formed of a conductive oxide such as indium tin oxide (ITO) or zinc oxide or a metal layer such as Ni / Au, as described with reference to Fig. The transparent electrode layer 61 is connected to the upper semiconductor layer 59 and a part of the transparent electrode layer 61 is located on the current blocking layer 60a. The transparent electrode layer 61 may be formed using a lift-off technique, but not limited thereto, and may be formed using a photolithography and etching process.

During formation of the transparent electrode layer 61, a transparent conductive layer 62 is formed together. The transparent conductive layer 62 may be formed together with the same material as the transparent electrode layer 61 through the same process. The transparent conductive layer 62 is formed on the insulating layer 60b and may be connected to the transparent electrode layer 61. [ The end portion of the transparent conductive layer 62 can be electrically connected to the inclined side surface of the lower semiconductor layer 55 of the second light emitting cell S2.

Referring to FIG. 15, an insulating protective layer 63 covering the first and second light emitting cells S1 and S2 is formed. The insulating protective layer 63 covers the transparent electrode layer 61, the transparent conductive layer 62, and the insulating layer 60b. Further, the insulating protection layer 63 may cover the entire area of the first light emitting cell S1 and the second light emitting cell S2. The insulating protective layer 63 is formed of a layer of an insulating material such as a silicon oxide film or a silicon nitride film using a chemical vapor deposition technique.

Referring to FIG. 16, a mask pattern 70 having an opening is formed on the insulating protection layer 63, as described with reference to FIG. The opening portion of the mask pattern 70 corresponds to the wiring region. Subsequently, a portion of the insulating protection layer 63 is etched using the mask pattern 70 as an etching mask. An opening is formed which exposes a part of the transparent electrode layer 61 and the transparent conductive layer 62 and exposes the inclined side surface of the lower semiconductor layer 55 of the second light emitting cell S2. Further, a part of the insulating layer 60b is exposed through the opening.

Referring to FIG. 17, a wiring 65 is formed in the opening of the mask pattern 70 by depositing a conductive material in a state where the mask pattern 70 remains, as described with reference to FIG.

Subsequently, as described with reference to Fig. 12, a portion 65a of the conductive material on the mask pattern 70 is removed together with the mask pattern 70. Then, as shown in Fig. Thus, the wiring 65 for electrically connecting the first and second light emitting cells S1 and S2 is completed.

In the embodiment described with reference to Figs. 6 to 12, the insulating layer 60b may be damaged while the insulating protection layer 63 is etched. For example, when the insulating protection layer 63 is etched using an etching solution such as hydrofluoric acid, the insulating layer 60b including the oxide film may be damaged by the etching solution. In this case, the insulating layer 60b can not insulate the wiring 65 from the first light emitting cell S1, and short-circuiting may occur.

In contrast, in the present embodiment, since the transparent conductive layer 62 is disposed on the insulating layer 60b, the insulating layer 60b under the transparent conductive layer 62 can be protected from etching damage. Therefore, a short circuit by the wiring 65 is prevented.

In this embodiment, the transparent electrode layer 61 and the transparent conductive layer 62 can be formed by the same process. Therefore, the light emitting diode can be manufactured through the same number of exposure steps while adding the transparent conductive layer 62. [

Claims (21)

A first light emitting cell and a second light emitting cell spaced apart from each other on a substrate;
A first transparent electrode layer positioned on the first light emitting cell and electrically connected to the first light emitting cell;
A current blocking layer disposed between the first light emitting cell and the first transparent electrode layer to separate a part of the first transparent electrode layer from the first light emitting cell;
A wiring electrically connecting the first light emitting cell to the second light emitting cell; And
And an insulating layer for separating the wiring from the side surface of the first light emitting cell,
The second light emitting cell has an inclined side surface,
The wiring has a first connecting portion for electrically connecting to the first light emitting cell and a second connecting portion for electrically connecting to the second light emitting cell,
Wherein the first connection portion is in contact with the first transparent electrode layer in the upper region of the current blocking layer and the second connection portion is in contact with the inclined side face of the second light emitting cell. The method according to claim 1,
And the second connection portion contacts the inclined side surface of the second light emitting cell along the periphery of the second light emitting cell. The method according to claim 1,
The first and second light emitting cells each include a lower semiconductor layer, an upper semiconductor layer, and an active layer disposed between the lower semiconductor layer and the upper semiconductor layer,
The upper surface of the lower semiconductor layer is covered by the active layer,
And the second connection portion is connected to a side surface of the lower semiconductor layer. The method according to claim 1,
And the current blocking layer and the insulating layer are connected to each other. The method of claim 4,
Wherein the current blocking layer and the insulating layer comprise a distributed Bragg reflector. The method of claim 5,
Wherein the current blocking layer and the insulating layer are located between the first light emitting cell and the wiring over the entire area where the first light emitting cell and the wiring overlap each other. The method of claim 6,
Further comprising an insulating protective layer covering the first light emitting cell and the second light emitting cell,
Wherein the insulating protection layer is located outside the region where the wiring is formed. The method according to claim 1,
And a first transparent conductive layer positioned between the insulating layer and the wiring. The method of claim 8,
And the first transparent conductive layer is connected to the first transparent electrode layer. The method according to claim 1,
Wherein the wiring and the first transparent electrode layer are directly connected to each other without interposing an insulating material over the entire area overlapping each other. The method of claim 10,
Wherein the current blocking layer is located at least below a region where the first transparent electrode layer and the wiring are connected. The method of claim 10,
Wherein the first light emitting cell and the second light emitting cell have the same structure. A first light emitting cell and a second light emitting cell spaced apart from each other on a substrate, wherein the first and second light emitting cells have slanted sides,
Forming a current blocking layer covering a part of the upper portion of the first light emitting cell,
A first transparent electrode layer electrically connected to the first light emitting cell is formed, and a part of the first transparent electrode layer is formed on the current blocking layer,
And forming a wiring for electrically connecting the first light emitting cell and the second light emitting cell,
The wiring has a first connecting portion for electrically connecting to the first light emitting cell and a second connecting portion for electrically connecting to the second light emitting cell,
Wherein the first connecting portion is in contact with the first transparent electrode layer in the upper region of the current blocking layer and the second connecting portion is in contact with the inclined side face of the second light emitting cell. 14. The method of claim 13,
Further comprising forming an insulating layer covering a part of a side surface of the first light emitting cell, wherein the insulating layer is formed together with the current blocking layer. 15. The method of claim 14,
Wherein the current blocking layer and the insulating layer comprise a distributed Bragg reflector. 15. The method of claim 14,
Further comprising forming an insulating protective layer before forming the wiring, wherein the insulating protective layer has an opening exposing a region where a wiring is to be formed. 18. The method of claim 16,
The formation of the insulating protective layer may include:
Forming a layer of an insulating material covering the first light emitting cell and the second light emitting cell,
Forming a mask pattern having an opening in a region where a wiring is to be formed on the insulating material layer,
And etching the layer of insulating material using the mask pattern as an etching mask. 18. The method of claim 17,
Further comprising forming a first transparent conductive layer on the insulating layer, wherein the first transparent conductive layer is formed together with the first transparent electrode layer. 19. The method of claim 18,
And the first transparent conductive layer is connected to the first transparent electrode layer. 18. The method of claim 17,
Wherein the wiring is formed by a lift-off technique using the mask pattern after the insulating protective layer is formed. 14. The method of claim 13,
The first and second light emitting cells each include a lower semiconductor layer, an upper semiconductor layer, and an active layer disposed between the lower semiconductor layer and the upper semiconductor layer,
And the second connection portion of the wiring is in contact with the side surface of the lower semiconductor layer of the second light emitting cell.
KR1020130032481A 2012-12-21 2013-03-27 Light emitting diode and method of fabricating the same KR20140117791A (en)

Priority Applications (13)

Application Number Priority Date Filing Date Title
KR1020130032481A KR20140117791A (en) 2013-03-27 2013-03-27 Light emitting diode and method of fabricating the same
PCT/KR2013/011914 WO2014098510A1 (en) 2012-12-21 2013-12-20 Light emitting diode and method of fabricating the same
CN201711161861.8A CN107768399B (en) 2012-12-21 2013-12-20 Light emitting diode
CN201380066443.4A CN104885236B (en) 2012-12-21 2013-12-20 Light emitting diode
US14/135,925 US9093627B2 (en) 2012-12-21 2013-12-20 Light emitting diode and method of fabricating the same
DE112013006123.6T DE112013006123T5 (en) 2012-12-21 2013-12-20 Light-emitting diode and method for its production
TW102147821A TWI601320B (en) 2012-12-21 2013-12-23 Light emitting diode
US14/459,887 US9356212B2 (en) 2012-12-21 2014-08-14 Light emitting diode and method of fabricating the same
US14/791,824 US9287462B2 (en) 2012-12-21 2015-07-06 Light emitting diode and method of fabricating the same
US15/013,708 US9379282B1 (en) 2012-12-21 2016-02-02 Light emitting diode and method of fabricating the same
US15/147,619 US9735329B2 (en) 2012-12-21 2016-05-05 Light emitting diode
US15/150,863 US9634061B2 (en) 2012-12-21 2016-05-10 Light emitting diode
US15/663,219 US10256387B2 (en) 2012-12-21 2017-07-28 Light emitting diode

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170004788A (en) * 2015-07-03 2017-01-11 서울반도체 주식회사 Backlight module with mjt led and backlight unit having the same
KR20170010456A (en) * 2015-07-16 2017-02-01 서울반도체 주식회사 Backlight module with mjt led and backlight unit having the same
WO2016209025A3 (en) * 2015-06-26 2017-02-16 서울반도체 주식회사 Backlight unit using multi-cell light emitting diode
US9769897B2 (en) 2015-06-26 2017-09-19 Seoul Semiconductor Co., Ltd. Backlight unit using multi-cell light emitting diode
US11380818B2 (en) 2019-12-03 2022-07-05 Samsung Electronics Co., Ltd. Semiconductor light emitting device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016209025A3 (en) * 2015-06-26 2017-02-16 서울반도체 주식회사 Backlight unit using multi-cell light emitting diode
US9769897B2 (en) 2015-06-26 2017-09-19 Seoul Semiconductor Co., Ltd. Backlight unit using multi-cell light emitting diode
US10051705B2 (en) 2015-06-26 2018-08-14 Seoul Semiconductor Co., Ltd. Backlight unit using multi-cell light emitting diode
US10091850B2 (en) 2015-06-26 2018-10-02 Seoul Semiconductor Co., Ltd. Backlight unit using multi-cell light emitting diode
KR20170004788A (en) * 2015-07-03 2017-01-11 서울반도체 주식회사 Backlight module with mjt led and backlight unit having the same
KR20170010456A (en) * 2015-07-16 2017-02-01 서울반도체 주식회사 Backlight module with mjt led and backlight unit having the same
US11380818B2 (en) 2019-12-03 2022-07-05 Samsung Electronics Co., Ltd. Semiconductor light emitting device

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