KR20150133312A - Cladding material and method for manufacturing the same, and heat sink using the cladding material - Google Patents

Abstract

The present invention relates to a clad material in which at least one first layer and at least one second layer are alternately stacked wherein the first layer is made of copper or a copper alloy and the second layer is made of metal or an alloy with a thermal expansion coefficient smaller than the first layer, a manufacturing method thereof, and a heat radiation board using the clad material. The number of stacked first and second layers is at least five in the clad material. A volume ratio of the second layer to the entire clad material is 12 to 25%.

Description

CLAIMS AND METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING THE CLADDING MATERIAL,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat-dissipating substrate material used in a semiconductor package for mounting a semiconductor device, and more particularly to a clad material having a laminate structure, a method of manufacturing the same, and a heat-

In the semiconductor package, the heat dissipation substrate is bonded to the semiconductor element or the ceramic substrate to induce heat generated from the semiconductor element to be smoothly emitted.

BACKGROUND ART [0002] Various types of materials and structures have been adopted for a semiconductor package for a semiconductor package in order to maintain the performance of semiconductor devices.

For example, a composite material in which molybdenum (Mo) or tungsten (W) powder is sintered at high temperature to form a porous sintered body and copper (Cu) is injected into the sintered body, There is a limit to use in high power, high capacity semiconductor packages.

As Cu-Mo (MoCu) -Cu clad material, Cu-Mo-Cu material is generally called CMC and Cu-MoCu-Cu material is called CPC. These clad materials are mainly produced by hot rolling, and they are named as volume ratio and CMC111, CMC121, CPC141, CPC121, and CPC111 are mainly used. As with Mo (W) -Cu composite materials, there is a limit to increase the content of Cu, which limits its use in high power, high capacity semiconductor packages.

In addition, Cu-Mo-Cu-Cu Cu clad material mainly consists of three layers of CMC and CPC. Compared with the conventional CMC and CPC, Super CMC). For example, in Patent Document 1, a super CMC clad material including two or more Mo layers is shown. By lowering the volume ratio occupied by the Mo layer to 10% or less, a high thermal conductivity and a low thermal expansion coefficient are exhibited. However, this also has a problem that the thermal expansion coefficient becomes too large as Mo content decreases, and there is a weak point in the heat transfer characteristic in the vertical direction (thickness direction) which is a disadvantage of the clad material such as CMC and CPC materials.

Since the heat dissipation substrate is positioned below the semiconductor device, the heat transfer characteristic in the vertical direction (thickness direction) is more important than the heat transfer property in the horizontal direction (longitudinal direction).

Further, since the heat dissipation substrate is bonded to the ceramic substrate, thermal stress may be generated between the heat dissipation substrate and the ceramic substrate due to the difference in thermal expansion coefficient between the heat dissipation substrate and the ceramic substrate. Such a thermal stress may cause cracks in the ceramic substrate or damage the junction between the heat dissipation substrate and the ceramic substrate, thereby deteriorating the reliability of the semiconductor package and shortening the life of the product.

Therefore, the heat dissipation substrate should have excellent thermal matching with the ceramic substrate by alleviating the thermal stress generated by the difference in thermal expansion coefficient between the ceramic substrate and the ceramic substrate, which is similar to that of the ceramic substrate.

Accordingly, there is a demand for a material for a heat dissipation substrate and a manufacturing method thereof that can solve the above problems.

Open Patent No. 10-2008-0063327 (Published on July 3, 2008)

The present invention provides a clad material having a thermal expansion coefficient similar to that of a ceramic substrate, a method of manufacturing the clad material, and a heat radiation substrate using the same.

Further, the present invention provides a clad material, a method of manufacturing the same, and a heat radiation substrate using the same, for minimizing thermal deformation of a ceramic substrate while efficiently dissipating heat generated from a semiconductor device of high output and large capacity.

One aspect of the present invention is a clad material in which at least one first layer made of copper or a copper alloy and at least one second layer made of a metal or an alloy having a thermal expansion coefficient lower than that of the first layer are alternately laminated, Wherein the first layer and the second layer are stacked in a total of five layers or more, and the volume ratio of the second layer to the entire clad material is 12 to 25%.

The second layer may be made of at least one selected from molybdenum, molybdenum alloy, tungsten, tungsten alloy, Kovar, Invar and Alloy 42.

The molybdenum alloy may be a Mo-Cu alloy having a Cu content of 15 to 50 wt%.

The second layer may have a thickness of 0.05 to 0.20 mm.

The thickness ratio of the outermost layer of the first layer to the entire clad material may be 25 to 50%.

The clad material may have a thermal conductivity of 300 to 380 W / m · K in the horizontal direction and 200 to 350 W / m · K in the vertical direction.

The clad material may have a thermal expansion coefficient of 8 to 12 ppm / ° C at a temperature of 25 to 800 ° C.

Another aspect of the present invention is a method for manufacturing a semiconductor device, comprising: laminating at least one first layer made of copper or a copper alloy and at least one second layer made of a metal or an alloy having a thermal expansion coefficient lower than that of the first layer alternately, There is provided a method for producing a clad material, wherein a total of five layers or more of the first layer and the second layer are stacked, and a volume ratio of the second layer to the entire clad material is 12 to 25% .

The integrating means may be hot isostatic pressing (HIP), hot rolling or hot pressing.

The hot isostatic pressing may be performed at a temperature of 900 to 1050 DEG C and a pressure of 500 to 2000 bar.

The second layer may be made of at least one selected from molybdenum, molybdenum alloy, tungsten, tungsten alloy, Kovar, Invar and Alloy 42.

The molybdenum alloy may be a Mo-Cu alloy having a Cu content of 15 to 50 wt%.

The second layer may have a thickness of 0.05 to 0.20 mm.

The thickness ratio of the outermost layer of the first layer to the entire clad material may be 25 to 50%.

The clad material may have a thermal conductivity of 300 to 380 W / m · K in the horizontal direction and 200 to 350 W / m · K in the vertical direction.

The clad material may have a thermal expansion coefficient of 8 to 12 ppm / ° C at a temperature of 25 to 800 ° C.

Another aspect of the present invention provides a heat dissipation substrate including a clad material according to the present invention.

According to another aspect of the present invention, there is provided a semiconductor package including a heat dissipation substrate according to the present invention, a ceramic substrate having a cavity formed at a central portion thereof and formed on an upper surface of the heat dissipation substrate, and a semiconductor element mounted on the cavity of the ceramic substrate Lt; / RTI >

The clad material according to the present invention is excellent in heat combination with a ceramic substrate, and thus a reliable package can be manufactured in which a ceramic substrate is not cracked or broken during manufacture of a package for a semiconductor device. The clad material according to the present invention can be used as a heat- It is possible to efficiently dissipate heat generated from a semiconductor device having a high output and a large capacity while minimizing thermal deformation and breakage of the device.

1 is a three-dimensional structure of a semiconductor package using a ceramic substrate.
2 is a schematic cross-sectional view illustrating a laminated structure of a clad material according to an embodiment of the present invention.
3 is a cross-sectional view illustrating a semiconductor package according to an embodiment of the present invention.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same components are denoted by the same reference symbols whenever possible. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.

1 is a three-dimensional structure showing a laminated structure of a semiconductor package 10 using a ceramic substrate. The semiconductor package 10 for mounting the elements 11 such as silicon (Si), gallium nitride (GaN), and gallium arsenide (GaAs) is provided with a semiconductor pattern 11 A lead frame 14 connected to the pattern 15 for electrical connection, a gold wire 16 electrically connecting the lead frame 14 and the semiconductor element 11, And a heat dissipating substrate 13 provided below the semiconductor device 11. The heat dissipating substrate 13 emits heat generated from the semiconductor device 11 by the operation of the semiconductor device 11. [

The clad material according to an embodiment of the present invention can be used as a heat radiation substrate material used in a semiconductor package using a ceramic substrate.

2 is a cross-sectional view of a clad material 20 according to an embodiment of the present invention. The clad material 20 according to the embodiment of the present invention includes at least one first layer 21 and at least one second layer 22 made of a metal or alloy having a thermal expansion coefficient lower than that of the first layer Structure, and the first layer 21 and the second layer 22 may be stacked in a total of five layers or more.

The first layer 21 functions to transfer heat generated in the semiconductor element and the second layer 22 functions to suppress thermal expansion due to heat transmitted from the semiconductor element.

Generally, since the second layer 22 has a lower thermal conductivity than the first layer 21, if the volume ratio of the second layer 22 is excessively increased, the thermal resistance of the clad material 20 increases, It is desirable to minimize the volume ratio of the second layer 22. However, if the volume ratio of the second layer 22 is too low, there is a problem that a crack is generated in the ceramic substrate due to thermal stress and thermal deformation, or a bonding site with the ceramic substrate is damaged.

Accordingly, the inventors of the present invention have made efforts to produce a clad material having a high thermal conductivity and a low thermal expansion coefficient while optimizing the volume ratio of the second layer 22 to a certain range, And the present invention has been completed through related experiments.

The first layer 21 is preferably made of a material having a high thermal conductivity because it transfers heat generated in the semiconductor device. Such a material is preferably copper (Cu) or a Cu alloy.

It is preferable that the second layer 22 is made of a material having a low thermal expansion coefficient because it suppresses thermal expansion due to heat transmitted from the semiconductor element. Such materials include molybdenum or molybdenum alloys, tungsten or tungsten alloys, Kovar (Fe-29% Ni-17% Co alloys), Invar (Fe-36% Ni alloys), alloys 42 -42% Ni) and the like can be used. As the molybdenum alloy, a Mo-Cu alloy may be used, and in particular, a Mo-Cu alloy having a Cu content of 15 to 50 wt%. As the tungsten alloy, a W-Cu alloy may be used.

And the volume ratio of the second layer 22 to the entire clad material 20 is 12 to 25%. The second layer 22 has a thermal conductivity lower than that of the first layer 21 and has a small thermal expansion coefficient so that the ceramic substrate 20 bonded to the clad material 20 due to thermal deformation when the volume ratio of the second layer 22 is less than 12% And the volume of the second layer 22 exceeds 25%, the thermal resistance of the clad material 20 increases, and the heat transfer characteristics are deteriorated.

The thickness of the second layer 22 per layer may be 0.05 to 0.2 mm. If the thickness is smaller than the above-mentioned range, heat transfer characteristics are improved, but the coefficient of thermal expansion is too large, which causes cracks in the ceramics when bonded to the ceramic. If the thickness is larger than the above range, heat transfer characteristics are lowered . The thickness per layer of the second layer 22 is preferably adjusted by appropriately adjusting within the above-mentioned range in consideration of these problems.

The clad material 20 in which the first layer 21 and the second layer 22 are laminated in five or more layers may have a total thickness of 1.0 to 2.0 mm.

The thickness ratio of the outermost layer of the first layer 21 to the entire clad material is 25% or more. If the thickness ratio of the outermost first layer 21 is less than 25%, the first layer 21, which is a relatively soft material, does not sufficiently absorb the stress generated by thermal expansion and heat shrinkage, and cracks are generated in the ceramic upon bonding with the ceramic . The upper limit of the thickness ratio of the outermost first layer 21 is not particularly limited and it is advantageous to prevent cracking of the bonded ceramic as the value is larger. However, considering the thickness of the clad material required for the semiconductor package, .

The clad material 20 thus formed has a thermal expansion coefficient of 8 to 12 ppm / 占 폚 at a temperature of 25 to 800 占 폚. Considering that an alumina ceramic substrate is generally used in a semiconductor package using a ceramic substrate and its thermal expansion coefficient is 6-9 ppm / DEG C, the thermal expansion coefficient of the clad material 20 according to the present invention is very close to the thermal expansion coefficient of the ceramic substrate As shown in FIG. The thermal expansion coefficient of the clad material 20 is close to that of the ceramic substrate, so that the thermal expansion coefficient of the clad material 20 becomes substantially the same as the thermal deformation of the ceramic substrate, so that the occurrence of cracks in the ceramic substrate is suppressed and the bonding site with the ceramic substrate is not damaged.

Further, the clad material 20 has an excellent thermal conductivity of 300 to 380 W / m · K in the horizontal direction and 200 to 350 W / m · K in the vertical direction. Therefore, the semiconductor device can be safely protected while efficiently dissipating the heat generated from the semiconductor device with high output and large capacity, and it is possible to operate for a long period of time.

Hereinafter, a method of manufacturing the clad material 20 of the present invention will be described.

First, a first layer (21) of a predetermined thickness and a second layer (22) of a predetermined thickness made of a metal or alloy having a thermal expansion coefficient lower than that of the first layer are prepared. The first layer 21 and the second layer 22 are formed by using the materials of the first layer 21 and the second layer 22 as described above and the volume ratio of the second layer to the entire clad material is 12 to 25 %.

A laminate is formed by laminating the first layer 21 and the second layer 22 in total in a total of five or more layers, and then the clad material 20, which is an integrated laminate by applying a temperature and a pressure in an inert gas atmosphere or vacuum, . The clad material 20 may have a total thickness of 1.0 to 2.0 mm.

Various means such as hot isostatic pressing (HIP), hot rolling or hot pressing may be employed as the means for integration.

Hot isostatic pressing (HIP) can be performed at a temperature range of 900-1050 ° C and a pressure range of 500-2000 bar. Maintaining the temperature and the pressure within the above range is for preventing defective bonding between the first layer 21 and the second layer 22. If the temperature and / or the pressure is higher than the above range, there is a problem that the thickness of the first layer 21 becomes uneven due to melting of the copper or copper alloy as the material of the first layer 21.

Hereinafter, a semiconductor package using the clad material 20 of the present invention will be described.

3 is a cross-sectional view showing a semiconductor package according to an embodiment of the present invention.

Referring to FIG. 3, the semiconductor package 30 according to the embodiment of the present invention includes a heat dissipation substrate 33, a ceramic substrate 32 having a cavity formed at the center thereof and formed on the upper surface of the heat dissipation substrate, And a semiconductor element 31 mounted on the cavity of the substrate.

As the material of the heat dissipation substrate 33, the clad material 20 already described above is applied.

Alumina (Al ₂ O ₃ ), aluminum nitride (AlN), silicon carbide (SiC), or the like, which is aluminum oxide, may be used as the material of the ceramic substrate 32.

As the semiconductor element 31, various optical elements or electronic elements can be used. Elements such as silicon (Si), gallium nitride (GaN), and gallium arsenide (GaAs) can be used as devices suitable for high output and large capacity.

(Example)

Hereinafter, the present invention will be described more specifically by way of examples. It should be noted, however, that the following examples are intended to illustrate the invention in more detail and not to limit the scope of the invention.

(1) A clad material in which a Cu first layer and an Mo second layer were alternately laminated was prepared, and an alumina substrate was bonded thereon to prepare a semiconductor package having a size of 10 x 10 mm ² . Mo volume ratio, respectively, and 1300 thermal cycling tests (reliability tests) were conducted. The evaluation results are shown in Table 1.

No. division thickness
(Mm) Mo volume ratio (%) LAYER structure product
Production quantity (ea) Thermal Cycle 1300 times, PASS quantity
(ea) Cu Mo Cu Mo Cu Mo Cu Mo Cu One S-CMC 1.5 6.7% 0.1 0.025 0.4 0.025 0.4 0.025 0.4 0.025 0.1 15 0 2 S-CMC 1.5 6.7% 0.5 0.025 0.1 0.025 0.2 0.025 0.1 0.025 0.5 15 0 3 S-CMC 1.52 7.9% 0.5 0.035 0.2 0.05 0.2 0.035 0.5 15 0 4 S-CMC 1.55 9.7% 0.5 0.075 0.4 0.075 0.5 15 0 5 S-CMC 1.55 9.7% 0.4 0.075 0.6 0.075 0.4 15 0 6 S-CMC 1.55 9.7% 0.3 0.075 0.8 0.075 0.3 15 0 7 S-CMC 1.5 13.3% 0.3 0.1 0.7 0.1 0.3 15 2 8 S-CMC 1.5 13.3% 0.4 0.1 0.5 0.1 0.4 15 8 9 S-CMC 1.45 17.2% 0.3 0.1 0.3 0.05 0.3 0.1 0.3 15 5 10 S-CMC 1.45 17.2% 0.4 0.1 0.2 0.05 0.2 0.1 0.4 15 15 11 S-CMC 1.5 18.0% 0.415 0.135 0.4 0.135 0.415 15 15 12 S-CMC 1.5 20.0% 0.2 0.1 0.4 0.1 0.4 0.1 0.2 15 5 13 S-CMC 1.5 20.0% 0.5 0.1 0.1 0.1 0.1 0.1 0.5 15 13

The size of the alumina ceramic substrate used in this test was 10 × 10 ㎜ ² , which is the same size as the clad material. The thickness was 0.5t (㎜) and the thermal cycle condition was 65 ~ + 150 ℃.

No. 1 to 6 were packages using a clad material having Mo contents of 6.7%, 7.9% and 9.7%, respectively, in which the volume ratio of Mo was less than 12%.

No. 7 to 13 were packages using a clad material having a volume ratio of Mo of 12% or more, and it was confirmed that some of them could endure a heat cycle test.

(2) From the results shown in Table 1, it was confirmed that the thickness of the outermost layer of the first layer (Cu layer) influences cracking of the ceramic substrate in addition to the volume ratio of the second layer (Mo layer).

A clad material having a volume ratio of 13.3%, 15%, 16.7%, and 18.4% of the second layer (Mo layer) was manufactured and a semiconductor package of 10x10 mm ² size as in Example (1) And 1300 times of a thermal cycle test (a reliability test). The evaluation results are shown in Table 2.

No. division thickness
(Mm) Mo volume ratio
(%) Outermost
Cu thickness ratio
(%) LAYER (laminated) structure product
Production quantity (ea) Thermal Cycle
1300 times, PASS quantity
(ea) Cu Mo Cu Mo Cu Mo Cu 14 S-CMC 1.5 13.3% 40.0 0.6 0.1 0.1 0.1 0.6 10 10 15 S-CMC 1.5 13.3% 36.7 0.55 0.1 0.2 0.1 0.55 10 10 16 S-CMC 1.5 13.3% 40.0 0.6 0.1 0.1 0.1 0.6 10 10 17 S-CMC 1.5 13.3% 36.7 0.55 0.1 0.2 0.1 0.55 10 10 18 S-CMC 1.5 15.0% 35.8 0.5375 0.075 0.1 0.075 0.1 0.075 0.5375 10 10 19 S-CMC 1.5 15.0% 29.2 0.4375 0.075 0.2 0.075 0.2 0.075 0.4375 10 10 20 S-CMC 1.5 16.7% 38.3 0.575 0.125 0.1 0.125 0.575 10 10 21 S-CMC 1.5 16.7% 35.0 0.525 0.125 0.2 0.125 0.525 10 10 22 S-CMC 1.5 16.7% 35.0 0.525 0.05 0.1 0.15 0.1 0.05 0.525 10 10 23 S-CMC 1.5 16.7% 35.0 0.525 0.075 0.1 0.1 0.1 0.075 0.525 10 10 24 S-CMC 1.5 16.7% 28.3 0.425 0.075 0.2 0.1 0.2 0.075 0.425 10 10 25 S-CMC 1.5 18.4% 34.1 0.51 0.1 0.1 0.075 0.1 0.1 0.51 10 10 26 S-CMC 1.5 18.4% 27.4 0.41 0.1 0.2 0.075 0.2 0.1 0.41 10 10

As a result of the test, the alumina ceramic substrate did not crack when the outermost layer of the first layer (Cu layer) was 25% or more of the total thickness of the clad material. This is because the soft copper absorbs stresses during thermal expansion and heat shrinkage.

The present invention is not limited to the embodiments described above. Accordingly, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.

10, 30: semiconductor package 11, 31: semiconductor device
12, 32: ceramic substrate 13, 33: heat radiation substrate
14, 34: lead frame 15, 35: conductive pattern
16, 36: gold wire
20: clad material 21: first layer
22: Second layer

Claims (12)

1. A clad material in which at least one first layer made of copper or a copper alloy and at least one second layer made of a metal or alloy having a thermal expansion coefficient lower than that of the first layer are alternately laminated,
A total of five layers or more of the first layer and the second layer are laminated
Wherein the volume ratio of the second layer to the entire clad material is 12 to 25%.
The clad material according to claim 1, wherein the second layer is at least one selected from the group consisting of molybdenum, molybdenum alloy, tungsten, tungsten alloy, Kovar, Invar and Alloy 42.
The clad material according to claim 2, wherein the molybdenum alloy is a Mo-Cu alloy having a Cu content of 15 to 50 wt%.
The clad material according to claim 1, wherein the thickness of the second layer is 0.05 to 0.2 mm.
The clad material according to claim 1, wherein the thickness ratio of the outermost layer of the first layer to the entire clad material is 25 to 50%.
The clad material according to claim 1, wherein the thermal conductivity is 300 to 380 W / m · K in the horizontal direction and 200 to 350 W / m · K in the vertical direction.
The clad material according to claim 1, wherein the clad material has a thermal expansion coefficient of 8 to 12 ppm / ° C at a temperature of 25 to 800 ° C.
And at least one second layer made of a metal or an alloy having a coefficient of thermal expansion lower than that of the first layer is alternately laminated and subjected to temperature and pressure to integrate the clad material,
Wherein the first layer and the second layer are stacked in a total of five layers or more, and the volume ratio of the second layer to the entire clad material is 12 to 25%.
The method of manufacturing a clad material according to claim 8, wherein the means for integrating is a hot isostatic pressing (HIP), a hot rolling, or a hot pressing.
10. The method of claim 9, wherein the hot isostatic pressing (HIP) is performed at a temperature of 900 to 1050 < 0 > C and a pressure of 500 to 2000 bar.
A radiator plate comprising the clad material of any one of claims 1 to 7.
A heat dissipation board according to claim 11.
A ceramic substrate having a cavity formed at a central portion thereof and formed on an upper surface of the heat dissipation substrate; And
And a semiconductor element mounted on the cavity of the ceramic substrate.

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