KR20150128036A

KR20150128036A - Low voltage differentail signal transmitter

Info

Publication number: KR20150128036A
Application number: KR1020140054741A
Authority: KR
Inventors: 김태우
Original assignee: (주) 픽셀플러스
Priority date: 2014-05-08
Filing date: 2014-05-08
Publication date: 2015-11-18
Also published as: KR101621844B1; WO2015170845A1; CN106416077A; CN106416077B

Abstract

The present invention relates to a low voltage differential signal transmitter and especially, to a technology enabling the low voltage differential signal transmitter to have output resistance characteristics insensitive to process change. The low voltage differential signal transmitter of the present invention includes: an input driving part which includes a plurality of pre-drivers, and outputs a plurality of driving signals having a pull-up voltage level and a plurality of driving signals having a pull-down voltage level by driving a positive input signal and a negative input signal; a voltage generator which generates a first driving voltage by regulating a power source voltage; and a main driving part which supplies the first driving voltage to a differential output port selectively by including a plurality of switching devices turned on selectively by the driving signals, and makes a turn-on resistance of the switching devices adjusted by the pull-up voltage level and the pull-down voltage level.

Description

[0001] The present invention relates to a low voltage differential signal transmitter,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low voltage differential signal transmitter, and more particularly, to a low voltage differential signal transmitter capable of having an output resistance characteristic insensitive to process variations.

2. Description of the Related Art Generally, an image display device includes a video signal processing body for receiving an image signal (Audio / Video signal) from an airwave, a cable, and other external devices (VCR, DVD, etc.) And a display panel (display panel) for displaying an image on the screen. At this time, the display panel and the video signal processing main body may be integrally formed, or may be separately configured separately.

In addition, the display panel and the image signal processing body generally transmit image signals using a Low Voltage Differential Signal (LVDS) interface. An LVDS interface is a transmission method for sending digital information to a flat panel display at high speed through a copper wire. Here, a low voltage (LV), that is, a low voltage means that the LVDS uses a voltage lower than the standard voltage.

As the demand for high speed data generation and processing has increased recently, the ability to transmit data from one point to another has become a measure of overall system performance. LVDS interfaces are emerging as a solution for such high-speed data transmission.

This LVDS interface is widely used in laptop computers because fewer wires can be used between the motherboard and the panel. In addition, this technique is also used between the image scaler and the panel of a large number of stand-alone flat panel displays.

The LVDS interface method is more noise-resistant than the conventional single-ended signal method, and it is easier to perform signal termination than the pseudo-emitter coupled logic (pECL) Which is a possible serial communication method.

In addition, the LVDS interface uses a low voltage, which reduces electromagnetic interference (EMI) and reduces power consumption. Due to these advantages, the LVDS interface is applied to various fields such as data transmission between chips, as well as data transmission between boards.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a low voltage differential signal transmitter having an output resistance characteristic insensitive to a process change.

A low voltage differential signal transmitter according to an embodiment of the present invention includes a plurality of pre-drivers and drives a positive input signal and a negative input signal to generate a plurality of drive signals having a pull-up voltage level and a plurality of drive signals having a pull- An input driver for outputting an output signal; A voltage generator for generating a first driving voltage by regulating a power supply voltage; And a plurality of switching elements selectively turned on by the plurality of driving signals to selectively supply the first driving voltage to the differential output terminal, and the turn-on resistances of the plurality of switching elements are controlled by the pull-up voltage level and the pull- And a main driving unit to be adjusted.

The present invention can prevent the reflection of a signal that may occur while the transmission speed of the signal becomes high and prevent the transmission of the signal without distortion by preventing the matching characteristic with the characteristic impedance of the transmission line from being affected by the deviation of the semiconductor manufacturing process .

It will be apparent to those skilled in the art that various modifications, additions, and substitutions are possible, and that various modifications, additions and substitutions are possible, within the spirit and scope of the appended claims. As shown in Fig.

1 is a conceptual diagram of a low voltage differential signal transmitter according to an embodiment of the present invention;
Figure 2 is a detailed circuit diagram of the transmitter of Figure 1;
3 is a detailed configuration diagram of the pull-up control unit of FIG.
4 is a detailed configuration diagram of the pull-down control unit of FIG.
5 shows another embodiment of the transmitter of FIG.
6 is a detailed configuration diagram of the pull-up control unit of FIG. 5;
7 is a detailed configuration diagram of the pull-down control unit of FIG.
8 is an operational timing diagram of the transmitter of Fig.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a conceptual diagram of a low voltage differential signal transmitter according to an embodiment of the present invention.

The low-voltage differential signal transmitter is a circuit with high-speed operation, low current consumption and low electromagnetic interference (EMI) characteristics. It is suitable for high-speed operation such as image sensor, LCD Driver IC (LDI) And are used in fields requiring data transmission.

The low voltage differential signal transmitter includes a transmitter 100, a transmission line 200, a receiver 300, and termination resistors 400 and 500.

The transmitter 100 receives data via an input terminal. The data input to the transmitter 100 is transmitted to the receiver 300 in a differential manner via the transmission line 200. Generates a potential difference between the two transmission paths based on data input through the transmitter 100, thereby generating a differential signal. The receiver 300 converts the differential signal received through the transmission line 200 into a CMOS level and outputs the signal through an output terminal.

The transmitter 100 and the receiver 300 are connected through a transmission line 200. Each of the transmission lines 200 has the same electrical characteristics and forms a balanced transmission line so that one signal can be transmitted through two transmission lines.

Then, the impedance of the transmission line 200 is matched to eliminate reflection in the signal transmission process. To this end, a termination resistor 400 is connected to the input of the receiver 300. In addition, a termination resistor 500 for impedance matching may be additionally connected to the output terminal of the transmitter 100.

2 is a detailed circuit diagram of the transmitter 100 of FIG.

The transmitter 100 includes an input driver 110, a voltage generator 120, a main driver 130, and differential output terminals DN and DP.

Here, the input driver 110 includes a plurality of pre-drivers D1 to D4. The pre-drivers D1 and D3 are drivers for driving the pull-up stages of the main driver 130 and the pre-drivers D2 and D4 are drivers for driving the pull-down stages of the main driver 130, respectively.

The pre-driver D1 pre-drives the positive input signal INP to the pull-up voltage Vrup to generate the driving voltage VP1. The pre-driver D2 pre-drives the positive input signal INP to the pull-down voltage Vrdn to generate the driving voltage VP2. The pre-driver D3 pre-drives the negative input signal INN to the pull-up voltage Vrup to generate the driving voltage VN1. The pre-driver D4 pre-drives the sub input signal INN to the pull-down voltage Vrdn to generate the drive voltage VN2.

That is, the pre-drivers D1 and D3 are driven by the pull-up voltage Vrup and the pre-drivers D2 and D4 are driven by the pull-down voltage Vrdn.

The voltage generator 120 generates a driving voltage Vreg of the main driver 130 by regulating the power supply voltage VDD. The voltage generator 120 supplies the generated driving voltage Vreg to the switching elements M 1 and M 2 of the main driver 130.

The main driver 130 includes a plurality of switching elements M1 to M4. The switching devices M1 to M4 may be field effect transistors (FETs).

Here, the switching devices M1 and M3 are serially connected between the application terminal of the driving voltage Vreg and the ground GND voltage terminal. The driving voltage VP1 is applied to the switching element M1 through the gate terminal, and the driving voltage VN2 is applied to the switching element M3 through the gate terminal. The switching elements M2 and M4 are connected in series between the application terminal of the driving voltage Vreg and the ground GND voltage terminal. The driving voltage VN1 is applied to the switching element M2 through the gate terminal, and the driving voltage VP2 is applied to the switching element M4 through the gate terminal.

In the embodiment of FIG. 2, the number of the pre-drivers D1 to D4 corresponds to the number of the switching elements M1 to M4 provided in the main driver 130. That is, the pre-drivers D1 to D4 individually drive and control the switching elements M1 to M4. The number of the switching elements M1 to M4 may be changed to correspond to the number of the pre-drivers D1 to D4.

The common connection node of the switching devices M1 and M3 is connected to the differential output terminal DP, and the common connection node of the switching devices M2 and M4 is connected to the differential output terminal DN. The differential output terminals DN and DP are connected to the transmission line 200.

The turn-on resistance of the switching elements M1 to M4 becomes the output resistance of the transmitter 100. [ The turn-on resistances of the switching elements M1 to M4 are determined by the pull-up voltage Vrup and the pull-down voltage Vrdn.

The transmitter 100 having such a configuration individually adjusts the output voltages VP1, VP2, VN1, and VN2 of the pre-drivers D1 to D4 for driving the switching devices M1 to M4 provided in the main driver 130, respectively. Thus, the turn-on resistances of the switching elements M1 to M4 of the main driver 130 can be kept constant.

For example, when the driving voltage VP1 is the pull-up voltage Vrup and the driving voltage VP2 is the pull-down voltage Vrdn level, the switching elements M1 and M4 are turned on. Then, the driving voltage Vreg output from the voltage generator 120 is output to the differential output terminal DP through the switching device M1. The output signal of the differential output stage DP is input to the differential output terminal DN through the transmission line 200 through the termination resistor 400 and output to the ground voltage GND stage through the switching device M4.

At this time, the current flowing from the drive voltage Vreg to the ground voltage GND terminal becomes (Vreg-GND) / ((M1 turn-on resistance) + (termination resistance) + (M4 turn-on resistance)). When this current is referred to as Iref, the voltage across the differential output stage DP is Vreg-Iref * (M1 turn-on resistance) and the voltage across the differential output stage DN is GND + Iref * (M4 turn-on resistance).

Here, the driving voltages VN1 and VN2 have opposite polarities to the driving voltages VP1 and VP2. When the driving voltages VP1 and VP2 are in the high state, the driving voltages VN1 and VN2 are in the low state, and the switching elements M2 and M3 are turned off.

On the other hand, when the driving voltages VN1 and VN2 are in a high state, the switching elements M2 and M3 are turned on. Thus, the driving voltage Vreg is output to the differential output terminal DN through the switching element M2. The output signal of the differential output terminal DN is input to the differential output terminal DP via the transmission line 200 via the termination resistor 400 and is output to the ground voltage GND terminal through the switching element M3.

At this time, the current flowing from the drive voltage Vreg to the ground voltage GND becomes (Vreg-GND) / ((M2 turn-on resistance) + (termination resistance) + (M3 turn-on resistance)). When this current is referred to as Iref, the voltage across the differential output stage DN will be Vreg-Iref * (M2 turn-on resistance) and the voltage across the differential output stage DP will be GND + Iref * (M3 turn-on resistance).

Here, when the driving voltages VN1 and VN2 are in a high state, the driving voltages VP1 and VP2 are low, and the switching elements M1 and M4 are turned off.

3 is a detailed configuration diagram of the pull-up control unit 111 of FIG.

Up controller 111 generates a pull-up voltage Vrup supplied to the pre-drivers D1 and D3. The pull-up control unit 111 includes a high voltage generator 112, a voltage generator 113, an amplifier 114, a constant current source 115, a switching element M5 and a pull-up voltage generator PU.

Here, the high voltage generator 112 generates a high voltage Vhigh corresponding to the power supply voltage VDD and supplies it to the amplifier 114. The voltage generator 113 regulates the power supply voltage VDD to generate the driving voltage Vreg2 and supplies it to the switching element M5. Here, the driving voltage Vreg2 may have the same voltage level as the driving voltage Vreg.

The amplifier 114 compares and amplifies the high voltage Vhigh and the feedback voltage Vfeedh corresponding to the power supply voltage VDD and outputs the pull-up driving signal VPU. That is, the amplifier 114 receives the high voltage Vhigh through the positive input terminal and receives the feedback voltage Vfeedh through the negative input terminal.

Further, the constant current source 115 is connected between the switching device M5 and the ground GND voltage terminal, and the constant current Iref corresponding to the feedback voltage Vfeedh flows. In addition, the pull-up voltage generating unit PU regulates the pull-up driving signal VPU in response to the power source voltage VDD to generate a pull-up voltage Vrup and supplies the pull-up voltage Vrup to the pre-drivers D1 and D3.

Further, the switching device M5 is connected between the applying end of the driving voltage Vreg2 and the constant current source 115, and the pull-up driving signal VPU is applied through the gate terminal. The switching device M5 is a replica having the same size and the same layout as the switching devices M1 and M2 of FIG. Here, it is assumed that the switching elements M1 and M2 have the same size and the same layout.

If the gain (DC gain) of the amplifier 114 is sufficiently high (for example, 60 dB or more), the level of the pull-up driving signal VPU is adjusted so that the feedback voltage Vfeedh becomes equal to the value of the high voltage Vhigh. At this time, the trun on resistance of the switching element M5 becomes (Vreg2 - Vhigh) / Iref.

The pull-up voltage generator PU regulates the pull-up drive signal VPU thus adjusted to generate the pull-up voltage Vrup. Up voltage generating unit PU supplies the generated pull-up voltage Vrup to the power supplies of the pre-drivers D1 and D3.

The pre-drivers D1 and D3, which receive the pull-up voltage Vrup at the power supply voltage, control the driving of the switching devices M1 and M2 according to the driving voltages VP1 and VN1. That is, the high-state voltage of the drive voltages VP1 and VN1 becomes the pull-up voltage Vrup level.

The turn-on resistance value when the pull-up voltage Vrup is applied to the switching elements M1 and M2 of the main driver 130 is equal to (Vreg2-Vhigh) / Iref, which is equal to the turn-on resistance value of the switching element M5. At this time, the drive voltage Vreg2 preferably has a higher voltage level than the high voltage Vhigh.

The switching device M5 and the amplifier 114 corresponding to the process change of the switching devices M1 and M2 in the embodiment of the present invention and the high voltage Vhigh and the constant current source 115 generated based on the bandgap voltage, , The level of the pull-up voltage Vrup is adjusted so that the output resistance of M2 becomes constant, so that the turn-on resistance value of the switching devices M1 and M2 is not influenced by the process variation.

4 is a detailed configuration diagram of the pull-down control unit 116 of FIG.

The pull-down control unit 116 generates a pull-down voltage Vrdn supplied to the pre-drivers D2 and D4. The pull-down control unit 116 includes a low voltage generator 117, an amplifier 118, a constant current source 119, a switching element M6, and a pull-down voltage generator PD.

Here, the low voltage generator 117 generates the low voltage Vlow corresponding to the power supply voltage VDD and supplies it to the amplifier 118. The amplifier 118 compares and amplifies the low voltage Vlow and the feedback voltage Vfeedl corresponding to the power supply voltage VDD and outputs the pull-down driving signal VPD. That is, the amplifier 118 receives the low voltage Vlow through the negative input terminal and receives the feedback voltage Vfeedl through the positive input terminal.

Further, the constant current source 119 is connected between the power supply voltage VDD application terminal and the switching element M6, and the constant current Iref corresponding to the feedback voltage Vfeedl flows. In addition, the pull-down voltage generating unit PD regulates the pull-down driving signal VPD in response to the power source voltage VDD to generate the pull-down voltage Vrdn and supplies it to the pre-drivers D2 and D4.

The switching device M6 is connected between the constant current source 119 and the ground GND voltage terminal, and the pull-down driving signal VPD is applied through the gate terminal. The switching device M6 is a replica having the same size and the same layout as the switching devices M3 and M4 in Fig. Here, it is assumed that the switching elements M3 and M4 have the same size and the same layout.

If the gain (DC gain) of the amplifier 118 is sufficiently high (for example, 60 dB or more), the level of the pull-down driving signal VPD is adjusted such that the feedback voltage Vfeedl becomes equal to the value of the low voltage Vlow. At this time, the trun on resistance of the switching element M6 becomes Vlow / Iref.

The pull-down voltage generator PD regulates the pull-down driving signal VPD thus adjusted to generate the pull-down voltage Vrdn. The pull-down voltage generator PD supplies the generated pull-down voltage Vrdn to the power supplies of the pre-drivers D2 and D4.

The pre-drivers D2 and D4, which receive the pull-down voltage Vrdn at the power supply voltage, control the driving of the switching devices M3 and M4 in accordance with the driving voltages VP2 and VN2. That is, the high-state voltage of the drive voltages VP2 and VN2 becomes the pull-down voltage Vrdn level.

The turn-on resistance value when the pull-down voltage Vrdn is applied to the switching elements M3 and M4 of the main driver 130 is equal to the turn-on resistance value of the switching element M6 and becomes Vlow / Iref. In accordance with the process change of the switching elements M3 and M4 in the embodiment of the present invention, the switching element M6 and the amplifier 118 and the low voltage Vlow and the constant current source 119, which are generated on the basis of the band gap voltage, The level of the pull-down voltage Vrdn is adjusted so that the output resistance of M4 is constant, so that the turn-on resistance value of the switching elements M3 and M4 is not influenced by the process variation.

FIG. 5 shows another embodiment of the transmitter 100 of FIG.

The transmitter 100_1 according to the embodiment of FIG. 5 includes an input driver 110_1, a voltage generator 120_1, a main driver 130_1, and differential output terminals DN and DP. The embodiment of Fig. 5 has the same structure as the embodiment of Fig. 2 except that the main driving unit 130_1 includes resistors R1 to R4 for preventing ESD (Electro Static Discharge).

A resistor R1 is connected between the switching device M1 and the differential output stage DP. A resistor R2 is connected between the switching device M2 and the differential output terminal DN. A resistor R3 is connected between the switching element M3 and the differential output terminal DP. A resistor R4 is connected between the switching element M4 and the differential output terminal DN. That is, the resistors R2 and R4 are connected between the differential output terminal DN and the switching devices M2 and M4, and the resistors R1 and R3 are connected between the differential output stage DP and the switching devices M1 and M3.

The differential output stages DP and DN are interfaces for connecting the inside and the outside of the semiconductor chip, and ESD (Electro Static Discharge) problems may occur in the differential output stages DP and DN. To cope with this case, the resistors R1 to R4 are connected to the differential output terminals DP and DN connected to the transmission line 200.

The sum of the turn-on resistance of the switching elements M1 to M4 and the resistance value of the resistors R1 to R4 becomes the output resistance of the transmitter 100_1. The turn-on resistances of the switching elements M1 to M4 are determined by the pull-up voltage Vrup and the pull-down voltage Vrdn.

The voltages applied to the differential output stages DP and DN and the constant current sources 115 and 119 are determined by the resistance value of the resistors R1 to R4 for ESD of the main driver 130_1 to turn on resistances of the switching elements M1 to M4 R) can be added. That is, in the case of the output resistance through the switching device M1 and the resistor R1 (the turn-on resistance of the switching device M1 + the resistance value R of the resistor R1).

6 is a detailed configuration diagram of the pull-up control unit 111_1 of FIG.

The embodiment of Fig. 6 has the same structure as that of Fig. 3, but differs from Fig. 3 in that a resistor R5 is additionally provided between the switching element M5 and the constant current source 115. Fig.

If the gain (DC gain) of the amplifier 114 is sufficiently high (for example, 60 dB or more), the level of the pull-up driving signal VPU is adjusted so that the feedback voltage Vfeedh becomes equal to the value of the high voltage Vhigh. At this time, the sum of the resistance of the switching element M5 and the resistance R5 is (Vreg2 - Vhigh) / Iref.

The sum of the turn-on resistance and the resistances R1 and R2 when the pull-up voltage Vrup is applied to the switching elements M1 and M2 of the main driver 130 is equal to the sum of the turn-on resistance of the switching element M5 and the resistance R5 Vreg2-Vhigh) / Iref. At this time, the drive voltage Vreg2 preferably has a higher voltage level than the high voltage Vhigh. In the embodiment of the present invention, the switching elements M5 and R5, which are the copying elements, and the amplifier 114, the high voltage Vhigh generated based on the bandgap voltage, and the constant current source Up resistance of the switching elements M1 and M2 and the sum of the resistances R1 and R2 due to the adjustment of the level of the pull-up voltage Vrup such that the sum of the resistances R1 and R2 of the switching elements M1 and M2 is constant by the resistor 115, It is not affected by the change.

7 is a detailed configuration diagram of the pull-down control unit 116_1 of FIG.

The embodiment of FIG. 7 has the same structure as that of FIG. 4, but differs from FIG. 4 in that a resistor R6 is further provided between the switching element M6 and the constant current source 119. FIG.

If the gain (DC gain) of the amplifier 118 is sufficiently high (for example, 60 dB or more), the level of the pull-down driving signal VPD is adjusted such that the feedback voltage Vfeedl becomes equal to the value of the low voltage Vlow. At this time, the sum of the trun on resistance of the switching element M6 and the resistance R6 becomes Vlow / Iref.

The sum of the turn-on resistance and the resistors R3 and R4 when the pull-down voltage Vrdn is applied to the switching elements M3 and M4 of the main driver 130 is equal to the sum of the turn-on resistance of the switching element M6 and the resistance R6, Iref. In the embodiment of the present invention, the switching element M6, the resistor R6, the amplifier 118, the low voltage Vlow generated based on the band gap voltage, and the constant current source The level of the pull-down voltage Vrdn is adjusted so that the sum of the turn-on resistances of the switching elements M3 and M4 and the sum of the resistors R3 and R4 is fixed by the resistor 119, so that the sum of the turn- It is not affected by the change.

8 is an operational timing diagram of a transmitter 100 according to an embodiment of the present invention.

The positive input signal INP and the negative input signal INN swing between the power supply voltage VDD and the ground voltage GND level. Here, the positive input signal INP and the negative input signal INN have phases opposite to each other.

The driving voltages VP1 and VN1 swing between the pull-up voltage Vrup and the level of the ground voltage GND. Then, the driving voltages VP2 and VN2 swing between the pull-down voltage Vrdn and the ground voltage GND. Here, the driving voltages VP1 and VP2 have opposite phases to the driving voltages VN1 and VN2. It can be seen that the differential output terminals DN and DP, which are the outputs of the transmitter 100, swing between the levels of the high voltage Vhigh and the low voltage Vlow.

Here, the high voltage Vhigh is Vreg-Iref * (M1 turn-on resistance) or Vreg-Iref * (M2 trun on resistance). And, the low voltage Vlow becomes GND + Iref * (M4 turn-on resistance) or GND + Iref * (M3 turn-on resistance). Normally, since the GND is 0V, the low voltage Vlow becomes Iref * (M4 turn-on resistance) or Iref * (M3 turn-on resistance).

For example, in the case of a Mobile Industry Processor Interface (MIPI) used in an LDI (LCD Driver IC) or a mobile image sensor, the driving voltage Vreg is 400 mV, the high voltage Vhigh is 300 mV, and the low voltage Vlow is 100 mV. Then, the termination resistor 300 is set to 100 ohms.

Accordingly, in order to satisfy this specification, the current Iref becomes 2 mA and the turn-on resistance of each of the transistors M1 to M4 should be 50 ohm. At this time, the characteristic impedance matching of the transmission line 200 is also satisfied . At this time, the output resistance of the transmitter 100 becomes 50 ohm.

In the embodiment of FIG. 5, the sum of the turn-on resistance of each of the transistors M1 to M4 and the resistance R for ESD should be 50 ohm. However, when the turn-on resistance of the transistors M1 to M4 or the resistance R for ESD depends on the deviation of the semiconductor manufacturing process, if the semiconductor manufacturing process is varied, the output resistance of the transmitter 100 . &Lt; / RTI >

In the case of MIPI, the output resistance specification is at least 40 ohm and the maximum is 62.5 ohm. In addition, the characteristic impedance matching of the transmission line 200 is not properly performed, so that reflection occurs in the signal transmission, and the signal to be transmitted is distorted as the signal is transmitted at high speed.

To this end, in the embodiment of the present invention, in accordance with the process variations of the switching elements M1 to M4 and the resistors R1 to R4 for the ESD, the transistors M5 and M6, the resistors R5 and R6 and the band- The levels of the pull-up voltage Vrup and the pull-down voltage Vrdn are adjusted by the high voltage Vhigh and the low voltage Vlow and the constant current sources 115 and 119 and the amplifiers 114 and 118 so that the turn on resistance values of the switching devices M1 to M4, The sum is not affected by the process change.

Claims

An input driver for driving a positive input signal and a negative input signal to output a plurality of driving signals having a pull-up voltage level and a plurality of driving signals having a pull-down voltage level;
A voltage generator for generating a first driving voltage by regulating a power supply voltage; And
A plurality of switching elements selectively turned on by the plurality of driving signals to selectively supply the first driving voltage to a differential output terminal, and the turn-on resistance of the plurality of switching elements is higher than the pull- And a main driver that is adjusted by a voltage level.

The apparatus of claim 1, wherein the input driver
First and second pre-drivers for outputting first and second drive signals for driving a pull-up stage of the main driver according to the pull-up voltage level;
And a third and a fourth pre-driver for outputting third and fourth drive signals for driving the pull-down ends of the main driver according to the pull-down voltage level.

3. The apparatus of claim 2, wherein the main driver
A first switching element connected between the applying end of the first driving voltage and the first differential output terminal and operated by the first driving signal;
A second switching element connected between the applying end of the first driving voltage and the second differential output terminal and operated by the second driving signal;
A third switching element connected between the first differential output terminal and the ground voltage terminal and operated by the fourth driving signal;
And a fourth switching element connected between the second differential output terminal and the ground voltage terminal and operated by the third driving signal.

4. The low voltage differential signal transmitter according to claim 3, wherein the first switching element and the second switching element have the same size.

The low voltage differential signal transmitter according to claim 3, wherein the third switching element and the fourth switching element have the same size.

3. The low voltage differential signal transmitter according to claim 2, wherein the first drive signal and the third drive signal have opposite phases to the second drive signal and the fourth drive signal.

The low voltage differential signal transmitter of claim 1, wherein the main driver further comprises a plurality of resistors connected between the plurality of switching elements and the differential output terminal.

The low voltage differential signal transmitter according to claim 1, wherein the number of the plurality of pre-drivers corresponds to the number of the plurality of switching elements.

The method according to claim 1,
Up controller for generating the pull-up voltage and supplying the pull-up voltage to the input driver; And
And a pull-down control unit for generating the pull-down voltage and supplying the pull-down voltage to the input driver.

The apparatus as claimed in claim 9, wherein the pull-up control section
A high voltage generator regulating the supply voltage to generate a high voltage;
A voltage generator for generating a second driving voltage;
A first amplifier for comparing and amplifying the high voltage and the feedback voltage;
A fifth switching element connected between the applying end of the second driving voltage and the output terminal of the feedback voltage and selectively turned on by the output of the first amplifier;
A first constant current source connected between the fifth switching device and the ground voltage terminal; And
And a pull-up voltage generator for adjusting the pull-up voltage level corresponding to the output of the first amplifier.

The low voltage differential signal transmitter according to claim 10, wherein the fifth switching element has the same size as the pull-up stage switching element of the main driver.

11. The low voltage differential signal transmitter of claim 10, further comprising a first resistor connected between the fifth switching element and the first constant current source.

10. The apparatus of claim 9, wherein the pull-
A low voltage generator that regulates the supply voltage to generate a low voltage;
A second amplifier for comparing and amplifying the low voltage and the feedback voltage;
A sixth switch connected between the ground voltage terminal and the output terminal of the feedback voltage and selectively turned on by the output of the second amplifier;
A second constant current source connected between the sixth switching device and the application terminal of the power supply voltage; And
And a pull-down voltage generator for adjusting the pull-down voltage level corresponding to the output of the second amplifier.

14. The low voltage differential signal transmitter according to claim 13, wherein the sixth switching element has the same size as the pull-down stage switching element of the main driver.

14. The low voltage differential signal transmitter of claim 13, further comprising a second resistor connected between the sixth switching element and the second constant current source.