KR20150106304A - Electrostatic Discharge Circuit And Liquid Crystal Display Device Comprising The Same - Google Patents

Abstract

A liquid crystal display device according to an embodiment of the present invention is characterized by comprising a liquid crystal panel having multiple gate lines and multiple data lines cross, and having multiple pixels defined; a gate driving circuit supplying a gate driving signal to multiple gate lines; a data driving circuit supplying a data voltage to the multiple data lines; a common voltage line supplying a common voltage to the multiple pixels; a ground line supplying a ground potential to the liquid crystal panel; multiple first electrostatic discharge circuits connected to the multiple gate lines or the multiple data lines from the outer boundary of an active region, and discharging an overvoltage current; and multiple second electrostatic discharge circuits connected between the multiple first electrostatic discharge circuits and the common voltage line, or connected to the common voltage line and the ground line to discharge the overvoltage current.

Description

[0001] The present invention relates to an electrostatic discharge (ESD) circuit and a liquid crystal display (LCD)

This application claims the benefit of U.S. Provisional Patent Application No. 61 / 950,675, filed on Mar. 10, 2014, which is incorporated herein by reference.

Liquid crystal display devices (LCDs) are suitable for display devices of TVs and portable devices due to the development of mass production technology, ease of driving means, low power consumption, and high quality image realization. The liquid crystal display device displays an image according to a video signal by adjusting a transmittance of light passing through a liquid crystal layer of a pixel according to a video signal input from the outside.

The liquid crystal display device includes a liquid crystal panel in which pixels are arranged in a matrix form to display an image, and a driving circuit for supplying a signal and a power source for driving the liquid crystal panel.

In such a liquid crystal display device, when a static electricity or an overvoltage enters the pixel, the pixel and the line are destroyed and the image can not be properly displayed. The electrostatic discharge circuit is connected to the data line and the gate line in parallel in order to solve the problem caused by the inflow of the static electricity or the overvoltage.

A typical antistatic circuit protects the TFT array by limiting the overvoltage flowing from the outside and bypassing the overvoltage current. The anti-static circuit should not affect the operation of the panel due to the voltage drop or leakage current during operation of the liquid crystal panel. On the other hand, if an overvoltage due to static electricity occurs, the anti-static circuit has a low resistance, Time must be fast.

The electrostatic discharge circuit distributes static electricity when static electricity is generated to protect the TFT array of the active area. When high voltage static electricity is generated, the electrostatic discharge circuit first senses the electrostatic signal and bypasses the overvoltage current to the ground (GND) or common voltage (Vcom) terminal.

1 is a diagram showing an electrostatic discharge circuit (ESD circuit) according to the prior art.

Referring to FIG. 1, the electrostatic discharge circuit 20 according to the prior art includes two switching TFTs 22 and 24 and one equalizer TFT 26.

The first switching TFT 22 and the second switching TFT 24 are connected to a gate and a source through a diode connection to operate as a diode and simultaneously prevent a current from flowing in both directions.

The electrostatic discharge circuit 20 of the related art has a structure in which the active layer of the first switching TFT 22, the second switching TFT 24 and the equalizer TFT 26 is made of an oxide TFT (oxide TFT) is applied.

When the first switching TFT 22, the second switching TFT 24, and the equalizer TFT 26 are both oxide TFTs, the operation speed due to the flow of static electricity is fast, but the problem is that the amount of leakage current is large, .

In order to solve the problems caused by applying the oxide TFT to the electrostatic discharge circuit 20, the number of the TFTs is increased or the length of the channel of the TFT is increased, that is, the resistance of the channel is increased, Can be minimized.

However, there are restrictions on the area in designing the electrostatic discharge circuit, and it is difficult to increase the number of the TFTs or to increase the length of the channel of the TFTs. Particularly, there is a restriction in securing a circuit design area in the display panel toward a higher resolution, and it is difficult to design an electrostatic discharge circuit capable of minimizing leakage current while ensuring sufficient electrostatic discharge performance.

2 is a graph showing changes in voltage-current characteristics according to a channel length of a back channel etched (BCE) type oxide thin film transistor (oxide TFT).

2, the BCE-type case of the oxide TFT, the channel length (length) is increased, the initial threshold voltage (initial V _th) and positive shift (positive shift), as, S-factor value is increased by existing a It is very difficult to reflect the design of the electrostatic discharge circuit based on the Si TFT or the ES oxide TFT to the BCE type oxide TFT.

Here, the S-factor means the inverse value of the slope of the sub-threshold region in the Trans-curve graph of the TFT, and has an S-factor value from 0. The smaller the S-factor value is, the better the device characteristics that perform the switching function. On the contrary, the higher the S-factor value, the lower the device characteristics.

In order to reduce the leakage current of the electrostatic discharge circuit including the BCE type oxide TFT, if the design of the TFT is changed so that the length of the channel is increased from 6 탆 to 10 탆, the S-factor value increases, There are other problems in which characteristics are changed.

Therefore, it is required to develop a BCE-type oxide TFT capable of securing a high switching speed and an electrostatic discharge performance at an oxide TFT level while maintaining a leakage current at a conventional a-Si TFT level. There is also a need for the development of an electrostatic discharge circuit including an oxide TFT that satisfies both discharge performance and switching performance, and a liquid crystal display device including such an electrostatic discharge circuit.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide an electrostatic discharge circuit capable of reducing a leakage current and a liquid crystal display device including the electrostatic discharge circuit.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to provide an electrostatic discharge circuit capable of reducing power consumption and a liquid crystal display device including the same.

Disclosure of Invention Technical Problem [8] Accordingly, the present invention has been made in view of the above problems, and it is an object of the present invention to provide an electrostatic discharge circuit capable of improving electrostatic discharge performance while reducing a circuit design area and a liquid crystal display device including the electrostatic discharge circuit.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide an electrostatic discharge circuit applicable to a high-resolution display panel.

Other features and advantages of the invention will be set forth in the description which follows, or may be learned by those skilled in the art from the description and the claims.

A liquid crystal display device according to an embodiment of the present invention includes: a liquid crystal panel formed to intersect a plurality of gate lines and a plurality of data lines, the plurality of pixels being defined; A gate driving circuit for supplying a gate driving signal to the plurality of gate lines; A data driving circuit for supplying a data voltage to the plurality of data lines; A common voltage line for supplying a common voltage to the plurality of pixels; A ground line for supplying a ground potential to the liquid crystal panel; A plurality of first electrostatic discharge circuits connected to the plurality of gate lines or the plurality of data lines at an outside of the active area to discharge an overvoltage current; And a plurality of second electrostatic discharge circuits connected between the plurality of first electrostatic discharge circuits and the common voltage line or connected to the common voltage line and the ground line to discharge an overvoltage current.

In addition, other features and advantages of the present invention may be newly understood through embodiments of the present invention.

The present invention can provide an electrostatic discharge circuit capable of reducing a leakage current and a liquid crystal display device including the electrostatic discharge circuit.

The present invention can provide an electrostatic discharge circuit capable of reducing power consumption and a liquid crystal display device including the electrostatic discharge circuit.

The present invention can provide an electrostatic discharge circuit and a liquid crystal display device including the electrostatic discharge circuit that can improve the electrostatic discharge performance while reducing the circuit design area.

The present invention can provide an electrostatic discharge circuit applicable to a high-resolution display panel.

The electrostatic discharge circuit including the oxide TFT of the 5TFT structure or 7TFT structure of the present invention is designed such that the channel length of each oxide TFT is equal to the channel length of the oxide TFT of the active region (display region) There is no need to separately change the channel design for the electrostatic discharge circuit.

The electrostatic discharge circuit including the oxide TFT of the 5TFT structure or the 7TFT structure of the present invention can reduce the design area of the TFT on the substrate and is not restricted in designing the electrostatic discharge circuit.

The electrostatic discharge circuit including the oxide TFT of the 5TFT structure or the 7TFT structure of the present invention can reduce the leakage current to the same level as that of the three amorphous silicon (a-Si) TFTs constituting the electrostatic discharge circuit, have.

The electrostatic discharge circuit including the oxide TFT of the 5TFT structure or 7TFT structure of the present invention has an advantage that it can be applied to a high resolution display panel.

1 is a diagram showing an electrostatic discharge circuit (ESD circuit) according to the prior art.
2 is a graph showing changes in voltage-current characteristics according to a channel length of a back channel etched (BCE) type oxide thin film transistor (oxide TFT).
3 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.
4 is a diagram showing a leakage current according to an increase in channel length of an oxide TFT configured in an electrostatic discharge circuit.
5 is a diagram showing an equivalent circuit of the electrostatic discharge circuit according to the first embodiment of the present invention.
6 is a diagram showing the layout of the electrostatic discharge circuit according to the first embodiment of the present invention.
7 is a cross-sectional view of an electrostatic discharge circuit according to the first embodiment of the present invention.
8 is an equivalent circuit diagram of the electrostatic discharge circuit according to the second embodiment of the present invention.
9 is an equivalent circuit diagram of an electrostatic discharge circuit according to a third embodiment of the present invention.
10 is an equivalent circuit diagram of an electrostatic discharge circuit according to a fourth embodiment of the present invention.
11 is an equivalent circuit diagram of an electrostatic discharge circuit according to a fifth embodiment of the present invention.
12 is an equivalent circuit diagram of an electrostatic discharge circuit according to a sixth embodiment of the present invention.
13 is a diagram showing the structure of the electrostatic discharge circuit and the leakage current according to the channel length (length) of the center TFT.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto. Like reference numerals refer to like elements throughout the specification. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. In the case where the word 'includes', 'having', 'done', etc. are used in this specification, other parts can be added unless '~ only' is used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In describing embodiments of the present invention, when it is stated that a structure (electrode, line, wiring layer, contact) is formed "over or on" and "below or below" another structure, It should be interpreted as including a case where a third structure is interposed between these structures as well as when they are in contact with each other.

In the case of a description of a temporal relationship, for example, if the temporal relationship is described by 'after', 'after', 'after', 'before', etc., May not be continuous unless they are not used.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other, partially or wholly, and technically various interlocking and driving are possible, and that the embodiments may be practiced independently of each other, It is possible.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an electrostatic discharge circuit capable of reducing leakage current while reducing the size of an electrostatic discharge circuit and a liquid crystal display device including the same.

The present invention proposes an electrostatic discharge circuit capable of reducing a leakage current and a liquid crystal display device including the same. The present invention also provides an electrostatic discharge circuit capable of reducing power consumption and a liquid crystal display device including the electrostatic discharge circuit. The present invention also provides an electrostatic discharge circuit and a liquid crystal display device including the electrostatic discharge circuit that can improve the electrostatic discharge performance while reducing the circuit design area. Further, the present invention proposes an electrostatic discharge circuit applicable to a high-resolution display panel.

3 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.

3, a liquid crystal display device according to an exemplary embodiment of the present invention includes a liquid crystal panel 100 for displaying an image according to an input image signal, a plurality of electrostatic discharge circuits 200, a gate driving circuit 300, (Not shown) for controlling operations of the gate driving circuit 300 and the data driving circuit 400 and a power supply unit (not shown) for supplying power to the driving circuits.

The liquid crystal panel 100 is formed such that m gate lines GL1 to GLm and n data lines DL1 to DLn cross each other. A plurality of pixels are formed in a matrix form by the intersection of the data lines and the gate lines. In each pixel, an oxide TFT (TFT) is formed as a switching element to switch the supply of image data to each pixel. In addition, a storage capacitor Cst is formed in each pixel.

The common voltage line 110 and the common voltage Vcom for supplying the common voltage Vcom output from the data driving circuit 400 to the pixels are fed back to the data driving circuit 400 in the liquid crystal panel 100 A common voltage feedback line 120, a ground line 130 for supplying a ground potential to the liquid crystal panel 100, and a common line 140 connecting the electrostatic discharge circuits are formed.

The oxide TFT of each pixel is switched by the gate drive signal supplied through the gate line, and when the oxide TFT is turned on, the data voltage supplied through the data line is supplied to the pixel. The arrangement state of the liquid crystal is changed in each pixel due to the electric field difference between the data voltage and the common voltage, and the image is displayed by adjusting the arrangement of the liquid crystal to adjust the transmittance of the light incident from the backlight unit.

The control unit arranges the input video signal into R, G, and B image data in frame units, and supplies the R, G, and B image data to the data driving circuit 400. The control unit generates a gate control signal GCS for controlling the gate driving circuit 300 and a data control signal DCS for controlling the data driving circuit 400 using the input timing signal TS . The timing signal TS includes a data enable signal DE, a horizontal synchronizing signal Hsync, a vertical synchronizing signal Vsync, and a clock signal CLK.

The gate control signal GCS may include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable (GOE).

The data control signal DCS includes a source start pulse (SSP), a source sampling clock (SSC), a source output enable (SOE), a polarity control signal (POL) . ≪ / RTI >

The data driving circuit 400 converts R, G, and B image data supplied from the control unit into analog data voltages. Then, a data voltage is supplied to each pixel through the data lines of the liquid crystal panel 100. The data driving circuit 400 generates Vst, CLK, VDD, and Vreset signals for driving the gate driving circuit 300 of the GIP scheme based on the control of the controller, and generates the generated Vst, CLK, VDD, and Vreset signals To the gate drive circuit (300).

The gate driving circuit 300 supplies the gate driving signal Vout to each of the plurality of gate lines of the liquid crystal panel 100. The gate driving circuit 300 receives the input driving voltages VDD and VSS and Vst and CLK And generates the gate driving signal Vout using the Vreset signals and sequentially supplies the gate driving signal Vout to the gate lines of the liquid crystal panel 100. [ The gate driving circuit 300 includes a plurality of stages corresponding to a plurality of gate lines. The plurality of stages can be distributed on both sides of the liquid crystal panel 100 divided into odd stages and even stages.

When a static electricity or an overvoltage flows into the liquid crystal panel 100, the pixels and the lines are destroyed and the image can not be properly displayed. A plurality of electrostatic discharge circuits 200 are formed in the liquid crystal panel 100 to block the introduction of static electricity or overvoltage. The electrostatic discharge circuit 200 protects the pixels and lines of the active area by limiting the overvoltage flowing into the liquid crystal panel 100 and bypassing the overvoltage current.

The electrostatic discharge circuit 200 of the present invention bypasses the overvoltage current according to the static electricity to the ground (GND) or the common voltage (Vcom) terminal when the static electricity is generated.

The electrostatic discharge circuit 200 of the present invention is constituted by a plurality of first electrostatic discharge circuits 210 (mail electrostatic discharge circuit) and a plurality of second electrostatic discharge circuits 220 (auxiliary electrostatic discharge circuit). The plurality of first electrostatic discharge circuits (210) and the plurality of second electrostatic discharge circuits (220) include a plurality of TFTs. The plurality of TFTs is an oxide TFT in which the active layer is formed of an oxide semiconductor material excellent in switching characteristics. Each of the plurality of first electrostatic discharge circuits 210 and the plurality of second electrostatic discharge circuits 220 does not affect panel operation due to voltage drop or leakage current during operation of the liquid crystal panel 100, When it is generated, it is quickly turned on with a low resistance.

A plurality of first electrostatic discharge circuits (210) are arranged at the beginning and end of the plurality of gate lines and the plurality of data lines. A plurality of second electrostatic discharge circuits (220) are disposed between the common voltage line (110) and the plurality of first electrostatic discharge circuits (210). The overvoltage current bypassed through the plurality of first electrostatic discharge circuits 210 is discharged through the plurality of second electrostatic discharge circuits 220 to the common voltage terminal Vcom and the ground terminal.

The plurality of first electrostatic discharge circuits

The plurality of first electrostatic discharge circuits 210 includes a plurality of gate electrostatic discharge circuits 212a and 212b and a plurality of data electrostatic discharge circuits 214a and 214b.

The plurality of gate electrostatic discharge circuits 212a and 212b include first gate electrostatic discharge circuits 212a and second gate electrostatic discharge circuits 212b.

The first gate electrostatic discharge circuits 212a are disposed at the beginning of the gate lines. The first terminal of the first gate electrostatic discharge circuits 212a is connected to the gate lines and the second terminal is connected to the common line 140. [

The second gate electrostatic discharge circuits 212b are disposed at the ends of the gate lines. The first terminal of the second gate electrostatic discharge circuits 212b is connected to the gate line and the second terminal is connected to the common line 140. [

A first gate electrostatic discharge circuit 212a is connected to the start end of one gate line GL and a second gate electrostatic discharge circuit 212b is connected to the end of one gate line GL, (GL) is protected by two ESD circuits.

Subsequently, the plurality of data electrostatic discharge circuits 214a and 214b include first data electrostatic discharge circuits 214a and second data electrostatic discharge circuits 214b.

The first data electrostatic discharge circuits 214a are disposed at the beginning of the data line. The first terminal of the first data electrostatic discharge circuits 214a is connected to the data line and the second terminal is connected to the common voltage line 110. [

And the second data electrostatic discharge circuits 214b are disposed at the end of the data line. The first terminal of the second data electrostatic discharge circuits 214b is connected to the data line and the second terminal is connected to the ground line 130. [

The first data electrostatic discharge circuit 214a is connected to the start end of one data line DL and the second data electrostatic discharge circuit 214b is connected to the end of one data line DL, The line DL is protected by two ESD circuits.

The plurality of second electrostatic discharge circuits

The plurality of second electrostatic discharge circuits 220 includes a plurality of first protection circuits 222a and 222b and a plurality of second protection circuits 224a and 224b.

Here, the plurality of first protection circuits 222a and 222b are a plurality of first electrostatic discharge circuits 212a and 212b for discharging an overvoltage current bypassed through the plurality of gate electrostatic discharge circuits 212a and 212b to a common voltage (Vcom) terminal and a ground (GND) to be.

The plurality of second protection circuits 224a and 224b are connected to a plurality of data electrostatic discharge circuits 214a and 214b for discharging the overvoltage current bypassed through the plurality of data electrostatic discharge circuits 214a and 214b to the common voltage Vcom terminal and the ground to be.

The plurality of first protection circuits 222a and 222b includes first gate protection circuits 222a and second gate protection circuits 222b.

First, a plurality of first protection circuits 222a and 222b will be described.

First gate protection circuits 222a are disposed between common voltage line 110 and first gate electrostatic discharge circuits 212a. A first terminal of the first gate protection circuits 222a is connected to the common line 140 to which the first gate electrostatic discharge circuits 212a are connected. The second terminal of the first gate protection circuits 222a is connected to the common voltage line 110. [

The first gate protection circuits 222a may be composed of two ESD circuits. One ESD circuit is disposed between the start end of the first gate electrostatic discharge circuits 212a and the common voltage line 110 and the remaining one ESD circuit is connected to the end of the first gate electrostatic discharge circuits 212a and the common voltage Line < / RTI > That is, one ESD circuit among the first gate protection circuits 222a is disposed at the left upper end of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current. The remaining one ESD circuit is disposed at the lower left end of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current.

Second gate protection circuits 222b are disposed between the common voltage line 110 and the second gate electrostatic discharge circuits 212b. The first terminals of the second gate protection circuits 222b are connected to the common line 140. [ The common line 140 is connected to the second gate electrostatic discharge circuits 212b. The second terminal of the second gate protection circuits 222b is connected to the common voltage line 110. [

The second gate protection circuits 222b may be composed of two ESD circuits. One ESD circuit is disposed between the start end of the second gate electrostatic discharge circuits 212b and the common voltage line 110 and the other ESD circuit is disposed between the end of the second gate electrostatic discharge circuits 212b and the common voltage Line < / RTI > That is, one ESD circuit among the second gate protection circuits 222b is disposed at the upper right end of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current. The remaining one ESD circuit is disposed at the lower right end of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current.

Next, the plurality of second protection circuits 224a and 224b will be described.

The plurality of second protection circuits 224a and 224b includes first data protection circuits 224a and second data protection circuits 224b.

The first data protection circuits 224a are disposed between the common voltage line 110 and the first data electrostatic discharge circuits 214a. A first terminal of the first data protection circuits 224a is connected to the first data electrostatic discharge circuits 214a. The second terminal of the first data protection circuits 224a is connected to the common voltage line 110. [

The first data protection circuits 224a may be composed of two ESD circuits. One ESD circuit is disposed between the start end of the first data electrostatic discharge circuits 214a and the common voltage line 110 and the remaining one ESD circuit is disposed between the end of the first data electrostatic discharge circuits 214a and the common voltage Line < / RTI > That is, one ESD circuit among the first data protection circuits 224a is disposed at the left upper end of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current. The remaining one ESD circuit is disposed at the upper right end of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current.

Second data protection circuits 224b are then disposed between the common voltage line 110 and the second data electrostatic discharge circuits 214b. A first terminal of the second data protection circuits 224b is connected to the second data electrostatic discharge circuits 214b. The second terminal of the second data protection circuits 224b is connected to the ground line 130. [

The second data protection circuits 224b may be composed of four ESD circuits. Two ESD circuits are connected in parallel to each other and arranged between the start end of the second data electrostatic discharge circuits 214b and the common voltage line 110. [ The remaining two ESD circuits are connected in parallel and disposed between the end of the second data electrostatic discharge circuits 214b and the common voltage line 110. [ That is, two ESD circuits among the first data protection circuits 224a are disposed at the lower left end of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current. The remaining two ESD circuits are disposed at the lower right portion of the liquid crystal panel to protect the liquid crystal panel from the overvoltage current.

The second data protection circuits 224b are formed in a structure in which two ESD circuits are connected in parallel to each other, so that the overvoltage current < RTI ID = 0.0 > Can be discharged efficiently.

4 is a diagram showing a leakage current according to an increase in channel length of an oxide TFT configured in an electrostatic discharge circuit.

Referring to FIG. 4, the oxide TFT has a problem that the static current of the electrostatic discharge circuit increases according to the mobility characteristics. In addition, there is a problem that driving failure of the liquid crystal panel and power consumption increase due to leakage current of the oxide TFT.

If the number of TFTs constituting the electrostatic discharge circuit is added to constitute the electrostatic discharge circuit with the 3TTF + 3TFT structure or the 3TFT + 5TFT structure, the leakage current can be reduced. This makes it possible to solve the problems of applying the oxide TFT to the electrostatic discharge circuit.

Alternatively, increasing the channel length of the TFT may reduce the leakage current, thereby solving the problems of applying the oxide TFT to the electrostatic discharge circuit.

However, if the number of the TFTs constituting the electrostatic discharge circuit or the channel length of each TFT is increased, the area of the electrostatic discharge circuit on the substrate increases, and there is a restriction in circuit design.

The oxide TFT formed in the active region of the liquid crystal panel and the oxide TFT of the electrostatic discharge circuit formed in the non-display region of the liquid crystal panel are formed together in the same manufacturing process to reduce manufacturing cost and increase manufacturing efficiency. If the channel length of the oxide TFT of the active region remains unchanged and only the channel length of the oxide TFT of the electrostatic discharge circuit is designed separately, the oxide TFT of the active region and the oxide TFT of the electrostatic discharge circuit are the same It can not be formed by the process, and the manufacturing cost and the manufacturing efficiency are low, and there is a limitation in applying such a manufacturing method. In other words, it is difficult to apply the present invention to an actual fabrication process because the fabrication process conditions of the oxide TFT of the active region are different from the fabrication process conditions of the oxide TFT of the electrostatic discharge circuit.

In the present invention, in constructing the electrostatic discharge circuit by applying the BCE type oxide TFT, the channel length of the oxide TFT of the electrostatic discharge circuit is applied in the same manner as the channel length of the oxide TFT of the active region. Here, a discharge circuit is formed so that a plurality of oxide TFTs are connected in series.

As a result, the oxide TFT of the active region and the oxide TFT of the electrostatic discharge circuit can be formed in the same manufacturing process, and the leakage current of the electrostatic discharge circuit is improved, thereby reducing power consumption.

5 is a diagram showing an equivalent circuit of the electrostatic discharge circuit according to the first embodiment of the present invention.

Referring to FIG. 5, in the electrostatic discharge circuit according to the first embodiment of the present invention, the channel length of one oxide TFT is the same as that of the oxide TFT of the active region. However, it is possible to increase the channel length of the oxide TFT constituting the electrostatic discharge circuit by reflecting the structure in which a plurality of oxide TFTs are connected in series to the design. Through this, we have developed an electrostatic discharge circuit that can reduce leakage current.

As an example, as shown in Fig. 5, the electrostatic discharge circuit can be formed in a 5TFT structure. Here, the three switching TFTs, that is, the first switching TFT (T1), the second switching TFT (T3) and the third switching TFT (T5) are made of one oxide having the same channel length as the oxide TFT of the active region TFT.

The two center TFTs, that is, the first center TFT T2 and the second center TFT T4 have a structure in which three oxide TFTs having the same channel length as the oxide TFT of the active region are connected in series .

A first center TFT T2 is formed between the first switching TFT T1 and the second switching TFT T3 and a second center TFT T2 is formed between the second switching TFT T3 and the third switching TFT T5. A TFT T4 is formed.

The channel length of the first center TFT T2 and the second center TFT T4 in the non-display region is 24 占 퐉 (length) when the channel length of the oxide TFT in the active region (display region) 3 x 8 mu m). Further, not only the channel length but also the channel width of a plurality of oxide TFTs constituting the electrostatic discharge circuit in the active region (display region) and the non-display region can be formed in the same manner.

In the description with reference to FIG. 5, the channel length of the oxide TFT is described as 8 μm, but this is one of the embodiments of the present invention. The channel length of the oxide TFT may be less than 8 占 퐉 or larger than 8 占 퐉.

As the channel length of the first center TFT T2 and the second center TFT T4 becomes longer, the resistance of the channel increases in proportion to the length of the first center TFT T2 and the second center TFT T4, so that the leakage current decreases and the power consumption decreases.

6 is a diagram showing the layout of the electrostatic discharge circuit according to the first embodiment of the present invention, and Fig. 7 is a sectional view of the electrostatic discharge circuit according to the first embodiment of the present invention. Fig. 7 shows a cross section of the center TFT along the line A-B shown in Fig. 6 and a cross section of the switching TFT along the line C-D.

6 and 7, a 5TFT structure can be applied to the layout design of the electrostatic discharge circuit. That is, one electrostatic discharge circuit (ESD circuit) can be formed with a 5TFT structure.

The first center TFT T2 and the second center TFT T4 are formed in a structure in which three oxide TFTs having the same channel short length as the oxide TFT of the active region (display region) are connected in series . The first switching TFT T1, the second switching TFT T3 and the third switching TFT T5 are formed of one oxide TFT having the same channel length as the oxide TFT of the active region.

The structures of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit having the 5-TFT structure will be described.

As shown in FIG. 7, a gate electrode is formed on a substrate, and a gate insulator (GI) is formed to cover the gate electrode (gate). Three active layers ACT are formed on the gate insulating film GI so as to overlap with the gate electrode gat spaced apart at regular intervals. At this time, an oxide semiconductor material is applied to the active layer ACT.

A source electrode / drain electrode is formed on each of the three active layers ACT. One center TFT is constituted by one gate, three active layers and three source electrode / drain electrodes, and three oxide TFTs are connected in series.

A first protective film PAS1 is formed so as to cover the source electrode / drain electrode, and a planarization layer is formed of photo-acryl (PAC) in order to eliminate a step due to the profile of the TFT. A common electrode Vcom is formed on the planarization layer and a second protective film PAS2 is formed to cover the common electrode Vcom.

The structures of the first switching TFT T1, the second switching TFT T3 and the third switching TFT T5 are the same as those of the first center TFT T2 and the second center TFT T3 except that the active layer ACT is formed in one. (T4), and a detailed description thereof will be omitted.

The electrostatic discharge circuit having the above-described 5TFT structure can be applied to the plurality of first electrostatic discharge circuit 210 and the plurality of second electrostatic discharge circuit 220 described with reference to FIG.

The electrostatic discharge circuit having the 5TFT structure of the present invention is designed so that each oxide TFT has the same channel length as the oxide TFT of the active region, so that there is no need to change the channel design separately for the electrostatic discharge circuit.

In addition, the electrostatic discharge circuit having the 5TFT structure of the present invention can reduce the design area on the substrate compared to when the channel length of one oxide TFT is formed by the large length method in the prior art, There is an effect that it is not restricted in the design of the antenna.

Further, the electrostatic discharge circuit having the 5TFT structure of the present invention can reduce the leakage current to the same level as that of the three amorphous silicon (a-Si) TFTs, and reduce power consumption. In addition, the electrostatic discharge circuit having the 5TFT structure of the present invention is applicable to a high-resolution display panel.

8 is an equivalent circuit diagram of the electrostatic discharge circuit according to the second embodiment of the present invention.

Referring to FIG. 8, the electrostatic discharge circuit can be formed in a 5TFT structure. Here, the three switching TFTs, that is, the first switching TFT (T1), the second switching TFT (T3) and the third switching TFT (T5) have the same channel length as the oxide TFT of the active region The branch is composed of one oxide TFT.

The two center TFTs, that is, the first center TFT T2 and the second center TFT T4 have four oxide TFTs having the same channel length as the oxide TFTs in the active region (display region) are connected in series Structure.

The channel length of the first center TFT T2 and the second center TFT T4 in the non-display region is 32 占 퐉 (length) when the channel length of the oxide TFT in the active region (display region) 4 x 8 mu m). In addition, not only the channel length of a plurality of oxide TFTs constituting the oxide TFT of the active region (display region) and the electrostatic discharge circuit but also the width of the channel can be formed in the same manner.

In the description with reference to FIG. 8, the channel length of the oxide TFT is described as 8 μm, but this is one of several embodiments of the present invention. The channel length of the oxide TFT may be less than 8 占 퐉 or larger than 8 占 퐉.

As the channel length of the first center TFT T2 and the second center TFT T4 becomes longer, the resistance of the channel increases in proportion to the length of the first center TFT T2 and the second center TFT T4, so that the leakage current decreases and the power consumption decreases.

9 is an equivalent circuit diagram of an electrostatic discharge circuit according to a third embodiment of the present invention.

9, in the electrostatic discharge circuit according to the third embodiment of the present invention, the channel length of one oxide TFT is the same as that of the oxide TFT in the active region (display region), but a plurality of oxide TFTs are connected in series The channel length of one oxide TFT is maintained equal to the channel length of the oxide TFT of the active region (display region) by reflecting the connected structure to the design.

The electrostatic discharge circuit according to the third embodiment of the present invention can increase the channel length of the oxide TFT constituting the electrostatic discharge circuit by reflecting the structure in which a plurality of oxide TFTs are connected in series. Through this, we have developed an electrostatic discharge circuit that can reduce leakage current.

It is possible to form one electrostatic discharge circuit (ESD circuit) in a 7TFT structure.

Four switching TFTs, that is, the first switching TFT (T1), the second switching TFT T3, the third switching TFT T5, and the fourth switching TFT T7 are the same as the oxide TFT of the active region And is composed of one oxide TFT having a channel length (length). The three center TFTs, that is, the first center TFT T2, the second center TFT T4 and the third center TFT T6 have the same channel length as the oxide TFT of the active region (display region) And three oxide TFTs are connected in series.

The channel length of the first center TFT T2, the second center TFT T4 and the third center TFT T6 can be set to be shorter than the channel length of the oxide TFT of the active region (display region) (3 占 8 占 퐉). In addition, not only the channel length but also the channel width of a plurality of oxide TFTs constituting the oxide TFT of the active region (display region) and the electrostatic discharge circuit can be formed in the same manner.

In the description with reference to FIG. 9, the channel length of the oxide TFT is described as 8 [mu] m, but this is one of several embodiments of the present invention. The channel length of the oxide TFT may be less than 8 占 퐉 or larger than 8 占 퐉.

As the channel lengths of the first, second, and third center TFTs T 2, T 4, and T 6 become longer, the resistance of the channel increases in proportion to the length of the first center TFT T 2, the third center TFT T 4, , The power consumption is reduced.

In the layout design of the electrostatic discharge circuit, the TFT structure shown in Fig. 9 can be applied. At this time, the first center TFT (T2), the second center TFT (T4), and the third center TFT (T4) are formed in a structure in which four oxide TFTs having a channel (short channel) Thereby forming a TFT T6.

The first switching TFT T1, the second switching TFT T3, the third switching TFT T5 and the fourth switching TFT T7 have the same channel length as the oxide TFT of the active region (display region) As shown in Fig.

The electrostatic discharge circuit having the 7TFT structure described above can be applied to the plurality of first electrostatic discharge circuits 210 and the plurality of second electrostatic discharge circuits 220 described with reference to FIG.

In the electrostatic discharge circuit having the 7TFT structure of the present invention, since the channel length of each oxide TFT is designed to be the same as the channel length of the oxide TFT of the active region (display region), the electrostatic discharge circuit is separately provided for the electrostatic discharge circuit There is no need to change the design.

In addition, the electrostatic discharge circuit having the 7TFT structure of the present invention can reduce the design area on the substrate compared to the case where the conventional art is formed by a large length method which enlarges the channel length of one oxide TFT There is no restriction on the design of the electrostatic discharge circuit.

In addition, the electrostatic discharge circuit having the 7TFT structure of the present invention can reduce the leakage current to the same level as that of the three amorphous silicon (a-Si) TFTs, and reduce power consumption. Further, the electrostatic discharge circuit having the 7TFT structure of the present invention can be applied to a high-resolution display panel.

10 is an equivalent circuit diagram of an electrostatic discharge circuit according to a fourth embodiment of the present invention.

10, in the electrostatic discharge circuit according to the fourth embodiment of the present invention, the channel length of one oxide TFT is the same as that of the oxide TFT in the active region (display region), but a plurality of oxide TFTs are connected in series The channel length of one oxide TFT is maintained equal to the channel length of the oxide TFT of the active region (display region) by reflecting the connected structure to the design.

The electrostatic discharge circuit according to the fourth embodiment of the present invention can increase the channel length of the oxide TFT constituting the electrostatic discharge circuit by reflecting the structure in which a plurality of oxide TFTs are connected in series. Through this, we have developed an electrostatic discharge circuit that can reduce leakage current.

The electrostatic discharge circuit can be formed in a 7TFT structure. Here, the four switching TFTs, that is, the first switching TFT (T1), the second switching TFT (T3), the third switching TFT (T5) and the fourth switching TFT (T7) And one oxide TFT having the same channel length.

The three center TFTs, that is, the first center TFT T2, the second center TFT T4 and the third center TFT T6 have the same channel length as the oxide TFT of the active region (display region) And four oxide TFTs are connected in series.

A first center TFT T2 is formed between the first switching TFT T1 and the second switching TFT T3 and a second center TFT T2 is formed between the second switching TFT T3 and the third switching TFT T5. And a third center TFT T6 is formed between the third switching TFT T5 and the fourth switching TFT T7.

The channel length of the first center TFT T2, the second center TFT T4 and the third center TFT T6 can be set to be shorter than the channel length of the oxide TFT of the active region (display region) (4 x 8 mu m). In addition, not only the channel length but also the channel width of a plurality of oxide TFTs constituting the oxide TFT of the active region (display region) and the electrostatic discharge circuit can be formed in the same manner.

In the description with reference to FIG. 10, the channel length of the oxide TFT is described as 8 .mu.m, but this is one of the embodiments of the present invention. The channel length of the oxide TFT may be less than 8 占 퐉 or larger than 8 占 퐉.

As the channel lengths of the first, second, and third center TFTs T 2, T 4, and T 6 become longer, the resistance of the channel increases in proportion to the length of the first center TFT T 2, the third center TFT T 4, , The power consumption is reduced.

11 is an equivalent circuit diagram of an electrostatic discharge circuit according to a fifth embodiment of the present invention.

Referring to FIG. 11, the electrostatic discharge circuit can be formed in a 5TFT structure. Here, the three switching TFTs, that is, the first switching TFT (T1), the second switching TFT (T3) and the third switching TFT (T5) have the same channel length as the oxide TFT of the active region The branch is composed of one oxide TFT.

The two center TFTs, that is, the first center TFT T2 and the second center TFT T4 have five oxide TFTs having the same channel length as the oxide TFTs in the active region (display region) are connected in series Structure.

The channel length of the first center TFT T2 and the second center TFT T4 is 40 占 퐉 (5 占 8 占 퐉) when the channel length of the oxide TFT in the active region (display region) is 8 占 퐉, . In addition, not only the channel length but also the channel width of a plurality of oxide TFTs constituting the oxide TFT of the active region (display region) and the electrostatic discharge circuit can be formed in the same manner.

In the description with reference to Fig. 11, the channel length of the oxide TFT is described as 8 [mu] m, but this is one of several embodiments of the present invention. The channel length of the oxide TFT may be less than 8 占 퐉 or larger than 8 占 퐉.

As the channel length of the first center TFT T2 and the second center TFT T4 becomes longer, the resistance of the channel increases in proportion to the length of the first center TFT T2 and the second center TFT T4, so that the leakage current decreases and the power consumption decreases.

12 is an equivalent circuit diagram of an electrostatic discharge circuit according to a sixth embodiment of the present invention.

Referring to FIG. 12, the electrostatic discharge circuit can be formed in a 7-TFT structure. Here, the four switching TFTs, that is, the first switching TFT (T1), the second switching TFT (T3), the third switching TFT (T5) and the fourth switching TFT (T7) And one oxide TFT having the same channel length.

The three center TFTs, that is, the first center TFT T2, the second center TFT T4 and the third center TFT T6 have the same channel length as the oxide TFT of the active region (display region) And five oxide TFTs are connected in series.

The channel length of the first center TFT T2, the second center TFT T4 and the third center TFT T6 can be set to be shorter than the channel length of the oxide TFT of the active region (display region) (5 x 8 mu m). In addition, not only the channel length but also the channel width of a plurality of oxide TFTs constituting the oxide TFT of the active region (display region) and the electrostatic discharge circuit can be formed in the same manner.

In the description with reference to FIG. 12, the channel length of the oxide TFT is described as 8 .mu.m, but this is one of the embodiments of the present invention. The channel length of the oxide TFT may be less than 8 占 퐉 or larger than 8 占 퐉.

As the channel length of the first center TFT T2 and the second center TFT T4 becomes longer, the resistance of the channel increases in proportion to the length of the first center TFT T2 and the second center TFT T4, so that the leakage current decreases and the power consumption decreases.

13 is a diagram showing the structure of the electrostatic discharge circuit and the leakage current according to the channel length (length) of the center TFT.

Referring to Fig. 13, the leakage current according to the channel length of the center TFT and the power consumption of the driving circuit will be described.

As an example, the electrostatic discharge circuit of the 5TFT structure can be applied to the plurality of first electrostatic discharge circuits 210 shown in FIG. At this time, the channel lengths of the first center TFT (T2) and the second center TFT (T4) of the electrostatic discharge circuit of the 5-TFT structure can be formed to be 24 占 퐉 (3 占 8 占 퐉).

When the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5TFT structure are formed to be 24 占 퐉 (3 占 8 占 퐉), a plurality of first electrostatic discharge circuits 210 ) May be 294.5 占 퐉.

The electrostatic discharge circuit of the 7TFT structure can be applied to the plurality of second electrostatic discharge circuits 220 shown in FIG. At this time, the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of 7TFT structure are formed to 32 μm (4 × 8 μm) .

When the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of the 7-TFT structure are formed to be 32 mu m (4 x 8 mu m) The size of each of the second electrostatic discharge circuits 220 may be 490.5 mu m.

The channel lengths of the first center TFT T2 and the second center TFT T4 of the plurality of first electrostatic discharge circuits 210 having a 5-TFT structure are formed to be 24 占 퐉 (3 占 8 占 퐉) (4 占 8 占 퐉) of the channel length of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the second electrostatic discharge circuit 220 having the structure shown in Fig. The leakage current in the off state and the on state of the drive circuit can be reduced.

In addition to the structure of the electrostatic discharge circuit of the first to sixth embodiments described above, the electrostatic discharge circuit can be configured by forming the channel length of the center TFT to be 8 占 퐉 or 16 占 퐉.

When the first electrostatic discharge circuit 210 and the second electrostatic discharge circuit 220 are formed in this manner, the leakage current can be reduced to a lower level than when the electrostatic discharge circuit is formed of three amorphous silicon (a-Si) TFTs Can be reduced. As a result, the power consumption when the gate driving circuit is off can be reduced to 0.021 mW.

As another example, the electrostatic discharge circuit of the 5TFT structure can be applied to the plurality of first electrostatic discharge circuits 210 shown in Fig. At this time, the channel lengths of the first center TFT (T2) and the second center TFT (T4) of the electrostatic discharge circuit of the 5-TFT structure can be formed to be 24 占 퐉 (3 占 8 占 퐉).

When the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5TFT structure are formed to be 24 占 퐉 (3 占 8 占 퐉), a plurality of first electrostatic discharge circuits 210 ) May be 294.5 占 퐉.

The electrostatic discharge circuit of the 7TFT structure can be applied to the plurality of second electrostatic discharge circuits 220 shown in FIG. At this time, the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of 7TFT structure are formed to be 40 μm (5 × 8 μm) .

When the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of the 7-TFT structure are formed to be 40 μm (5 × 8 μm) The size of each of the second electrostatic discharge circuits 220 may be 562.5 mu m.

The channel lengths of the first center TFT T2 and the second center TFT T4 of the plurality of first electrostatic discharge circuits 210 having a 5-TFT structure are formed to be 24 占 퐉 (3 占 8 占 퐉) (5 占 8 占 퐉) of the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the second electrostatic discharge circuit 220 having the structure shown in Fig. It is possible to reduce the leakage current in the off state and the on state of the driving circuit as shown in Fig.

As described above, when the first electrostatic discharge circuit 210 and the second electrostatic discharge circuit 220 are configured, the leakage current is reduced to a lower level than when the electrostatic discharge circuit is formed of three amorphous silicon (a-Si) TFTs Can be reduced. Thus, as shown in FIG. 17, the power consumption when the gate driving circuit is off can be reduced to 0.015 mW.

As another example, the electrostatic discharge circuit of the 5TFT structure can be applied to the plurality of first electrostatic discharge circuits 210 shown in FIG. At this time, the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5-TFT structure can be formed to be 32 mu m (4 x 8 mu m).

When the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5TFT structure are formed to be 32 mu m (4 x 8 mu m), the plurality of first electrostatic discharge circuits 210 ) May be 342.5 占 퐉.

The electrostatic discharge circuit of the 7TFT structure can be applied to the plurality of second electrostatic discharge circuits 220 shown in FIG. At this time, the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of 7TFT structure are formed to 32 μm (4 × 8 μm) .

When the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of the 7-TFT structure are formed to be 32 mu m (4 x 8 mu m) The size of each of the second electrostatic discharge circuits 220 may be 490.5 mu m.

The channel lengths of the first center TFT T2 and the second center TFT T4 of the plurality of first electrostatic discharge circuits 210 having the 5TFT structure are formed to be 32 mu m (4 x 8 mu m) (4 占 8 占 퐉) of the channel length of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the second electrostatic discharge circuit 220 having the structure shown in Fig. The leakage current in the off state and the on state of the drive circuit can be reduced.

As described above, when the first electrostatic discharge circuit 210 and the second electrostatic discharge circuit 220 are configured, the leakage current is reduced to a lower level than when the electrostatic discharge circuit is formed of three amorphous silicon (a-Si) TFTs Can be reduced. As a result, as shown in FIG. 17, the power consumption when the gate driving circuit is off can be reduced to 0.018 mW.

As another example, the electrostatic discharge circuit of the 5TFT structure can be applied to the plurality of first electrostatic discharge circuits 210 shown in FIG. At this time, the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5-TFT structure can be formed to be 32 mu m (4 x 8 mu m).

When the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5TFT structure are formed to be 32 mu m (4 x 8 mu m), the plurality of first electrostatic discharge circuits 210 ) May be 342.5 占 퐉.

The electrostatic discharge circuit of the 7TFT structure can be applied to the plurality of second electrostatic discharge circuits 220 shown in FIG. At this time, the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of 7TFT structure are formed to be 40 μm (5 × 8 μm) .

When the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of the 7-TFT structure are formed to be 40 μm (5 × 8 μm) The size of each of the second electrostatic discharge circuits 220 may be 562.5 mu m.

The channel lengths of the first center TFT T2 and the second center TFT T4 of the plurality of first electrostatic discharge circuits 210 having the 5TFT structure are formed to be 32 mu m (4 x 8 mu m) (5 占 8 占 퐉) of the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the second electrostatic discharge circuit 220 having the structure shown in Fig. The leakage current in the off state and the on state of the drive circuit can be reduced.

As described above, when the first electrostatic discharge circuit 210 and the second electrostatic discharge circuit 220 are configured, the leakage current is reduced to a lower level than when the electrostatic discharge circuit is formed of three amorphous silicon (a-Si) TFTs Can be reduced. Thus, as shown in FIG. 17, the power consumption when the gate driving circuit is off can be reduced to 0.013 mW.

As another example, the electrostatic discharge circuit of the 5TFT structure can be applied to the plurality of first electrostatic discharge circuits 210 shown in FIG. At this time, the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5-TFT structure can be formed to be 32 mu m (4 x 8 mu m).

When the channel lengths of the first center TFT T2 and the second center TFT T4 of the electrostatic discharge circuit of the 5TFT structure are formed to be 32 mu m (4 x 8 mu m), the plurality of first electrostatic discharge circuits 210 ) May be 342.5 占 퐉.

The electrostatic discharge circuit of the 7TFT structure can be applied to the plurality of second electrostatic discharge circuits 220 shown in FIG. At this time, the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of the 7-TFT structure are formed to be 48 μm (6 × 8 μm) .

When the channel lengths of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the electrostatic discharge circuit of the 7-TFT structure are formed to be 48 μm (6 × 8 μm) The size of each of the second electrostatic discharge circuits 220 may be 634.5 mu m.

The channel lengths of the first center TFT T2 and the second center TFT T4 of the plurality of first electrostatic discharge circuits 210 having the 5TFT structure are formed to be 32 mu m (4 x 8 mu m) The length of the first center TFT T2, the second center TFT T4 and the third center TFT T6 of the second electrostatic discharge circuit 220 having a structure of 48 μm (6 × 8 μm) It is possible to reduce the leakage current in the off state and the on state of the driving circuit as shown in Fig.

As described above, when the first electrostatic discharge circuit 210 and the second electrostatic discharge circuit 220 are configured, the leakage current is reduced to a lower level than when the electrostatic discharge circuit is formed of three amorphous silicon (a-Si) TFTs Can be reduced. As a result, as shown in FIG. 17, the power consumption when the gate driving circuit is off can be reduced to 0.010 mW.

The plurality of first electrostatic discharge circuits of the liquid crystal display device according to the embodiment of the present invention may include a plurality of gate electrostatic discharge circuits arranged between the plurality of gate lines and the common voltage line; And a plurality of data electrostatic discharge circuits arranged between the plurality of data lines and the common voltage line.

In the liquid crystal display device according to the embodiment of the present invention, the first terminal of the plurality of data electrostatic discharge circuits is connected to the plurality of data lines, and the second terminal is connected to the ground line.

In the liquid crystal display device according to the embodiment of the present invention, the first terminal of the plurality of data electrostatic discharge circuits is connected to the plurality of data lines, and the second terminal is connected to the common voltage line.

The plurality of second electrostatic discharge circuits of the liquid crystal display device according to an embodiment of the present invention may include a plurality of gate electrostatic discharge circuits and a plurality of first protection circuits connected to the common voltage line; And a plurality of second protection circuits connected to the common voltage line or the common voltage line and the ground line.

In the liquid crystal display device according to the embodiment of the present invention, the plurality of first electrostatic discharge circuits and the second electrostatic discharge circuit are oxide thin film transistors having a length equal to the channel length of the thin film transistors formed in the display region .

In the liquid crystal display device according to the embodiment of the present invention, each of the first electrostatic discharge circuit and the second electrostatic discharge circuit includes a plurality of switching thin film transistors; And a plurality of center thin film transistors formed by connecting a plurality of thin film transistors having a channel length equal to a channel length of the thin film transistor formed in the active region in series.

In the liquid crystal display device according to the embodiment of the present invention, the plurality of center thin film transistors are formed in a structure in which two to seven thin film transistors are connected in series.

In the liquid crystal display device according to the embodiment of the present invention, the plurality of first electrostatic discharge circuits are composed of three switching thin film transistors and two center thin film transistors.

In the liquid crystal display device according to the embodiment of the present invention, the plurality of first electrostatic discharge circuits may include the first center thin film transistor formed between the first switching thin film transistor and the second switching thin film transistor, And the second center thin film transistor is formed between the switching thin film transistor and the third switching thin film transistor.

In the liquid crystal display device according to the embodiment of the present invention, the plurality of second electrostatic discharge circuits may include three switching thin film transistors and two center thin film transistors, or four switching thin film transistors and three And a center thin film transistor.

In the liquid crystal display device according to an embodiment of the present invention, the plurality of second electrostatic discharge circuits may include the first center thin film transistor formed between the first switching thin film transistor and the second switching thin film transistor, The second center thin film transistor is formed between the thin film transistor and the third switching thin film transistor and the third center thin film transistor is formed between the third switching thin film transistor and the fourth switching thin film transistor.

It will be understood by those skilled in the art that the present invention can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: a liquid crystal panel 100;
110: common voltage line 110,
120: common voltage feedback line 120,
130: ground line
140: Common line
200: electrostatic discharge circuit
210: a first electrostatic discharge circuit
212a, 212b: gate electrostatic discharge circuit
214a, 214b: data electrostatic discharge circuit
220: second electrostatic discharge circuit
222a, 222b: first protection circuit
224a, 224b: second protection circuit
300: gate drive circuit
400: Data driving circuit

Claims (12)

A liquid crystal panel formed so that a plurality of gate lines and a plurality of data lines cross each other, and a plurality of pixels are defined;
A gate driving circuit for supplying a gate driving signal to the plurality of gate lines;
A data driving circuit for supplying a data voltage to the plurality of data lines;
A common voltage line for supplying a common voltage to the plurality of pixels;
A ground line for supplying a ground potential to the liquid crystal panel;
A plurality of first electrostatic discharge circuits connected to the plurality of gate lines or the plurality of data lines at an outside of the active area to discharge an overvoltage current; And
And a plurality of second electrostatic discharge circuits connected between the plurality of first electrostatic discharge circuits and the common voltage line or connected to the common voltage line and the ground line to discharge an overvoltage current. Device. The method according to claim 1,
Wherein the plurality of first electrostatic discharge circuits comprise:
A plurality of gate electrostatic discharge circuits disposed between the plurality of gate lines and the common voltage line; And
And a plurality of data electrostatic discharge circuits arranged between the plurality of data lines and the common voltage line. 3. The method of claim 2,
Wherein the first terminal of the plurality of data electrostatic discharge circuits is connected to the plurality of data lines and the second terminal is connected to the ground line. 3. The method of claim 2,
Wherein a first terminal of the plurality of data electrostatic discharge circuits is connected to the plurality of data lines and a second terminal is connected to the common voltage line. The method according to claim 1,
Wherein the plurality of second electrostatic discharge circuits comprise:
A plurality of gate electrostatic discharge circuits and a plurality of first protection circuits coupled to the common voltage line; And
And a plurality of second protection circuits connected to the common voltage line or the common voltage line and the ground line. The method according to claim 1,
The plurality of first electrostatic discharge circuits and the plurality of second electrostatic discharge circuits,
Wherein the thin film transistor is an oxide thin film transistor having a length equal to a channel length of the thin film transistor formed in the display region. The method according to claim 1,
Wherein each of said plurality of first electrostatic discharge circuit and said second electrostatic discharge circuit includes:
A plurality of switching thin film transistors; And
And a plurality of thin film transistors, each thin film transistor having a channel length equal to a channel length of the thin film transistor formed in the active region, the thin film transistors being connected in series. 8. The method of claim 7,
Wherein the plurality of center thin film transistors are formed in a structure in which two to seven thin film transistors are connected in series. 8. The method of claim 7,
Wherein the plurality of first electrostatic discharge circuits comprise:
Wherein the switching thin film transistor comprises three switching thin film transistors and two center thin film transistors. 8. The method of claim 7,
Wherein the plurality of first electrostatic discharge circuits comprise:
The first center thin film transistor is formed between the first switching thin film transistor and the second switching thin film transistor,
And the second center thin film transistor is formed between the second switching thin film transistor and the third switching thin film transistor. 8. The method of claim 7,
Wherein the plurality of second electrostatic discharge circuits comprise:
Wherein the thin film transistor comprises three switching thin film transistors and two center thin film transistors, or four switching thin film transistors and three center thin film transistors. 8. The method of claim 7,
Wherein the plurality of second electrostatic discharge circuits comprise:
The first center thin film transistor is formed between the first switching thin film transistor and the second switching thin film transistor,
The second center thin film transistor is formed between the second switching thin film transistor and the third switching thin film transistor,
And the third center thin film transistor is formed between the third switching thin film transistor and the fourth switching thin film transistor.

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