KR20150048364A - Driving integrated circuit pad unit and flat display panel having the same - Google Patents

Abstract

A rectangular driving integrated circuit pad part having the driving integrated circuit of a flat display panel includes: a first pad part which includes multiple first pads formed on one long side of the driving integrated circuit pad part, a second pad part which includes multiple second pads formed on the other long side of the driving integrated circuit pad part, and multiple test thin film transistors which are arranged between the first pad part and the second pad part and output test signals to the gate lines and data lines formed on a display part. A test driving circuit part having an organic layer is formed in the upper part of the test thin film transistors.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a driving integrated circuit (PDP)

The present invention relates to a display device. More particularly, the present invention relates to a driving integrated circuit pad portion and a flat panel display panel including the same.

A flat panel display panel such as a liquid crystal display (LCD) device and an organic light emitting display (OLED) device can be divided into a display portion and a non-display portion. The display unit includes pixels defined by intersecting gate lines and data lines, and the non-display unit includes a data pad and a gate pad formed at the ends of the gate line and the data line, respectively, to exchange electrical signals with the driving element. The driving element includes a chip or a substrate for driving the flat panel display panel, for example, a driving integrated circuit (D-IC) and a flexible printed circuit board (FPCB).

The method of mounting the driving integrated circuit on the flat panel display panel may be a chip on glass (COG) method, a tape carrier package (TCP) method, a chip on film (COF) method, . Among them, the chip on glass (COG) method has recently been widely used because it has a simple structure and can reduce the volume of the display panel compared to the tape carrier package (TCP) method and the chip on film (COF) method.

The flat panel display panel is provided with a pad portion for contacting the driving integrated circuit or the flexible printed circuit board. As the distance between the pads and the wiring lines becomes narrower, a faulty short circuit between the pads or between the wirings occurs.

It is an object of the present invention to provide a drive integrated circuit pad portion capable of preventing a short circuit failure of a test drive circuit portion.

Another object of the present invention is to provide a flat panel display panel including the driving integrated circuit pad portion.

However, the object of the present invention is not limited to the above-mentioned objects, but may be variously expanded without departing from the spirit and scope of the present invention.

In order to accomplish one object of the present invention, in a rectangular driving integrated circuit pad portion in which a driving integrated circuit of a flat panel display panel according to embodiments of the present invention is mounted, A first pad portion including a plurality of first pads, a second pad portion including a plurality of second pads formed on the other side of the long side of the driving integrated circuit pad portion, and a second pad portion including a second pad portion formed between the first pad portion and the second pad portion And a plurality of test thin film transistors for outputting a test signal to a plurality of data wirings and a plurality of gate wirings formed on the display unit, and a test drive circuit unit having an organic film formed on the test thin film transistors .

According to an embodiment, the first pad portion and the second pad portion may include a gate electrode, a source-drain electrode, and a contact hole.

According to one embodiment, the source-drain electrode may have a triple structure in which titanium (Ti), aluminum (Al), and titanium (Ti) are sequentially stacked.

According to one embodiment, the source-drain electrode may have a triple structure in which molybdenum (Mo), aluminum (Al), and molybdenum (Mo) are sequentially stacked.

According to one embodiment, the organic layer includes a polyimide (PI) resin, a polyamide (PA) resin, an epoxy resin, an acrylate resin, and a urethane acrylate resin. Lt; / RTI >

According to an embodiment, the drive integrated circuit includes a plurality of conductive bumps that are in contact with the first pad portion and the second pad portion at a lower portion thereof, and the organic film is lower than a height of the conductive bump of the drive integrated circuit .

According to an embodiment, the first pad portion and the second pad portion and the bumps may be electrically contacted through an anisotropic conductive film (ACF).

According to one embodiment, the organic layer may be formed as one block on the test driving circuit.

According to one embodiment, the organic layer may be formed of a plurality of blocks on the test driving circuit.

According to another aspect of the present invention, there is provided a flat panel display panel including a display unit having a plurality of pixels defined by a plurality of data lines and a plurality of gate lines, The driving integrated circuit pad portion includes a first pad portion including a plurality of first pads formed on one side of the long side of the driving integrated circuit pad portion, A second pad portion including a plurality of second pads formed on the other side of the long side of the driving integrated circuit pad portion and a second pad portion disposed between the first pad portion and the second pad portion, And a plurality of test thin film transistors for outputting a test signal to gate wirings, It may comprise a test driver circuit portion organic film is formed on top of the register.

According to an embodiment, the first pad portion may be formed adjacent to the display portion, and may be connected to the plurality of data lines and the plurality of gate lines.

According to an embodiment, the second pad portion may be formed facing the first pad portion with the test drive circuit portion as a center, and may be connected to a drive circuit that generates a signal for controlling the operation of the display portion.

According to an embodiment, the first pad portion and the second pad portion may include a gate electrode, a source-drain electrode, and a contact hole.

According to one embodiment, the source-drain electrode may have a triple structure in which titanium (Ti), aluminum (Al), and titanium (Ti) are sequentially stacked.

According to one embodiment, the source-drain electrode may have a triple structure in which molybdenum (Mo), aluminum (Al), and molybdenum (Mo) are sequentially stacked.

According to one embodiment, the organic layer includes a polyimide (PI) resin, a polyamide (PA) resin, an epoxy resin, an acrylate resin, and a urethane acrylate resin. Lt; / RTI >

According to an embodiment, the drive integrated circuit includes a plurality of conductive bumps that are in contact with the first pad portion and the second pad portion at a lower portion thereof, and the organic film is lower than a height of the conductive bump of the drive integrated circuit .

According to an embodiment, the first pad portion and the second pad portion and the bumps can be electrically contacted through the anisotropic conductive film.

According to one embodiment, the organic layer may be formed as one block on the test driving circuit.

According to one embodiment, the organic layer may be formed of a plurality of blocks on the test driving circuit.

The driving integrated circuit pad unit and the flat panel display panel according to the embodiments of the present invention can prevent an occurrence of a short circuit in the test driving circuit unit by forming an organic film on the test driving circuit unit of the driving integrated circuit pad unit. However, the effects of the present invention are not limited to the effects described above, and may be variously extended without departing from the spirit and scope of the present invention.

1 is a plan view showing a driving integrated circuit pad unit according to embodiments of the present invention.
2 is a cross-sectional view of the driving integrated circuit pad portion of FIG.
3 is a cross-sectional view showing an example of a Ti tip defect that occurs in the source-drain electrode of the driving integrated circuit pad portion of FIG.
4 is a cross-sectional view showing an example in which a driving integrated circuit is mounted on the driving integrated circuit pad portion of FIG.
5 is a plan view showing a driving integrated circuit pad unit according to embodiments of the present invention.
6 is a cross-sectional view of the driving integrated circuit pad portion of FIG.
7 is a cross-sectional view showing an example in which a driving integrated circuit is mounted on the driving integrated circuit pad portion of FIG.
8 is a plan view showing a flat panel display panel according to embodiments of the present invention.
9 is a plan view showing a flat panel display device having the flat panel display panel of FIG.
10 is a plan view showing an example of a driving integrated circuit pad portion provided in the flat panel display panel of FIG.
11 is a plan view showing another example of the driving integrated circuit pad portion provided in the flat panel display panel of FIG.

For the embodiments of the invention disclosed herein, specific structural and functional descriptions are set forth for the purpose of describing an embodiment of the invention only, and it is to be understood that the embodiments of the invention may be practiced in various forms, The present invention should not be construed as limited to the embodiments described in Figs.

The present invention is capable of various modifications and various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. It is to be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms may be used for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between. Other expressions that describe the relationship between components, such as "between" and "between" or "neighboring to" and "directly adjacent to" should be interpreted as well.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprise", "having", and the like are intended to specify the presence of stated features, integers, steps, operations, elements, components, or combinations thereof, , Steps, operations, components, parts, or combinations thereof, as a matter of principle.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be construed as meaning consistent with meaning in the context of the relevant art and are not to be construed as ideal or overly formal in meaning unless expressly defined in the present application .

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The same or similar reference numerals are used for the same components in the drawings.

1 is a plan view showing a driving integrated circuit pad unit according to embodiments of the present invention.

Referring to FIG. 1, the driving integrated circuit pad unit 100 may include a first pad unit 110, a second pad unit 120, a test driving circuit unit 130, and an organic layer 140.

The driving integrated circuit pad portion 100 of the flat panel display having a chip on glass (COG) structure can be formed on the non-display portion of the flat panel display panel. At least one or more driving integrated circuit pad portions 100 may be formed on the non-display portion according to the size and resolution of the flat panel display panel. Although not shown in FIG. 1, a connection pad portion for contacting the flexible printed circuit board (FPCB) may be formed on the non-display portion of the flat panel display panel.

A first pad portion 110 including a plurality of first pads 112 may be formed on one side of a long side of the rectangular driving integrated circuit pad portion 100. The plurality of first pads 112 may be formed adjacent to the display portion of the flat panel display panel, and may be connected to a plurality of data lines, a plurality of gate lines, and a plurality of power lines formed on the display portion. The first pad unit 110 may be electrically connected to the driving integrated circuit and may transmit a signal (for example, a data signal and a gate signal) output from the driving integrated circuit to a display unit of the flat panel display panel.

A second pad portion 120 including a plurality of second pads 122 may be formed on the other side of the long side of the driving integrated circuit pad portion 100 of the rectangular shape. The plurality of second pads 122 may be formed adjacent to the outer edge of the flat panel display panel and may be connected to an external driving circuit that generates a signal for controlling the operation of the flat panel display panel. For example, the driving circuit may be a flexible printed circuit board or a printed circuit board (PCB). The second pad unit 120 may be electrically connected to the driving integrated circuit and may transmit a signal transmitted from the driving circuit to the driving integrated circuit.

The test drive circuit unit 130 may be formed between the first pad unit 110 and the second pad unit 120. The test driving circuit unit 130 may include at least one test thin film transistor 132 for outputting a test signal to a plurality of data lines and a plurality of gate lines formed on a display unit of the flat panel display panel. In fabricating the flat panel display panel, a plurality of test thin film transistors (TFTs) formed in the test driving circuit unit 130 are formed after a scribe process of cutting a substrate on which a plurality of data lines and a plurality of gate lines are formed, 132) to inspect whether the data lines and the gate lines are defective. The test driving circuit unit 130 may be configured in various forms according to the driving method of the flat panel display panel and the structure of the data lines and the gate lines. An organic layer 140 may be formed on the test driving circuit portion 130. The organic film 140 may be formed to cover the test thin film transistors 132 of the test drive circuit unit 130 to prevent inter-pad or inter-line short circuits. For example, the organic film 140 may be formed as a single block. The driving integrated circuit pad unit 100 may include a dummy pad 150 and the dummy pad 150 may be electrically connected to the driving integrated circuit to transmit a data signal, a gate signal, and a power signal to the display unit.

2 is a cross-sectional view of the driving integrated circuit pad portion of FIG.

Referring to FIG. 2, the first pad 112, the second pad 122 and the dummy pad 150 of the driving integrated circuit pad unit 100 are electrically connected to the gate electrode 152, the source-drain electrode 156, An insulating film 154 and a contact hole 158. [ Although FIG. 2 shows a cross section of the dummy pad 150, the first pad 112 and the second pad 122 may have the same cross-section as the dummy pad 150. Although not shown in FIG. 2, a connection pad for contacting the flexible printed circuit board may be formed on the non-display portion of the flat panel display panel, and the connection pad may have the same cross section as the dummy pad 150 .

The gate electrode 152 may be formed of the same material as the gate electrode of the thin film transistor formed in the display portion of the flat panel display panel. For example, the gate electrode 152 may be formed of an aluminum-based metal such as aluminum or an aluminum alloy, a silver-based metal such as silver (Ag) or a silver alloy, a copper-based metal such as copper (Cu) (Mo), a molybdenum-based metal such as a molybdenum alloy, chromium (Cr), tantalum (Ta), and titanium (Ti). A gate insulating layer 154 may be formed on the gate electrode 152. The gate insulating film 154 may be formed of the same material as the gate insulating film of the thin film transistor formed in the display portion of the flat panel display panel and may have an opening exposing a part of the gate electrode 152. For example, the gate insulating film 154 may be formed of a silicon nitride film (SiNx) or a silicon oxide film (SiOx). A source-drain electrode 156 may be formed on the opening of the gate electrode 152 and on the gate insulating film 154. The source and drain electrodes 156 may be formed of the same material as the source electrode or the drain electrode of the thin film transistor formed in the display portion of the flat panel display panel. In one embodiment, the source-drain electrode 156 may have a triple structure in which titanium (Ti), aluminum (Al), and titanium (Ti) are sequentially stacked. In another embodiment, the source-drain electrode 156 may have a triple structure in which molybdenum (Mo), aluminum (Al), and molybdenum (Mo) are sequentially stacked.

3 is a cross-sectional view showing an example of a Ti tip defect that occurs in the source-drain electrode of the driving integrated circuit pad portion of FIG.

3, when the source-drain electrode 156 is formed of a triple structure in which titanium (Ti) 156a, aluminum (Al) 156b, and titanium (Ti) 156a are stacked, Failure of the Ti tip may occur. In other words, the etching rate of the titanium (156a) and the aluminum (156b) is different, and the aluminum (156b) is etched at a faster rate than the titanium (156a) in the etching process or the cleaning process, And the upper or lower titanium 156a may cause a short to a neighboring pad or wiring. The chip tip defect is caused by the pads formed on the flat panel display panel, that is, the first pad portion 110, the second pad portion 120, the dummy pad 150 and the connection pad portion (not shown) of the driving integrated circuit pad portion 100 Time). The test thin film transistors 132 of the test drive circuit unit 130 connected to the pads and the wirings may be damaged due to a short circuit between the pads or the wirings and the damage of the test drive circuit unit 130 may be detected by an automatic visual test AVT) and module test (MT test). As the interval between the test TFTs 132 of the test drive circuit unit 130 becomes narrow, there is a high possibility that a line defect due to a Ti tip defect occurs. To prevent this, an organic film 140 is formed on the test drive circuit unit 130 can do. For example, the organic film 140 may be formed as one block covering a plurality of test thin film transistors 132. [ By forming the organic film 140 on the test driving circuit unit 130, even if a short circuit between the pads or between the wirings occurs due to the tie tip failure of the pad unit 100, the test thin film transistor 132 of the test driving circuit unit 130 May be insulated from neighboring test thin film transistors 132 and wirings, so that a short circuit may not occur. In addition, since the organic film 140 is formed on the test driving circuit unit 130, the short circuit between the test TFT 132 and the driving IC can be prevented. For example, the organic layer may include a group including a polyimide (PI) resin, a polyamide (PA) resin, an epoxy resin, an acrylate resin, and a urethane acrylate resin ≪ / RTI > In the present invention, the triple structure in which the source-drain electrodes are sequentially laminated with titanium (Ti), aluminum (Al), and titanium (Ti) has been described. However, the source-drain electrodes may be formed of molybdenum (Mo), aluminum (Al), molybdenum (Mo) and aluminum (Al) are also different from each other in a triple structure in which Mo is sequentially stacked, short circuit may occur in the subsequent process. To prevent this, an organic film 140 is formed on the test driving circuit unit 130 can do. A contact hole 158 may be formed on the source-drain electrode to be electrically connected to the bump of the driving integrated circuit.

4 is a cross-sectional view showing an example in which a driving integrated circuit is mounted on the driving integrated circuit pad portion of FIG.

1, 2, and 4, the driving integrated circuit 300 may be mounted on the driving integrated circuit pad unit 100 and electrically connected thereto. The driving integrated circuit 300 may include a plurality of conductive bumps 320 at a lower portion thereof and the bumps 320 of the driving integrated circuit 300 may be connected to the first pad portion 110 of the driving integrated circuit pad portion 100, The second pad portion 120, and the dummy pad 150, as shown in FIG. 4 shows an example in which the bump 320 of the driving integrated circuit 300 and the dummy pad 150 are in contact with each other. Anisotropic Conductive Film (ACF), which is an adhesive resin, may be applied to the non-display region of the flat panel display panel on which the driving integrated circuit pad portion 100 is formed. The anisotropic conductive film may include a plurality of conductive particles 330. When the driving integrated circuit 300 is mounted on the anisotropic conductive film, the bumps 320 of the driving integrated circuit and the dummy pad 150 of the driving integrated circuit pad unit 100 can be electrically connected by the conductive particles 330 have. 4, an organic layer 140 is formed on the plurality of test TFTs 132 of the test drive circuit unit 130 to electrically connect the test ICs 130 and the test TFTs 132 to each other. A short circuit can be prevented from occurring. The organic film 140 may be formed in a block shape to cover the test driving circuit unit 130 and may be formed to be lower than the height of the conductive bumps 320 of the driving integrated circuit 300.

The organic film 140 is formed on the test driving circuit unit 130 formed on the driving integrated circuit pad unit 100 to check whether there is an abnormality in the gate wiring and the data wiring, Between the pads due to the tie tip defects generated in the first pad portion 110, the second pad portion 120 and the dummy pad 150 electrically connecting the driving integrated circuit pad portion 100 and the driving integrated circuit pad portion 100, It is possible to prevent a short circuit between the wirings of the circuit part 130. [

5 is a plan view showing a driving integrated circuit pad unit according to another embodiment of the present invention. In this case, the driving integrated circuit pad unit 200 of FIG. 5 is substantially the same as or similar to the driving integrated circuit pad unit 100 of FIG. 1, except that the organic film 240 is formed in a plurality of blocks. Configuration. Therefore, in the following description of the drive integrated circuit pad unit 200 of FIG. 5, description of the same or similar components as those of the drive integrated circuit pad unit 100 of FIG. 1 will be omitted.

5, the driving integrated circuit pad unit 200 may include a first pad unit 210, a second pad unit 220, a test driving circuit unit 230, and an organic layer 240. The driving pad 200 of the rectangular driving integrated circuit includes a first pad portion 210 including a plurality of first pads 212 and a second pad portion 210 including a plurality of second pads 222 220 may be formed facing each other. At least one test thin film transistor for outputting a test signal to a plurality of data lines and a plurality of gate lines formed in a display portion of the flat panel display panel is provided between the first pad portion 210 and the second pad portion 222, A test driving circuit portion 230 including a plurality of test driver circuit portions 232 may be formed. An organic film 240 may be formed on the test drive circuit portion 232. The organic film 240 may be formed on each of the test thin film transistors 232 of the test drive circuit unit 230. For example, the organic film 240 may be formed in a plurality of blocks, and the shape of the organic film 240 may vary depending on the shape and size of the test driving circuit 230. The driving integrated circuit pad unit 200 may include a dummy pad 250 and the dummy pad 250 may be electrically connected to the driving integrated circuit to transmit a data signal, a gate signal, and a power supply signal to the display unit.

6 is a cross-sectional view of the driving integrated circuit pad portion of FIG.

6, the first pad 212, the second pad 222, and the dummy pad 250 of the driving integrated circuit pad unit 200 include a gate electrode 252, a source-drain electrode 256, An insulating film 254 and a contact hole 258. [ 6 illustrates a cross section of dummy pad 250, first pad 212 and second pad 222 may have the same cross-section as dummy pad 250. Although not shown in FIGS. 5 and 6, a connection pad for contacting the flexible printed circuit board may be formed on the non-display portion of the flat panel display panel, and the connection pad may have the same cross section as the dummy pad 250 Lt; / RTI >

The gate electrode 252 may be formed of the same material as the gate electrode of the thin film transistor formed in the display portion of the flat panel display panel. For example, the gate electrode 252 may be formed of an aluminum-based metal such as aluminum (Al) or aluminum alloy, a silver-based metal such as silver (Ag) or a silver alloy, a copper-based metal such as copper (Cu) (Mo), a molybdenum-based metal such as a molybdenum alloy, chromium (Cr), tantalum (Ta), and titanium (Ti). A gate insulating layer 254 may be formed on the gate electrode 252. The gate insulating layer 254 may be formed of the same material as the gate insulating layer of the thin film transistor formed in the display portion of the flat panel display panel and may have an opening exposing a portion of the gate electrode 252. For example, the gate insulating film 254 may be formed of a silicon nitride film (SiNx) or a silicon oxide film (SiOx). A source-drain electrode 256 may be formed in the opening of the gate electrode 252 and the gate insulating film 254. The source and drain electrodes 256 may be formed of the same material in the same layer as the source electrode or the drain electrode of the thin film transistor formed in the display portion of the flat panel display panel. In one embodiment, the source-drain electrode 256 may have a triple structure in which titanium (Ti), aluminum (Al), and titanium (Ti) are sequentially stacked. In another embodiment, the source-drain electrode 256 may have a triple structure in which molybdenum (Mo), aluminum (Al), and molybdenum (Mo) are sequentially stacked. When the source-drain electrode 256 is formed of a triple structure in which titanium (Ti), aluminum (Al), and titanium (Ti) are stacked, a Ti tip defect may occur in a subsequent process as shown in FIG. Tie tip failure can result in short circuiting between pads or between wirings, resulting in damage of the test thin film transistor 232 of the test drive circuit portion 230. As the interval between the test TFTs 230 of the test drive circuit unit 230 is narrow, there is a high possibility that a line defect due to a Ti tip defect occurs. To prevent this, an organic film 240 is formed on the test drive circuit unit 230 can do. For example, the organic film 240 may be formed in a plurality of blocks on each of the test thin film transistors 232 of the test drive circuit unit 230. The shape in which the organic layer 240 is formed may vary depending on the shape and size of the test drive circuit portion 230.

7 is a cross-sectional view showing an example in which a driving integrated circuit is mounted on the driving integrated circuit pad portion of FIG.

Referring to FIG. 7, the driving integrated circuit 300 may be mounted on the driving integrated circuit pad unit 200 to be electrically connected thereto. The driving integrated circuit 300 may include a plurality of conductive bumps 320 at a lower portion thereof and the bumps 320 of the driving integrated circuit 300 may be connected to the first pad portion 210 of the driving integrated circuit pad portion 200, The second pad portion 220, and the dummy pad 250, as shown in FIG. 7 shows an example in which the bump 320 of the driving integrated circuit 300 and the dummy pad 250 are in contact with each other. Anisotropic conductive film which is an adhesive resin can be applied to the non-display area of the flat panel display panel where the driving integrated circuit pad unit 200 is formed. The anisotropic conductive film may include a plurality of conductive particles 330. When the driving integrated circuit 300 is mounted on the anisotropic conductive film, the conductive particles 330 electrically connect the bumps 320 of the driving integrated circuit and the dummy pad 250 of the driving integrated circuit pad unit 200 have. 7, an organic film 240 is formed on the test TFTs 232 of the test drive circuit 230 so that an electrical short circuit occurs between the drive IC 300 and the TFT 232 Can be prevented. The organic film 240 may be formed in a plurality of blocks on each of the test thin film transistors 232 of the test drive circuit unit 230 and may be formed to have a height lower than the height of the conductive bumps 320 of the drive integrated circuit 300 .

The organic layer 240 is formed on the test driving circuit portion 230 formed on the driving integrated circuit pad portion 200 to check whether the gate wiring and the data wiring are abnormal, Between the pads due to the tie tip failure occurring in the first pad portion 210, the second pad portion 220 and the dummy pad 250 electrically connecting the driving integrated circuit pad portion 200 and the test driving circuit portion It is possible to prevent a short circuit between the wirings of the power supply 230.

FIG. 8 is a plan view showing a flat panel display panel according to an embodiment of the present invention, and FIG. 9 is a plan view showing a flat panel display including the flat panel display panel of FIG.

8 and 9, the flat panel display panel 1000 includes a display unit 400 and a non-display unit 500. On the non-display unit 500, the driving integrated circuit pad units 100 and 200, (800) may be formed.

The flat panel display panel 1000 can be divided into a display unit 400 for displaying an image and a non-display unit 500 for covering an edge of the display unit 400. The display unit 400 includes a plurality of gate lines extending in a first direction of the flat panel display panel (for example, the long axis direction of the display unit 400) (For example, the minor axis direction of the display portion 400) intersecting with the first direction (the major axis direction). The pixel Px may be located in a region where the gate wiring and the data wiring cross each other. Each pixel Px may include a gate electrode, an active layer, and a thin film transistor composed of a source electrode and a drain electrode.

The flat panel display panel 1000 having a chip on glass structure includes a data driving integrated circuit for applying a data signal voltage to a data line to a non-display portion 500 covering an edge of the display portion 400, The driving integrated circuit pad portions 100 and 200 on which the gate driving integrated circuit is mounted and the connection pad portion 800 contacting the flexible printed circuit board 600 connecting the external driving circuit and the flat panel display panel. The driving integrated circuit 300 may be mounted on the driving integrated circuit pad unit 100 and may be electrically connected to the driving integrated circuit pad unit 100. The driving integrated circuit pad unit 100 may be connected to a data line, a gate line, and a power line formed in the display unit 400 to supply a signal transmitted from the driving integrated circuit 300 to a data line, a gate line, and a power line . The number of the driving integrated circuit pad portions 100 may vary according to the size of the flat panel display panel 1000 and the display specification. A flexible circuit board 600 is connected to the upper part of the connection pad unit 800 to electrically connect the external driving circuit 700 and the flat panel display panel 1000. The driving power and signals transmitted from the driving circuit 500 may be transmitted to the driving integrated circuit 300 via the flexible printed circuit board 600 and the connection pad 800. [ For example, the driving circuit 700 may be a flexible printed circuit board or a printed circuit board. If the connection pad portion 800 can include a plurality of connection pads, the connection pads may have the same structure as the first pads, the second pads, and the dummy pads of the driving integrated circuit pad portion.

The first pad, the second pad, the dummy pad, and the connection pad may have a source-drain electrode, and the source-drain electrode may be formed of a triple structure in which titanium, aluminum, and titanium are sequentially stacked. A source-drain electrode in which titanium, aluminum, and titanium are stacked in order may cause a Ti tip failure in a subsequent process such as an etching process or a cleaning process, thereby causing a short between adjacent pads or wirings. The test thin film transistor of the test drive circuit portion connected to the pads and the wirings may be damaged due to a short circuit between the pads or the wirings and the damage of the test drive circuit portion may be detected as a line defect in the automatic appearance inspection and module inspection process. As the interval between the test thin film transistors of the test drive circuit part becomes narrower, there is a high possibility that a line failure due to a Ti tip defect occurs. To prevent this, an organic film can be formed on the test drive circuit part.

10 is a plan view showing an example of the driving integrated circuit pad portion of FIG.

Referring to FIG. 10, the driving integrated circuit pad unit 100 may include a first pad unit 110, a second pad unit 120, a test driving circuit unit 130, and an organic layer 140. A first pad portion 110 including a plurality of first pads 112 may be formed on one side of a long side of the rectangular driving integrated circuit pad portion 100. The plurality of first pads 112 are formed adjacent to the display unit 400 of the flat panel display panel 1000 and include a plurality of data lines, a plurality of gate lines, and a plurality of power lines Lt; / RTI > The first pad unit 110 is electrically connected to the driving integrated circuit 300 and outputs a signal (for example, a data signal and a gate signal) output from the driving integrated circuit 300 to a display unit (400).

A second pad portion 120 including a plurality of second pads 122 may be formed on the other side of the long side of the driving integrated circuit pad portion 100 of the rectangular shape. The plurality of second pads 122 may be formed adjacent to the outer frame portion of the flat panel display panel 1000 and may be connected to an external driving circuit 700 that generates a signal for controlling the operation of the flat panel display panel 1000 . For example, the drive circuit 700 may be a flexible printed circuit board or a printed circuit board. The second pad unit 120 may be electrically connected to the driving integrated circuit 300 and may transmit a signal transmitted from the driving circuit 700 to the driving integrated circuit 300.

The test drive circuit unit 130 may be formed between the first pad unit 110 and the second pad unit 120. The test drive circuit unit 130 includes at least one test thin film transistor 132 for outputting a test signal to a plurality of data wirings and a plurality of gate wirings formed in the display unit 400 of the flat panel display panel 1000 . A test thin film transistor 132 formed in a test driving circuit unit 130 may be formed by a scribing process in which a substrate on which a plurality of data lines and a plurality of gate lines are formed is cut in a cell unit, To check whether the data lines and the gate lines are defective. The test driving circuit unit 130 may be configured in various forms according to the driving method of the flat panel display panel 1000 and the structure of the data lines and gate lines. An organic layer 140 may be formed on the test driving circuit portion 130. The organic film 140 may be formed to cover the test thin film transistors 132 of the test driving circuit unit 130 to prevent inter-pad or inter-line short circuits. For example, the organic film 140 may be formed as a single block. The driving integrated circuit pad unit 100 may include a dummy pad 150 and the dummy pad 150 may be electrically connected to the driving integrated circuit 300 to transmit a data signal, a gate signal, and a power supply signal.

11 is a plan view showing another example of the drive integrated circuit pad portion of Fig.

Referring to FIG. 11, the driving integrated circuit pad unit 200 may include a first pad unit 210, a second pad unit 220, a test driving circuit unit 230, and an organic layer 240. A first pad portion 210 including a plurality of first pads 212 may be formed on one side of a long side of the rectangular driving integrated circuit pad portion 200. The plurality of first pads 212 are formed adjacent to the display unit 400 of the flat panel display panel 1000 and include a plurality of data lines, a plurality of gate lines, and a plurality of power lines Lt; / RTI > The first pad unit 210 is electrically connected to the driving integrated circuit 300 and outputs a signal (for example, a data signal and a gate signal) output from the driving integrated circuit 300 to a display unit (400).

A second pad portion 220 including a plurality of second pads 222 may be formed on the other side of the long side of the driving integrated circuit pad portion 200 of the rectangular shape. The plurality of second pads 222 may be formed adjacent to the outer edge of the flat panel display panel 1000 and may be connected to an external driving circuit 700 that generates a signal for controlling the operation of the flat panel display panel 1000 . For example, the drive circuit 700 may be a flexible printed circuit board or a printed circuit board. The second pad unit 220 may be electrically connected to the driving integrated circuit 300 and may transmit a signal transmitted from the driving circuit 700 to the driving integrated circuit 300.

The test drive circuit portion 230 may be formed between the first pad portion 210 and the second pad portion 220. The test driving circuit unit 230 includes at least one test thin film transistor 232 for outputting a test signal to a plurality of data lines and a plurality of gate lines formed in the display unit 400 of the flat panel display panel 1000 . In fabricating the flat panel display panel 1000, a scribe process for cutting a substrate, on which a plurality of data lines and a plurality of gate lines are formed, is cut in units of cells. Then, the test thin film transistors 232 formed in the test drive circuit portion 230 are supplied with signals So as to check whether the data lines and the gate lines are defective. The test driving circuit unit 230 may be configured in various forms according to the driving method of the flat panel display panel 1000 and the structure of the data lines and gate lines. An organic film 240 may be formed on the test driving circuit portion 230. The organic film 240 may be formed on each of the test thin film transistors 232 of the test drive circuit unit 230. For example, the organic film 240 may be formed in a plurality of blocks, and the shape of the organic film 240 may vary depending on the shape and size of the test driving circuit 230. The driving integrated circuit pad unit 200 may include a dummy pad 250 to transmit a data signal, a gate signal, and a power supply signal. The driving integrated circuit pad unit 200 may include a dummy pad 250 and the dummy pad 250 may be electrically connected to the driving integrated circuit 300 to transmit a data signal, a gate signal, and a power supply signal.

As described above, in order to confirm whether there is an abnormality in the gate wiring and the data wiring of the flat panel display panel 1000, an organic layer (not shown) is formed on the test driving circuit portions 130 and 230 formed on the driving integrated circuit pad portions 100 and 200 The first pad portions 110 and 210 and the second pad portions 120 and 220 electrically connect the driving integrated circuit 300 and the driving integrated circuit pad portions 100 and 200 by forming the first pad portions 140 and 240, It is possible to prevent a short circuit between the pads due to the tie tip failure occurring in the dummy pads 150 and 250 and the connection pad 800 and a short circuit between the wirings of the test driving circuit units 130 and 230.

The present invention can be applied to all systems having flat panel display panels. For example, the present invention can be applied to a television, a computer monitor, a notebook, a digital camera, a mobile phone, a smart phone, a PDA, a PMP, an MP3 player, a navigation device,

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. It will be understood that the invention may be modified and varied without departing from the scope of the invention.

100, 200: driving integrated circuit pad portion
110, 210: first pad portion 20, 220: second pad portion
112, 212: first pad 212, 222: second pad
130, and 230: Test drive circuit
132, 232: test thin film transistor
140, 240: organic film 50, 250: dummy pad
152, 252: gate electrode 54, 254: gate insulating film
156, 256: source-drain electrode 158, 258: contact hole
300: drive integrated circuit 320: bump
330: conductive particles 00: display part
500: non-display portion 600: flexible printed circuit board
700: drive circuit 00: connection pad

Claims (20)

A first pad portion including a plurality of first pads formed on one side of a long side of the driving integrated circuit pad portion,
A second pad portion including a plurality of second pads formed on the other side of the long side of the driving integrated circuit pad portion; And
And a plurality of test thin film transistors disposed between the first pad portion and the second pad portion for outputting a test signal to a plurality of data wirings and a plurality of gate wirings formed on the display portion, And a test drive circuit portion having an organic film formed on top of the test thin film transistors. The driving integrated circuit pad unit according to claim 1, wherein the first pad portion and the second pad portion include a gate electrode, a source-drain electrode, and a contact hole. The driving integrated circuit pad unit according to claim 2, wherein the source-drain electrode has a triple structure in which titanium (Ti), aluminum (Al), and titanium (Ti) are sequentially stacked. The driving integrated circuit pad unit according to claim 2, wherein the source-drain electrode has a triple structure in which molybdenum (Mo), aluminum (Al), and molybdenum (Mo) are sequentially stacked. The method of claim 1, wherein the organic layer includes a polyimide (PI) resin, a polyamide (PA) resin, an epoxy resin, an acrylate resin, and a urethane acrylate resin Wherein the driving integrated circuit pad portion is selected from the group consisting of a plurality of driving integrated circuits. The driving IC according to claim 1, wherein the driving integrated circuit includes a plurality of conductive bumps which are in contact with the first pad portion and the second pad portion at a lower portion thereof, and the organic film is lower than the height of the conductive bumps of the driving integrated circuit Wherein the driving integrated circuit pad portion comprises: The driving integrated circuit pad unit according to claim 6, wherein the first pad portion and the second pad portion and the bumps are electrically contacted through an anisotropic conductive film (ACF). The driving integrated circuit pad unit according to claim 1, wherein the organic film is formed as one block on the test driving circuit unit. The driving integrated circuit pad unit according to claim 1, wherein the organic film is formed on the test driving circuit unit in a plurality of blocks. A display unit in which a plurality of pixels are defined by a plurality of data lines and a plurality of gate lines; And
And a driving integrated circuit pad portion having a rectangular shape in which a driving integrated circuit for supplying a data signal and a gate signal to the display portion is mounted,
The drive integrated circuit pad portion
A first pad portion including a plurality of first pads formed on one side of a long side of the driving integrated circuit pad portion;
A second pad portion including a plurality of second pads formed on the other side of the long side of the driving integrated circuit pad portion; And
And a plurality of test thin film transistors disposed between the first pad portion and the second pad portion for outputting a test signal to the plurality of data lines and the plurality of gate lines, And a test driving circuit unit having an organic film formed on the upper surface thereof. The flat panel display panel of claim 10, wherein the first pad portion is formed adjacent to the display portion, and is connected to the plurality of data lines and the plurality of gate lines. The flat panel display according to claim 10, wherein the second pad portion is formed facing the first pad portion with the test drive circuit portion as a center, and connected to a drive circuit for generating a signal for controlling the operation of the display portion Display panel. 11. The flat panel display panel of claim 10, wherein the first pad portion and the second pad portion include a gate electrode, a source-drain electrode, and a contact hole. 14. The flat panel display panel of claim 13, wherein the source-drain electrode has a triple structure in which titanium (Ti), aluminum (Al), and titanium (Ti) are sequentially stacked. 14. The flat panel display panel of claim 13, wherein the source-drain electrode has a triple structure in which molybdenum (Mo), aluminum (Al), and molybdenum (Mo) are sequentially stacked. The method of claim 10, wherein the organic layer includes a polyimide (PI) resin, a polyamide (PA) resin, an epoxy resin, an acrylate resin, and a urethane acrylate resin. Wherein the flat panel display panel is a flat panel display panel. The driving IC according to claim 10, wherein the driving integrated circuit includes a plurality of conductive bumps which are in contact with the first pad portion and the second pad portion at a lower portion thereof, and the organic film is lower than the height of the conductive bumps of the driving integrated circuit Wherein the flat panel display panel is a flat display panel. 18. The flat panel display panel of claim 17, wherein the first and second pad portions and the bumps are electrically contacted through an anisotropic conductive film. The flat panel display panel according to claim 10, wherein the organic film is formed as one block on the test driving circuit. 11. The flat panel display panel of claim 10, wherein the organic film is formed on the test driving circuit unit in a plurality of blocks.

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