KR20150012119A - Nitride semiconductor and method thereof - Google Patents

Abstract

Provided are a nitride semiconductor device and a method thereof. The nitride semiconductor device has a multi-buffer layer of an AlN/AlGaN/GaN structure to minimize an increase in a breakdown voltage and a leakage current generated in manufacturing the HFET device of a heterojunction structure. For this, a semiconductor device according to an embodiment includes a buffer layer; a multi-buffer layer formed on the buffer layer; a GaN channel layer formed on the multi-buffer layer; and an AlGaN barrier layer formed on the GaN channel layer. The multi-buffer layer can be formed by stacking multi-thin films where a first thin film, a second thin film, and a third thin film layer are stacked.

Description

[0001] NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING [0002]

TECHNICAL FIELD [0001] The present invention relates to a semiconductor device and a manufacturing method thereof.

With the emphasis on green energy, the importance of power semiconductors is growing. Power semiconductors used in inverters such as electric vehicles, air conditioners and refrigerators are currently being manufactured by Silicon. However, nitride semiconductors of new materials are attracting attention as high critical electric field, low on resistance, high temperature and high frequency operation characteristics as compared with silicon and are being studied as materials of next generation power semiconductor devices.

Recently, mainstream power MOSFETs and IGBTs have been widely used in high output power devices, and devices such as HEMTs, HFETs, and MOSFETs have been studied in GaN series.

In the case of HEMTs, high-electron mobility is used for communication devices having high-frequency characteristics.

In addition, HEMTs have been used for power semiconductor devices and communication devices with high frequency characteristics. In recent years, hybrid / fuel cell vehicles are being developed, and hybrid cars are being launched by many overseas companies. A voltage booster converter that connects a motor and a generator in a hybrid vehicle and a semiconductor switch in the inverter require reliable operation at high temperatures due to the heat generated by the engine. The wide bandgap of GaN enables reliable high temperature operation and is suitable as a next-generation semiconductor switch in hybrid vehicles.

Among them, Furukawa Electric of Japan has announced the discrete high-electron-mobility transistor (HEMT) of AlGaN / GaN. It has high breakdown voltage of 750 V and low on-resistance of 6.3 mΩ-cm2, , Si superjunction MOSFET and SiC MESFET. In addition, GaN discrete was stable at a high temperature of 225 ℃.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is an exemplary diagram illustrating the general structure of a heterojunction field effect transistor (HFET).

Referring to FIG. 1, a general HFET can switch a 2DEG current flowing from a drain electrode to a source electrode through a schottky gate electrode.

A general HFET 10 includes a substrate (not shown), a first GaN layer 11 formed on the substrate, an AlGaN layer 12 formed on the first GaN layer, a second GaN layer 12 formed on the AlGaN layer, A layer 13, a gate electrode 14, a source electrode 15 and a drain electrode 16 formed on the second GaN layer.

On the other hand, in the case of a device using GaN, the price and characteristics of the device may be changed depending on the substrate selection. GaN on Silicon is the most commonly used structure due to its low cost and the establishment of a silicon process. However, due to the high lattice mismatch, epi can be defective and the silicon substrate is stressed, resulting in high bow and surface cracks. If GaN is directly grown on the silicon, the silicon may be etched on the GaN due to the melting back phenomenon.

The technique disclosed in the present specification relates to a nitride semiconductor power device having a multi-buffer structure of AlN / AlGaN / GaN structure for minimizing an increase in leakage current and a decrease in breakdown voltage generated when manufacturing an HFET device of a heterojunction structure, And a manufacturing method thereof.

According to an aspect of the present invention, there is provided a semiconductor device comprising: a buffer layer; A multi-buffer layer formed on the buffer layer; A GaN channel layer formed on the multi-buffer layer; And an AlGaN barrier layer formed on the GaN channel layer. The multi-buffer layer may be formed by stacking a plurality of first thin film layers, second thin film layers, and third thin film layers.

As an example related to the present specification, the thickness of the buffer layer may be 1 nm to 7 um.

As an example related to the present specification, the buffer layer may include at least one of an AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN.

As one example related to the present specification, the AlN buffer layer may include a plurality of layers made of AlN grown at different temperatures.

As an example related to the present specification, the number of the plurality of layers made of AlN grown at the different temperatures may be 2 to 5.

As one example related to the present specification, the AlN buffer layer includes a first AlN layer grown at a low temperature; And a second AlN layer formed on the first AlN layer and grown at a high temperature.

As one example related to the present specification, the AlGaN buffer layer may include a plurality of layers made of AlGaN having different Al compositions.

As an example related to the present specification, the number of the plurality of layers made of AlGaN having different Al compositions may be 2 to 5.

As one example related to the present specification, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be continuously decreased with a specific slope in the stacking direction.

As one example related to the present specification, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be discontinuously decreased in the stacking direction.

In one embodiment of the present invention, at least one of the first thin film layer, the second thin film layer and the third thin film layer may have a thickness of 5 nm to 35 nm.

As an example related to the present specification, the first thin film layer may be made of AlN, the second thin film layer may be made of AlGaN, and the third thin film layer may be made of GaN.

As an example related to the present specification, the number of the multiple thin film layers to be stacked may be 20 to 100.

As an example related to the present specification, the multiple buffer layer may be doped with a p-type dopant.

As one example related to the present specification, the p-type dopant may be at least one of Mg, C and Fe.

As an example related to the present specification, the concentration of the p-type dopant may be 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

As an example related to the present specification, the concentration of the p-type dopant may be decreased according to the stacking direction of the multiple buffer layers.

As an example related to the present specification, the thickness of the GaN channel layer may be 1 um to 3 um.

As an example related to the present specification, the GaN channel layer may be doped with at least one dopant of Mg, C and Fe.

As an example related to the present specification, the at least one dopant concentration may be 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

As an example related to the present specification, the thickness of the AlGaN barrier layer may be 10 nm to 30 nm.

As one example related to the present specification, the AlN layer may be formed on a substrate.

As one example related to the present specification, the substrate may be made of at least one of Si, SiC, Sapphire, and GaN.

As an example related to the present specification, the semiconductor device may further include a source electrode, a drain electrode, and a gate electrode formed on a part of the AlGaN barrier layer.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, including: forming a buffer layer on a substrate; Forming a multi-buffer layer on the buffer layer; Forming a GaN channel layer on the multi-buffer layer; And forming an AlGaN barrier layer on the GaN channel layer, wherein the multiple buffer layer may be formed by stacking a plurality of thin film layers in which first thin film layers, second thin film layers and third thin film layers are stacked.

At least one of the buffer layer, the multiple buffer layer, the GaN channel layer, and the AlGaN barrier layer may be formed by an organic metal vapor deposition (MOCVD), a molecular beam epitaxy (MBE), a helium vapor phase growth (HVPE), Plasma-enhanced chemical vapor deposition (PECVD), sputtering, and atomic layer deposition (ALD).

According to one embodiment disclosed herein, a nitride semiconductor having a multi-buffer structure of AlN / AlGaN / GaN structure for minimizing a leakage current increase and a breakdown voltage reduction occurring when fabricating an HFET device of a heterojunction structure A power device and a manufacturing method thereof are provided.

In particular, according to the semiconductor device disclosed in this specification, the growth inconsistency due to the difference in lattice constant between AlN and GaN is relaxed to an AlGaN layer having a medium-sized lattice constant, thereby minimizing the occurrence of leakage currents occurring at the interface have.

Further, since the growth interface and the film quality of the multi-buffer layer are improved, the crystallinity of the GaN channel on the GaN channel can be improved. Therefore, a high-output GaN semiconductor device capable of further blocking the leakage current from the active layer to the epi- Can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is an exemplary diagram illustrating the general structure of a heterojunction field effect transistor (HFET).
2 is an exemplary view showing a structure of a semiconductor device according to an embodiment disclosed herein.
3 is a graph illustrating the doping profile of an Fe dopant according to one embodiment disclosed herein.
4 is a graph depicting the doping profile of an Fe dopant according to another embodiment disclosed herein.
5 is a flowchart showing a method of manufacturing a semiconductor device according to an embodiment disclosed herein.
6A to 6F are views showing an example of a method of manufacturing a semiconductor device according to an embodiment disclosed herein.

The techniques disclosed herein can be applied to a heterojunction field effect transistor and a manufacturing method thereof. However, the technique disclosed in this specification is not limited thereto, and can be applied to all nitride-based semiconductor devices to which the technical idea of the above-described technique can be applied and a manufacturing method thereof.

In recent years, according to the growth technology of a nitride semiconductor, the development of a light emitting diode and a blue-violet laser diode covering a red wavelength band in ultraviolet rays has been completed and has already been widely used in traffic lights, electric sign boards, mobile phones and the like.

Compared with Si-based devices, power-supply devices using nitride semiconductors have superior switching speed and withstand voltage characteristics, and have high current saturation rates, which is advantageous over Si-based devices for high-power, high-voltage applications.

That is, since GaN, which is a typical nitride semiconductor, has a large band gap energy and can form a two-dimensional 2DEG channel through heterojunction, the threshold voltage is large and high-speed operation can be performed.

These high power, high speed characteristics are attracting attention as a next generation power semiconductor material because they are well suited for power semiconductors that require high operating voltage and low energy loss on switching.

In order to fabricate such a nitride-based HFET, an epitaxial layer having a 2DEG structure must be grown. In general, substrates such as sapphire, Si, SiC and AlN are used.

Here, Si substrates have many merits as substrates for nitride power semiconductors because they can be mass-produced and have a low cost. However, the thermal expansion coefficient of Si is lower than that of GaN, and the probability of cracking is increased due to the tensile stress of the GaN layer at the time of cooling down after growth.

That is, since compound semiconductors are generally used on different types of substrates, stress and defects due to difference in lattice constant may occur. It is difficult to grow a high-quality epilayer due to crystal defects caused by incomplete bonding of compounds, There may be a disadvantage in that there is.

As a method for preventing such a crack, an epitaxial structure of a general nitride-based power device can be mentioned as a structure that relaxes the tensile stress by inserting an AlN layer having a thermal expansion coefficient intermediate between the Si substrate and GaN.

The disclosed technology relates to a method of fabricating a nitride semiconductor HFET device, and more particularly, to a device manufacturing method and structure for making a high power device.

Specifically, the technique disclosed in this specification relates to a method of growing a nitride semiconductor for manufacturing an HFET power device, which suppresses the generation of cracks due to a difference in thermal expansion coefficient when growing GaN nitride on a Si substrate, And a growth method that minimizes growth.

Specifically, the technique disclosed in the present specification uses a multi-buffer made of AlN / AlGaN / GaN to mitigate the deterioration in characteristics of the growth interface due to the difference in lattice constant between AlN and GaN to minimize the leakage current, And to provide a high-voltage nitride HFET device having improved switching efficiency by improving crystallinity of a growing GaN channel.

A typical AlN / GaN superlattice structure may show a tendency to decrease vertical and lateral leakage current due to the semi-insulating effect of GaN with high energy band gap and carbon (C) doping content of AlN.

However, in order to perform carbon doping in the AlN / GaN superlattice structure, a growth rate of GaN is usually increased to form a high carbon content in the GaN crystal in the TMGa source itself.

However, when the growth rate of GaN is increased, a carbon bond may be formed at the same time when Ga and NH3 bond to each other, which may result in crystal defects that are unintended in the GaN thin film. This has the effect of preventing the leakage current by keeping the electrons from moving, but on the other hand, the crystallinity of the GaN thin film can be decreased.

Therefore, when a multi-buffer having AlGaN interposed between AlN and GaN is used, the nitride HFET device capable of further improving the interfacial characteristics and further reducing the leakage current Can be provided.

That is, according to the technique disclosed in this specification, by inserting an AlGaN layer having a medium-sized lattice constant between AlN and GaN, it is possible to reduce the increase of lattice mismatch caused thereby and improve the quality of the thin film, and a multi-buffer layer which increases the semi-insulating effect when carbon (C) doping or the like is performed, and a method of manufacturing the semiconductor device.

It is noted that the technical terms used herein are used only to describe specific embodiments and are not intended to limit the scope of the technology disclosed herein. Also, the technical terms used herein should be interpreted as being generally understood by those skilled in the art to which the presently disclosed subject matter belongs, unless the context clearly dictates otherwise in this specification, Should not be construed in a broader sense, or interpreted in an oversimplified sense. In addition, when a technical term used in this specification is an erroneous technical term that does not accurately express the concept of the technology disclosed in this specification, it should be understood that technical terms which can be understood by a person skilled in the art are replaced. Also, the general terms used in the present specification should be interpreted in accordance with the predefined or prior context, and should not be construed as being excessively reduced in meaning.

Also, the singular forms "as used herein include plural referents unless the context clearly dictates otherwise. In this specification, the terms "comprising ", or" comprising ", etc. should not be construed as necessarily including the various elements or steps described in the specification, Or may be further comprised of additional components or steps.

Furthermore, terms including ordinals such as first, second, etc. used in this specification can be used to describe various elements, but the elements should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, wherein like reference numerals denote like or similar elements, and redundant description thereof will be omitted.

Further, in the description of the technology disclosed in this specification, a detailed description of related arts will be omitted if it is determined that the gist of the technology disclosed in this specification may be obscured. It is to be noted that the attached drawings are only for the purpose of easily understanding the concept of the technology disclosed in the present specification, and should not be construed as limiting the spirit of the technology by the attached drawings.

In the nitride-based semiconductor device, In the buffer layer  Explanation for

In power semiconductors, nitride semiconductors (GaN) are attracting attention as devices with high breakdown voltage and low on-resistance.

However, it is difficult to grow the device because the cost of the substrate is high and it is difficult to grow the device to maintain the lattice mismatch without defective GaN.

In addition, sapphire and SiC can not be processed by conventional semiconductor processes in post-growth process, so new process processes may need to be developed.

For this reason, we will use Silicon, which is a low-cost, low-cost substrate for semiconductor processing. In the case of Silicon, lattice mismatch with GaN, which is a nitride semiconductor, If the device is fabricated, the leakage current of the device can be increased by acting as a leakage path.

Therefore, when a buffer layer such as AlGaN is inserted between the GaN and the silicon substrate, the defect density can be reduced by reducing the lattice mismatch, and the Epi stress due to the difference in the lattice constant between the GaN and the silicon is reduced , even if the thicker GaN is grown, the generation of cracks can be prevented.

In the case of the device using Grade AlGaN buffer, the AlGaN layer having 1 to 5 Al compositions is grown on the AlN nucleation layer, thereby reducing the latitude mismatch between the silicon and the GaN buffer layer and growing the thick GaN buffer layer There may be advantages to grow.

Hereinafter, the buffer layer in the nitride semiconductor device according to the embodiment disclosed in this specification will be described in more detail.

II-V compound semiconductors are advantageous for high-speed and high-power devices because they can produce devices with high mobility and high current density by using 2-dimentional electron gas (2DEG) due to heterojunction have.

However, due to the 2DEG generated by the structural characteristics, the device has a normally-on characteristic, and since the additional voltage is applied for the off state, the standby state of the device also consumes power.

Compound semiconductors such as GaN have a weak n-type doping effect without intentional doping due to N-vacancy occurring in the bonding process such as Gallium and Nitride, and donors derived from impurities existing in the reaction chamber .

This defects and impurities act to lower the resistivity of GaN, which may cause leakage current problems to the outside region of the active layer.

The MOCVD process is known to typically form GaN with an electron concentration of 1 x 10 ¹⁶ cm ^-3 .

In addition, since they are grown on different substrates such as sapphire, SiC, and Si, defects due to the difference in lattice constant with the substrate are generated. Therefore, when a conductive substrate such as Si is used, it is vulnerable to leakage current. Therefore, there is a need for a method for suppressing the leakage current and the leakage current through the buffer layer (or the buffer layer) and the normally off-off characteristic of the device.

There are several ways to reduce the leakage current from the epilayers in a nitride semiconductor power device with a heterojunction structure.

In particular, there may be a method of growing at least one buffer layer between the substrate and the GaN layer to reduce the leakage current.

In addition, in order to efficiently reduce the leakage current through the buffer layer, not only the semi-insulating function of the GaN channel needs to be strengthened, but also the crystal defects of the buffer layer for growing the buffer layer are minimized and the semi-insulating property is also increased, It may be necessary to minimize the vertical and lateral leakage currents.

This is a particularly necessary part of the operation of a high power device.

The technique disclosed in this specification proposes an effective epitaxial structure that reduces the leakage current of the buffer layer for GaN growth.

According to one embodiment disclosed herein, there may be various kinds of buffer layers for growing GaN on a substrate (for example, a Si substrate). For example, the buffer layer may have a structure including at least one of an AlN layer (AlN buffer layer or AlN nucleation layer), an AlGaN layer (or an AlGaN buffer layer), and a multi-buffer layer.

In the description of a semiconductor device according to an embodiment disclosed herein below with reference to FIG. 2, the buffer layer may be a buffer layer and a multiple buffer layer in a narrow sense. It is divided into two.

That is, the buffer layer in FIG. 2 refers to a layer including at least one of an AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN. The multiple buffer layers are formed by stacking different first thin film layers, second thin film layers, May be a layer formed by stacking a plurality of thin film layers.

According to one embodiment, the AlN layer (AlN buffer layer or AlN nucleation layer) may comprise a plurality of layers of AlN grown at different temperatures.

For example, the number of the plurality of layers made of AlN grown at the different temperatures may be 2 to 5.

Also, for example, an AlN buffer can be used in combination of low temperature and high temperature. That is, the lower portion of the AlN buffer may be formed by low temperature growth, and the upper portion of the AlN buffer may be formed by high temperature growth. In this case, the AlN layer may include a first AlN layer grown at a low temperature and a second AlN layer grown on the first AlN layer and grown at a high temperature.

Also, according to one embodiment, the AlGaN buffer layer may include a plurality of layers made of AlGaN having different Al compositions.

For example, the number of the plurality of layers made of AlGaN having different Al compositions may be 2 to 5.

Also, for example, a continuous graded or graded buffer having a high Al content in the lower layer of the AlGaN buffer and a low Al composition in the upper layer may be used.

That is, according to one embodiment, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be continuously decreased with a specific slope in the stacking direction.

According to another embodiment, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be discontinuously decreased in the stacking direction.

According to one embodiment, the buffer layer may have a multiple buffer layer structure.

Here, the multiple buffer layer may be formed by stacking a plurality of thin film layers in which first thin film layers, second thin film layers and third thin film layers are stacked.

Accordingly, the multiple buffer layer may be a superlattice structure.

According to one embodiment, the multiple buffer layer may have an AlN / AlGaN / GaN structure. That is, the first thin film layer may be made of AlN, the second thin film layer may be made of AlGaN, and the third thin film layer may be made of GaN.

Accordingly, when the buffer layer has a multiple buffer structure (or a multi-layered superlattice layer), the multiple buffer structure (or multiple buffer layers) may be formed by alternately stacking three different thin film layers.

According to the embodiment disclosed herein, the various types of buffer layers may be used as a single buffer layer, but may be combined with each other to be provided in one semiconductor element.

For example, a semiconductor device according to an embodiment may have a structure in which the AlN buffer (or AlN buffer layer) is formed on a substrate, and the multiple buffer layer is formed on the AlN buffer layer.

In this case, the AlN buffer layer is a seed layer for growing GaN on the substrate, and may be referred to as a nucleation layer.

In general, the type of the substrate may be Si, SiC, an insulating substrate (e.g., sapphire substrate), a GaN substrate, or the like.

For example, when the substrate is a Si substrate, when the GaN layer is grown (or deposited or laminated) directly on the Si substrate, the crystallinity of the GaN layer is lowered due to the difference in lattice constant between Si and GaN, There may be a problem that the leakage current increases and the breakdown voltage characteristic deteriorates.

Therefore, as described above, by growing at least one buffer layer in the middle instead of growing the GaN layer directly on the Si substrate, it is possible to improve the crystallinity of the GaN layer and improve the leakage current characteristic and the breakdown voltage characteristic have.

Hereinafter, a structure of a semiconductor device and a manufacturing method thereof according to an embodiment disclosed herein will be described with reference to FIGS. 2 to 5. FIG.

The work disclosed herein In the embodiment  Description of the semiconductor device according to

The semiconductor device according to an embodiment disclosed herein may include a buffer layer, a multi-buffer layer formed on the buffer layer, a GaN channel layer formed on the multi-buffer layer, and an AlGaN barrier layer formed on the GaN channel layer.

Here, the multiple buffer layer may be formed by stacking a plurality of thin film layers in which first thin film layers, second thin film layers and third thin film layers are stacked.

According to one embodiment, the thickness of the buffer layer may be 1 nm to 7 μm.

According to an embodiment, the buffer layer may include at least one of an AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN.

Also, according to one embodiment, the AlN buffer layer may include a plurality of layers made of AlN grown at different temperatures.

In addition, according to an embodiment, the number of the plurality of layers made of AlN grown at different temperatures may be 2 to 5.

According to an embodiment, the AlN buffer layer may include a first AlN layer grown at a low temperature and a second AlN layer grown at a high temperature and formed on the first AlN layer.

Also, according to one embodiment, the AlGaN buffer layer may include a plurality of layers made of AlGaN having different Al compositions.

According to an embodiment, the number of the plurality of AlGaN layers having different compositions of Al may be 2 to 5.

According to an embodiment, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be continuously decreased with a specific gradient in the stacking direction.

According to an embodiment, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be discontinuously decreased in the stacking direction.

Also, according to one embodiment, the thickness of at least one of the first thin film layer, the second thin film layer, and the third thin film layer may be 5 nm to 35 nm.

According to an embodiment, the first thin film layer may be made of AlN, the second thin film layer may be made of AlGaN, and the third thin film layer may be made of GaN.

According to an embodiment, the number of the multiple thin film layers to be stacked may be 20 to 100.

Also, according to one embodiment, the multiple buffer layer may be doped with a p-type dopant.

Also, according to one embodiment, the p-type dopant may be at least one of Mg, C, and Fe.

Also, according to one embodiment, the concentration of the p-type dopant may be 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

Also, according to one embodiment, the concentration of the p-type dopant may be decreased according to the stacking direction of the multiple buffer layers.

Also, according to one embodiment, the thickness of the GaN channel layer may be 1 um to 3 um.

Also, according to one embodiment, the GaN channel layer may be doped with at least one dopant of Mg, C, and Fe.

Also, according to one embodiment, the at least one dopant concentration may be from 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

Also, according to one embodiment, the thickness of the AlGaN barrier layer may be 10 nm to 30 nm.

Also, according to one embodiment, the AlN layer may be formed on a substrate.

According to an embodiment, the substrate may be made of at least one of Si, SiC, Sapphire, and GaN.

In addition, the semiconductor device according to an embodiment may further include a source electrode, a drain electrode, and a gate electrode formed on a partial region of the AlGaN barrier layer.

2 is an exemplary view showing a structure of a semiconductor device according to an embodiment disclosed herein.

2, a semiconductor device 100 according to one embodiment disclosed herein may include a buffer layer 110, a multiple buffer layer 120, a GaN channel layer 130, and an AlGaN barrier layer 140 .

The semiconductor device 100 may further include a GaN cap layer 150 formed on the AlGaN barrier layer 140.

In addition, the semiconductor device 100 may further include an oxide layer 190 for preventing surface leakage current.

The semiconductor device 100 may further include a source electrode 170, a drain electrode 180 and a gate electrode 160 formed on a part of the AlGaN barrier layer 140.

The semiconductor device 100 according to an embodiment disclosed herein may switch a 2DEG (CDEG) current flowing from the drain electrode 180 to the source electrode 170 through a schottky gate electrode 160 ) Operation can be performed.

Here, the buffer layer 110 may be formed on a substrate (not shown).

According to one embodiment, the substrate may be n-type, p-type, or various types of materials. For example, the substrate may be at least one of an insulating substrate, a sapphire substrate, a GaN substrate, a SiC substrate, an AlN substrate, and a Si substrate. It will be apparent to those skilled in the art that various types of substrates may be applied to the semiconductor devices disclosed herein.

Further, the substrate can be removed after fabrication of the semiconductor device 100. [ Thus, the final structure of the semiconductor device may be a structure without the substrate.

The buffer layer 110 may be a seed layer for growing GaN on a substrate and may be referred to as a nucleation layer.

Here, the thickness of the buffer layer 110 may be 1 nm to 7 μm.

According to one embodiment, the buffer layer 110 may include at least one of an AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN.

The AlN buffer layer may include a plurality of layers made of AlN grown at different temperatures.

In this case, the number of the plurality of layers made of AlN grown at different temperatures may be 2 to 5.

That is, the AlN buffer layer can be grown under various conditions. For example, the AlN buffer layer may include a first AlN layer grown at a low temperature and a second AlN layer grown at a high temperature formed on the first AlN layer.

The AlGaN buffer layer may include a plurality of layers made of AlGaN having different Al compositions.

Here, the number of the plurality of layers made of AlGaN having different compositions of Al may be 2 to 5.

The Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may vary in various directions depending on the stacking direction.

For example, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be continuously decreased with a specific slope in the stacking direction.

In addition, for example, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be discontinuously decreased in the stacking direction.

Specifically, the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer may be similar to the Fe doping concentration profile of the multiple buffer layer 120 disclosed in FIGS. 3 to 4, which will be described later (see FIGS. 3 to 4) .

Referring to FIG. 2 again, the multiple buffer layer 120 is formed by stacking a plurality of thin film layers p120, each having a first thin film layer p121, a second thin film layer p122, and a third thin film layer p123, Lt; / RTI >

Accordingly, the multi-buffer layer 120 may denote a superlattice layer or a layer having a superlattice structure.

According to one embodiment, the number of the multiple thin film layers to be stacked may be 2 to 500. In particular, the number of the multiple thin film layers to be laminated may be 20 to 100.

That is, the multiple buffer layer 120 may include 2 to 500 multiple thin film layers. In particular (or preferably), the multiple buffer layer 120 may comprise 20 to 100 multiple thin film layers.

In other words, the multiple buffer layer 120 may include two to five pairs of the three different thin film layers p121, p122 and p123. Particularly (or preferably), the multiple buffer layer 120 may comprise 20 to 100 pairs of the three different thin film layers p121, p122 and p123.

FIG. 2 shows a case where the multiple buffer layer 120 includes three thin film layers p120, p120 ', p120' '.

Here, each of the three thin film layers p120, p120 ', p120' 'may include a first thin film layer p121, p121', p121 ", a second thin film layer p122, p122 ', p122" 3 thin film layers (p123, p123 ', p123 ") may be stacked.

The first thin film layer p121, p121 ', p121 ", the second thin film layer p122, p122', p122" and the third thin film layer p123, p123 ', p123 " May be in the range of 1 nm to 100 nm. In particular, the first thin film layer p121, p121 ', p121' ', the second thin film layer p122, p122', p122 '' and the third thin film layer p123, p123 ' ) May be in the range of 5 nm to 35 nm.

According to one embodiment, the first thin film layer p121, p121 ', p121' 'is made of AlN, the second thin film layer p122, p122', p122 '' is made of AlGaN, The three thin film layers p123, p123 'and p123' 'may be made of GaN.

That is, in this case, the multiple buffer layer 120 may be a layer having an AlN / AlGaN / GaN structure. In this case, the combination of unit pairs is composed of AlN / AlGaN / GaN structure and may include all possible order of three layers.

The multiple buffer layer 120 may be formed by various methods (or methods). For example, the multi-buffer layer 120 may be formed by selectively growing a nitride semiconductor crystal. The multi-buffer layer 120 may be formed by MOCVD, molecular beam epitaxy (MBE), or helium vapor deposition HVPE). ≪ / RTI > However, considering the crystallinity of the multi-buffer layer 120, MOCVD may be used for device fabrication.

According to one embodiment disclosed herein, the multiple buffer layer 120 may be formed by doping with a specific dopant.

According to one embodiment, the specific dopant may be a p-type dopant. For example, the p-type dopant may be at least one of Mg, C, and Fe.

The p-type dopant may be doped into the multiple buffer layer 120 in a variety of ways (or methods).

For example, when the p-type dopant is C, a growth rate of GaN is increased in order to perform carbon doping in the multi-buffer layer 120, so that the carbon content in the TMGa source itself is formed high in the GaN crystal The p-type dopant may be doped into the multiple buffer layer 120.

Also, for example, if the p-type dopant is Fe, a new trap is generated by intentionally Fe doping (or on the basis of) the Cp2Fe source, thereby reducing the quality of the thin film and bringing about a semi-insulating effect The multi-buffer layer 120 having a superlattice buffer structure can be formed.

When the p-type dopant is Fe, the GaN growth rate of the multiple buffer layer 120 can be minimized to improve the crystallinity of the interface. That is, when Fe (iron) doping is used, a new trap formed by the Fe dopant is maintained while maintaining high-quality crystallinity due to the inherent low-speed growth of GaN, thereby obtaining a semi-insulating effect and reducing the leakage current more efficiently It can have an advantage.

According to an embodiment disclosed herein, the concentration of the p-type dopant may be 1e ¹⁶ / cm ³ to 5e ²⁰ / cm ³ . In particular, the concentration of the p-type dopant may be 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

In addition, according to one embodiment, the concentration of the p-type dopant may change in the direction of stacking the multiple buffer layers 120. [

According to one embodiment, the concentration of the p-type dopant may be reduced in the direction of lamination of the multiple buffer layer 120 (for example, a decreasing tendency to decrease). For example, the concentration of the p-type dopant may be continuously decreased in the stacking direction of the multiple buffer layer 120. Also, for example, the concentration of the p- In the direction of the arrow. As an example of the discontinuous concentration reduction, there may be a case where the concentration of the p-type dopant is decreased stepwise in the stacking direction of the multiple buffer layer 120.

In other words, the p-type dopant may be doped based on a doping profile indicating a doping amount with respect to the p-type dopant in the stacking direction of the multiple buffer layer 120.

Here, the doping profile may be a doping profile in which the doping amount of the p-type dopant is reduced to a specific slope from a specific position of the multiple buffer layer 120 in the stacking direction.

In addition, the doping profile may be a doping profile in which the doping amount of the p-type dopant is reduced stepwise (or stepwise) from a specific position of the multiple buffer layer 120 in the stacking direction.

In addition, according to one embodiment, the doping amount of the p-type dopant may be less than a minimum doping amount from the upper portion of the multiplex buffer layer 120 to a specific depth.

The specific depth may be 1 nm to 50 nm. The minimum doping amount may be 1e ¹⁶ / cm ³ to 1e ¹⁷ / cm ³ .

3 is a graph illustrating the doping profile of an Fe dopant according to one embodiment disclosed herein.

3 shows a case where the p-type dopant is Fe.

Referring to FIG. 3, the doping profile for Fe doping concentration in the multiple buffer layer 120 can be confirmed.

It can be seen that the Fe doping concentration is continuously decreased from the second point P2 to the first point P1 in the multiple buffer layer 120. [

According to one embodiment, the Fe doping concentration at the second point P2 may be 5e ²⁰ / cm ³ .

Further, according to one embodiment, the doping concentration of the Fe in said first point (P1) may be 1e ¹⁶ / cm ³ days.

In addition, according to one embodiment, the minimum depth from the top of the multi-buffer layer 120 to the specific depth DELTA l may be less than the minimum doping amount. For example, the specific depth? 1 may be 2 nm to 50 nm, and FIG. 4 shows a case where the specific depth? 1 is 50 nm.

4 is a graph depicting the doping profile of an Fe dopant according to another embodiment disclosed herein.

Fig. 4 shows a case where the p-type dopant is Fe.

Referring to FIG. 4, the doping profile for Fe doping concentration in the multiple buffer layer 120 can be confirmed.

It can be confirmed that the Fe doping concentration is decreased stepwise from the sixth point to the third point P6 to P3 in the multiple buffer layer 120. [

As in FIG. 4, the Fe doping concentration at the sixth point P6 may be 5e ²⁰ / cm ³ , and the Fe doping concentration at the third point may be 1e ¹⁶ / cm ³ .

In addition, from the upper portion of the multiple buffer layer 120 to the specific depth? 1, the minimum doping amount may be obtained. For example, the specific depth? 1 may be 2 nm to 50 nm, and FIG. 4 shows a case where the specific depth? 1 is 50 nm.

Referring again to FIG. 2, the GaN channel layer 130 may have a thickness of 0.1 um to 7 um. Particularly (or preferably), the GaN channel layer 130 may have a thickness of 1 um to 3 um.

The GaN channel layer 130 may be formed in various manners (or methods). For example, the GaN channel layer 130 may be formed by selectively growing a nitride semiconductor crystal, and may be formed by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), and helium vapor deposition (HVPE). ≪ / RTI > However, considering the crystallinity of the GaN channel layer 130, MOCVD may be used for device fabrication.

According to one embodiment, the GaN channel layer 130 may be doped with at least one of C, Fe, Mg, and Mn dopants. In other words, the semiconductor device 100 includes a GaN channel layer 130 for forming semi-insulating characteristics of a GaN channel formed by implanting at least one dopant of C, Fe, Mg, and Mn dopants, - a resistive GaN layer (not shown).

Here, the concentration of the at least one dopant may be 1e ¹⁶ / cm ³ to 5e ²⁰ / cm ³ . In particular, the concentration of the at least one dopant may be 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

Particularly, when the at least one dopant is C, doping of 1e ¹⁸ / cm ³ or more may be common.

In addition, as shown, the current end of the GaN channel layer 130 to form a flow channel layer can be minimized in the doping of impurities, in particular C concentration must be doped to less than 1e ¹⁷ / cm ³ described above can do.

According to one embodiment, the GaN layer 130 may include a plurality of layers of GaN grown at different temperatures.

Also, according to one embodiment, the number of the plurality of layers made of GaN grown at different temperatures may be 2 to 5.

The AlGaN barrier layer 140 may be formed on the GaN channel layer 130 to form a 2DEG on the channel layer.

That is, the AlGaN barrier layer 140 may be formed on the GaN channel layer 130, and the AlGaN barrier layer 140 may serve as an active layer.

In addition, the thickness of the AlGaN barrier layer 140 may be in the range of 2 nm to 100 nm. In particular (or preferably), the thickness of the AlGaN barrier layer 140 may range from 10 nm to 30 nm.

The AlGaN barrier layer 140 may have a variety of compositions. For example, the composition of Al in the AlGaN barrier layer 140 may be 10% to 30%. It is apparent to those skilled in the art that the AlGaN barrier layer 140 may be formed at various composition ratios.

In particular, the AlGaN barrier layer 140 may have an Al composition of 25% and a thickness of 25 nm.

The AlGaN barrier layer 140 may be formed in a variety of ways (or methods). For example, the AlGaN barrier layer 140 may be formed by selectively growing a nitride semiconductor crystal. The AlGaN barrier layer 140 may be formed by a metal organic vapor phase epitaxy (MOCVD) method, a molecular beam epitaxial growth method (MBE) (HVPE). ≪ / RTI > However, considering the crystallinity of the AlGaN barrier layer 140, MOCVD may be used for device fabrication.

The GaN cap layer 150 is formed on the AlGaN barrier layer 140 and may be formed by growing GaN thinly.

According to one embodiment, the thickness of the GaN cap layer 150 may be in the range of 0 nm to 100 nm, particularly 2 nm to 10 nm. The GaN cap layer 150 may prevent a surface leakage current.

The source electrode 170, the drain electrode 180 and the gate electrode 160 may be formed on a part of the AlGaN barrier layer 140. In addition, when the semiconductor device 100 further includes the GaN cap layer 150, the semiconductor device 100 may be formed on a part of the GaN cap layer 150.

A 2DEG (CDEG) current flowing from the drain electrode 180 to the source electrode 170 may be generated through control of the schottky gate electrode 160, as described above.

According to one embodiment, the semiconductor device 100 is formed on a part of the AlGaN barrier layer 140, the source electrode 170, the drain electrode 180, and the gate electrode 160 And may further include an oxide layer 190.

When the semiconductor device 100 further includes the GaN cap layer 150, the oxide layer 190 may be formed on a part of the GaN cap layer 150.

The oxide layer 190 may reduce surface leakage current.

The oxide layer 190 may be formed between the source electrode 170 or the drain electrode 180 and the gate electrode 160.

The oxide layer 190 may have a variety of materials or composition ratios. For example, the oxide layer 190 may be formed of at least one of SiO 2, Si _x N _y (for example, Si 3 N 4), HfO 2, Al 2 O 3, ZnO, and Ga 2 O 3.

According to one embodiment, the thickness of the oxide layer 190 is in the range of 2 nm to 200 nm, and in particular (or preferably) the thickness of the oxide layer 190 may be in the range of 2 nm to 100 nm.

For example, the oxide layer 190 may be formed by a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy (MBE) method, a hydride vapor phase epitaxy (HVPE), plasma-enhanced chemical vapor deposition (PECVD), sputtering, and atomic layer deposition (ALD).

The work disclosed herein In the embodiment  Description of a method of manufacturing a semiconductor device according to

A method of manufacturing a semiconductor device according to an embodiment disclosed herein may be implemented as a part or a combination of the constituent elements or steps included in the embodiments described above or a combination of the embodiments, Overlapping portions may be omitted for clarity of the method of manufacturing a semiconductor device according to an embodiment.

In order to grow the nitride semiconductor of the AlGaN / GaN heterojunction structure on the Si substrate, it is necessary to solve problems such as occurrence of crack due to the thermal expansion coefficient of Si and GaN, wafer bending phenomenon and defect density due to difference in lattice constant .

One way to minimize this problem is to insert a layer containing an Al component between the Si substrate and the GaN layer to minimize this.

For example, a method of minimizing this problem may be a method of forming an AlN nucleation layer on a Si substrate and using an intermediate buffer layer as a method of grading the Al composition from the substrate to the growth direction of the AlGaN layer.

According to one embodiment disclosed herein, a nitride semiconductor having a multi-buffer structure of AlN / AlGaN / GaN structure for minimizing a leakage current increase and a breakdown voltage reduction occurring when fabricating an HFET device of a heterojunction structure A method of manufacturing a power device is disclosed.

A method of fabricating a semiconductor device according to an embodiment disclosed herein includes forming a buffer layer on a substrate, forming a multiple buffer layer on the buffer layer, forming a GaN channel layer on the multiple buffer layer, And forming an AlGaN barrier layer on the GaN channel layer.

According to an embodiment, the multiple buffer layer may be formed by stacking a plurality of thin film layers in which first thin film layers, second thin film layers and third thin film layers are stacked.

In one embodiment, at least one of the buffer layer, the multiple buffer layer, the GaN channel layer, and the AlGaN barrier layer is formed by a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxial growth method (MBE), a helium vapor deposition (HVPE), Plasma-enhanced chemical vapor deposition (PECVD), sputtering, and atomic layer deposition (ALD).

According to an embodiment, the buffer layer may include at least one of an AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN.

Also, according to one embodiment, the thickness of at least one of the first thin film layer, the second thin film layer, and the third thin film layer may be 5 nm to 35 nm.

According to an embodiment, the first thin film layer may be made of AlN, the second thin film layer may be made of AlGaN, and the third thin film layer may be made of GaN.

According to an embodiment, the number of the multiple thin film layers to be stacked may be 20 to 100.

Also, according to one embodiment, the multiple buffer layer may be doped with a p-type dopant.

Also, according to one embodiment, the p-type dopant may be at least one of Mg, C, and Fe.

Also, according to one embodiment, the concentration of the p-type dopant may be 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

Also, according to one embodiment, the concentration of the p-type dopant may be decreased according to the stacking direction of the multiple buffer layers.

6 is a flowchart showing a method of manufacturing a semiconductor device according to an embodiment disclosed herein.

Referring to FIG. 6, a method of manufacturing a semiconductor device according to an embodiment disclosed herein may include the following steps.

First, a buffer layer may be formed on a substrate (S110).

Next, a multiple buffer layer may be formed on the buffer layer (S120).

Next, a GaN channel layer may be formed on the multi-buffer layer (S130).

Next, an AlGaN barrier layer may be formed on the GaN channel layer (S140).

Here, the multiple buffer layer may be formed by stacking a plurality of thin film layers in which first thin film layers, second thin film layers and third thin film layers are stacked.

6A to 6F are views showing an example of a method of manufacturing a semiconductor device according to an embodiment disclosed herein.

6A to 6F, a method of manufacturing a semiconductor device according to an embodiment disclosed herein includes sequentially forming a buffer layer 110, a multiple buffer layer 120, a GaN channel layer 130, To form an AlGaN barrier layer 140.

As described above, the substrate can be removed after fabrication of the semiconductor device 100. Thus, the final structure of the semiconductor device may be a structure without the substrate.

The method for fabricating a semiconductor device according to an embodiment disclosed herein may include forming a gate electrode 160, a source electrode 170, and a drain electrode 180 on a portion of the AlGaN barrier layer 140 As shown in FIG.

The method of manufacturing a semiconductor device according to an embodiment disclosed herein may further include the step of forming a gate electrode 160 on the AlGaN barrier layer 140, the source electrode 170, the drain electrode 180, And forming an oxide film layer 190 on the substrate.

6A to 6F, the buffer layer 110 can be formed (or grown) with the MOCVD thin film growth equipment on a substrate (not shown) (FIG. 6A).

As described above, the buffer layer 110 may include at least one of an AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN.

The substrate may be n-type or p-type, and the substrate may be Si, SiC, sapphire, GaN (e.g., Freestanding GaN) substrate, AlN substrate, or the like.

When the buffer layer 110 includes the AlN buffer layer, the AlN buffer layer may be a single layer (or a layer) or may be grown to two to five layers having different temperatures.

TMAl can be used as a raw material of AlN, and NH3 can be used as a raw material of N. [

According to one embodiment, the AlN buffer layer (or AlN nucleation layer) may be used in combination of low temperature and high temperature. That is, the lower portion of the AlN buffer may be formed by the low-temperature growth, and the upper portion of the AlN buffer may be formed by the high-temperature growth (see the first AlN layer and the second AlN layer described above).

In the formation of the AlN buffer layer, an organic metal thin film growth equipment (MOCVD) can be used as a crystal growth method. Trimethylgallium (TMGa), trimethyl aluminum (TMAl) and ammonia (NH3) By synthesizing and growing into an epitaxial layer, a III-V thin film can be formed. The nucleation layer of the conventional method for GaN growth can be grown according to the prepared substrate.

Next, a multiple buffer layer 120 may be formed on the buffer layer 110 (FIG. 6B).

That is, the multiple buffer layer 120 may be formed as a buffer on the buffer layer 110.

Specifically, the multiple buffer layer 120 may be formed by stacking a plurality of thin film layers p120, each having a first thin film layer p121, a second thin film layer p122 and a third thin film layer p123 stacked.

The manufacturing method disclosed in Figs. 6A to 6F shows a case in which the multiple buffer layer 120 includes three multi-film layers p120, p120 ', p120' '.

Here, each of the three thin film layers p120, p120 ', p120' 'may include a first thin film layer p121, p121', p121 ", a second thin film layer p122, p122 ', p122" 3 thin film layers (p123, p123 ', p123 ") may be stacked.

The first thin film layer p121, p121 ', p121 ", the second thin film layer p122, p122', p122" and the third thin film layer p123, p123 ', p123 " May be in the range of 1 nm to 100 nm. In particular, the first thin film layer p121, p121 ', p121' ', the second thin film layer p122, p122', p122 '' and the third thin film layer p123, p123 ' ) May be in the range of 5 nm to 35 nm.

The multi-buffer layer 120 may be formed of various materials. For example, the multiple buffer layer 120 may be made of AlN / AlGaN / GaN structure.

That is, the first thin film layers p121, p121 'and p121' 'are made of AlN, the second thin film layers p122, p122' and p122 '' are made of AlGaN, , p123 ', p123' ') may be made of GaN.

It is apparent to those skilled in the art that the multiple buffer layer 120 may be formed of various materials.

The multiple buffer layer 120 may be formed by various methods (or methods). For example, the multi-buffer layer 120 may be formed by selectively growing a nitride semiconductor crystal. The multi-buffer layer 120 may be formed by MOCVD, molecular beam epitaxy (MBE), or helium vapor deposition HVPE). ≪ / RTI > However, considering the crystallinity of the multi-buffer layer 120, MOCVD may be used for device fabrication.

According to one embodiment disclosed herein, the multiple buffer layer 120 may be formed by doping with a specific dopant.

According to one embodiment, the specific dopant may be a p-type dopant. For example, the p-type dopant may be at least one of Mg, C, and Fe.

The p-type dopant may be doped into the multiple buffer layer 120 in a variety of ways (or methods).

For example, when the p-type dopant is C, a growth rate of GaN is increased in order to perform carbon doping in the multi-buffer layer 120 so that the carbon content in the TMGa source itself is formed high in the GaN crystal The p-type dopant may be doped into the multiple buffer layer 120.

Also, for example, if the p-type dopant is Fe, a new trap is generated by intentionally Fe doping (or on the basis of) the Cp2Fe source, thereby reducing the quality of the thin film and bringing about a semi-insulating effect The multi-buffer layer 120 having a superlattice buffer structure can be formed.

When the p-type dopant is Fe, the GaN growth rate of the multiple buffer layer 120 can be minimized to improve the crystallinity of the interface. That is, when Fe (iron) doping is used, a new trap formed by the Fe dopant is maintained while maintaining high-quality crystallinity due to the inherent low-speed growth of GaN, thereby obtaining a semi-insulating effect and reducing the leakage current more efficiently It can have an advantage.

According to an embodiment disclosed herein, the concentration of the p-type dopant may be 1e ¹⁶ / cm ³ to 5e ²⁰ / cm ³ . In particular, the concentration of the p-type dopant may be 3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ .

In addition, according to one embodiment, the concentration of the p-type dopant may change in the direction of stacking the multiple buffer layers 120. [

According to one embodiment, the concentration of the p-type dopant may be reduced in the direction of lamination of the multiple buffer layer 120 (for example, a decreasing tendency to decrease). For example, the concentration of the p-type dopant may be continuously decreased in the stacking direction of the multiple buffer layer 120. Also, for example, the concentration of the p- In the direction of the arrow. As an example of the discontinuous concentration reduction, there may be a case where the concentration of the p-type dopant is decreased stepwise in the stacking direction of the multiple buffer layer 120.

Next, a GaN channel layer 130 may be formed on the multiple buffer layer 120 (FIG. 7C).

GaN constituting the GaN channel layer 130 may be formed by an organic metal vapor deposition method called MOCVD.

In this case, the GaN channel layer 130 can be formed by epitaxial growth by synthesizing NH ₃ , which is a raw material of Ga, as a raw material of Ga, NH ₃ in a reactor at a high temperature.

The GaN channel layer 130 may have a thickness of 0.1 um to 7 um. Particularly (or preferably), the GaN channel layer 130 may have a thickness of 1 um to 3 um.

Here, the GaN channel layer 130 may be doped with Fe, Mg or Carbon to form semi-insulating characteristics. The GaN channel layer 130 may also be grown to one temperature or to two to five continuous or discontinuous temperatures.

Next, after the GaN channel layer 130 is grown, an AlGaN barrier layer 140, which is an active layer for forming a hetero-junction 2DEG layer, can be grown (FIG. 6D).

According to one embodiment, the AlGaN barrier layer 140 may be grown at a composition ratio of 10% to 30% Al.

The thickness of the AlGaN barrier layer 150 may be between 10 nm and 50 nm.

The AlGaN barrier layer 150 forms a 2DEG due to a piezo-polarization due to a difference in lattice constant with the GaN channel layer 140. The 2DEG density can be determined according to the Al composition and the thickness.

In addition, after the AlGaN barrier layer 140 (or the active layer) is grown, a GaN cap layer 150 may be grown in the range of 0 nm to 100 nm (preferably in the range of 2 nm to 10 nm) to prevent surface leakage current (Fig. 6D).

In addition, the source electrode 170, the drain electrode 180 and the gate electrode 160 can be formed (or deposited) on a part of the AlGaN barrier layer 140 (FIG. 6E).

The source electrode 170, the drain electrode 180, and the gate electrode 160 may be deposited using an E-beam as an ohmic electrode.

In addition, in addition, the AlGaN barrier layer 140 (the GaN cap layer 150 when the GaN cap layer 150 is deposited), the source electrode 170, the drain electrode 180, An oxide film layer 190 may be formed on a part of the gate electrode 160 (Fig. 6F).

According to one embodiment disclosed herein, a nitride semiconductor having a multi-buffer structure of AlN / AlGaN / GaN structure for minimizing a leakage current increase and a breakdown voltage reduction occurring when fabricating an HFET device of a heterojunction structure A power device and a manufacturing method thereof are provided.

In particular, according to the semiconductor device disclosed in this specification, the growth inconsistency due to the difference in lattice constant between AlN and GaN is relaxed to an AlGaN layer having a medium-sized lattice constant, thereby minimizing the occurrence of leakage currents occurring at the interface have.

Further, since the growth interface and the film quality of the multi-buffer layer are improved, the crystallinity of the GaN channel on the GaN channel can be improved. Therefore, a high-output GaN semiconductor device capable of further blocking the leakage current from the active layer to the epi- Can be provided.

The scope of the present invention is not limited to the embodiments disclosed herein, and the present invention can be modified, changed, or improved in various forms within the scope of the present invention and the claims.

100: Semiconductor device 110: buffer layer
120: multiple buffer layer 130: GaN channel layer
140: AlGaN barrier layer

Claims (34)

A buffer layer;
A multi-buffer layer formed on the buffer layer;
A GaN channel layer formed on the multi-buffer layer; And
And an AlGaN barrier layer formed on the GaN channel layer,
The multi-
A plurality of first thin film layers, a plurality of second thin film layers, and a plurality of third thin film layers, wherein the first thin film layer, the second thin film layer, and the third thin film layer are stacked. The method according to claim 1, wherein the thickness of the buffer layer
1 nm to 7 [mu] m. The optical information recording medium according to claim 1,
An AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN. The method of claim 3, wherein the AlN buffer layer
And a plurality of layers of AlN grown at different temperatures. The method according to claim 3, wherein the number of the plurality of layers made of AlN grown at different temperatures,
2 < / RTI > The method of claim 3, wherein the AlN buffer layer
A first AlN layer grown at a low temperature; And
And a second AlN layer formed on the first AlN layer and grown at a high temperature. The method of claim 3, wherein the AlGaN buffer layer
And a plurality of layers made of AlGaN having different compositions of Al. The method according to claim 7, wherein the number of the plurality of layers made of AlGaN,
2 < / RTI > The method according to claim 3, wherein the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer comprises:
And is continuously reduced with a specific inclination in the stacking direction. The method according to claim 3, wherein the Al composition of at least one of the AlN buffer layer and the AlGaN buffer layer comprises:
And is discontinuously reduced in the stacking direction. The method according to claim 1, wherein the thickness of at least one of the first thin film layer, the second thin film layer,
5 nm to 35 nm. The method according to claim 1, wherein the first thin film layer
AlN,
The second thin film layer
AlGaN,
The third thin-
GaN. The method according to claim 1, wherein the number of the multi-
20 to 100. < / RTI > The method of claim 1, wherein the multi-
and doped with a p-type dopant. 15. The method of claim 14, wherein the p-
Mg, C, and Fe. 15. The method of claim 14, wherein the concentration of the p-
3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ . 15. The method of claim 14, wherein the concentration of the p-
And is decreased along the stacking direction of the multiple buffer layers. The GaN substrate according to claim 1,
1 um to 3 um. 2. The GaN substrate according to claim 1,
Mg, < / RTI > C and Fe. 20. The method of claim 19, wherein the at least one dopant concentration is selected from the group consisting of:
3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ . 2. The method of claim 1, wherein the thickness of the AlGaN barrier layer
Wherein the thickness is 10 nm to 30 nm. The method of claim 1, wherein the AlN layer
And is formed on a substrate. 22. The method of claim 21,
Si, SiC, Sapphire, and GaN. The method according to claim 1,
Further comprising a source electrode, a drain electrode, and a gate electrode formed on a part of the AlGaN barrier layer. Forming a buffer layer on the substrate;
Forming a multi-buffer layer on the buffer layer;
Forming a GaN channel layer on the multi-buffer layer; And
And forming an AlGaN barrier layer on the GaN channel layer,
The multi-
A plurality of first thin film layers, a plurality of second thin film layers, and a plurality of third thin film layers, wherein the first thin film layer, the second thin film layer, and the third thin film layer are stacked. 26. The method of claim 25,
At least one of the buffer layer, the multiple buffer layer, the GaN channel layer, and the AlGaN barrier layer,
At least one of metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), helium vapor deposition (HVPE), plasma enhanced chemical vapor deposition (PECVD), sputtering, and atomic layer deposition Wherein the semiconductor device is formed on the basis of a predetermined pattern. 26. The method of claim 25,
An AlN buffer layer made of AlN and an AlGaN buffer layer made of AlGaN. 26. The method according to claim 25, wherein the thickness of at least one of the first thin film layer, the second thin film layer,
5 nm to 35 nm. The method according to claim 25, wherein the first thin film layer
AlN,
The second thin film layer
AlGaN,
The third thin-
GaN. 26. The method according to claim 25, wherein the number of the multi-
20 to 100. < / RTI > 26. The method of claim 25, wherein the multi-
and doped with a p-type dopant. 32. The method of claim 31, wherein the p-
Mg, C, and Fe. 32. The method of claim 31, wherein the concentration of the p-
3e ¹⁷ / cm ³ to 1e ²⁰ / cm ³ . 32. The method of claim 31, wherein the concentration of the p-
And is decreased along the stacking direction of the multiple buffer layers.

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