KR20140141890A

KR20140141890A - Temperature Compensated Buffer Amplifier

Info

Publication number: KR20140141890A
Application number: KR1020130063194A
Authority: KR
Inventors: 진옥상
Original assignee: 진옥상
Priority date: 2013-06-03
Filing date: 2013-06-03
Publication date: 2014-12-11

Abstract

The present invention relates to a temperature compensation buffer amplifier circuit. The temperature compensation buffer amplifier circuit according to an embodiment of the present invention includes: a circuit supplying a bias current to a transistor and a buffer amplifier; a bias circuit flowing an idling current to an output transistor of a push-pull power amplifier; and a temperature compensation circuit which maintains the appropriate level of a bias current despite the temperature change.

Description

Temperature Compensated Buffer Amplifier Background < RTI ID = 0.0 > [0001] <

A bias circuit for supplying a bias current to the transistor in the buffer amplifier, a bias circuit for flowing an appropriate idling current to the output transistor of the push-pull power amplifier, and a temperature compensation buffer having a temperature compensation circuit for maintaining a proper bias current Circuit.

1,

Signal buffer amplifier circuit (10-2012-0080872) filed by the present inventor.

1 shows a case where a drive current flows to a negative input terminal Nin1 via an eleventh transistor Q11 via a positive input terminal Pin1 and a bias voltage Vout between a positive input terminal Pin1 and a negative input terminal Nin1 Is controlled by the eleventh transistor Q11. The eleventh transistor Q11 controls the voltage between the collector and the emitter so that the voltage between the base and the emitter becomes Vbe to supply the bias voltage to the twelfth transistor Q12 and the thirteenth transistor Q13.

The 12th transistor (Q12) and the 13th transistor (Q13) are supplied with an idling current through the collector and the emitter due to the bias voltage controlled by the 11th transistor (Q11), and the idling current flows through the 11th resistor 12 resistor (R12) to generate a voltage across the resistor.

The voltage generated across both ends of the twelfth resistor R12 and the sum of the Vbe between the base and the emitter of the thirteenth transistor Q13 is stabilized in the same state as the voltage between the base and the emitter of the eleventh transistor Q11 .

Here, the twelfth resistor R12 is used for current limiting, and the eleventh resistor R11 is a resistor used for matching the operating conditions of the minus side and the plus side together with the twelfth resistor R12.

When the characteristics of the eleventh transistor Q11 and the thirteenth transistor Q13 are the same (complementary), the voltage between the base and the emitter of the eleventh transistor Q11, the base of the thirteenth transistor Q13, The voltage Vbe is generated by the idling current flowing from the emitter of the thirteenth transistor Q13 to the collector and is supplied to the base and the emitter of the eleventh transistor Q11, The voltage between the collector and the emitter of the first transistor Q11 is supplied as the bias voltage of the 12th transistor Q12 and the 13th transistor Q13 so that the 11th transistor Q11 controls and stabilizes the proper idling current.

In FIG. 1, when the characteristics of the eleventh transistor Q11 and the thirteenth transistor Q13 are the same, there is a characteristic of being mutually corrected to some degree with respect to ambient temperature change. However, when transistors having different characteristics are used, The desired operation may not be possible due to a change in the bias voltage.

In FIG. 1, a temperature compensation circuit is provided so that a stable operation can be achieved when transistors having different characteristics of the eleventh transistor Q11 and the thirteenth transistor Q13 are used, or when they are used in a wider temperature range.

2,

The collector of the 21st transistor Q21 and the base of the 25th resistor R25, the 26th resistor R26 and the 22st transistor Q22 are connected to the positive input terminal Pin2,

The other terminal of the 26th resistor R26 is connected to the thermistor TH2,

The other terminal of the thermistor TH2 and the other terminal of the twenty-fifth resistor R25 are connected to the other terminal of the variable resistor VR2,

The emitters of the twenty-first transistor Q21 and the base of the twenty-third transistor Q23 are connected to the negative input terminal Nin2,

The emitter of the twenty-second transistor Q22, the twenty-first resistor R21 and the twenty-third resistor R23,

The emitter of the twenty-third transistor Q23, the twenty-second resistor R22 and the twenty-fourth resistor R24,

The base of the twenty-first transistor Q21, the other terminal of the variable resistor VR2 and the twenty-third resistor R23 and the other terminal of the twenty-fourth resistor R24 are connected,

And the other terminal of the twenty-first resistor R21 and the other terminal of the twenty-second resistor R22 are connected to the output terminal Out2.

Transistors with different characteristics can be used for the buffer amplifier, so that the selection width of the device can be widened, the idling current can be adjusted more precisely, and the adjusted idling current does not change even when the ambient temperature is changed, , And the operating characteristic is stable even with a wider temperature change.

Figure 1: An embodiment of a buffer amplifier without a temperature compensation circuit.
Figure 2: An embodiment of the buffer amplifier of the present invention.

2, description will be made on the assumption that the idling current flowing in the collector and emitter of the twelfth transistor Q12 and the thirteenth transistor Q13 sufficiently flows in the buffer amplifier circuit of FIG.

2 shows a state in which a temperature compensation circuit is added between the collector and the base of the twenty-first transistor Q21 in a state in which an idling current flowing in the collector and the emitter of the twenty-second transistor Q22 and the twenty-third transistor Q23 sufficiently flows, The current is controlled.

The thermistor TH2 used in Fig. 2 is a thermistor having a negative resistance characteristic in which the resistance changes in inverse proportion to the temperature change.

The 25th resistor R25 is a resistor for maintaining the minimum bias current of the 21st transistor Q21 when the resistance of the thermistor TH2 becomes high when the ambient temperature is extremely low and the 26th resistor R26 is a resistor for maintaining the minimum temperature The variable resistor VR2 is a resistor for limiting the bias current of the twenty-first transistor Q21 to the maximum bias current when the resistance of the thermistor TH2 is low, Q23) and the emitter current of the collector of the transistor Q23.

Referring to FIG. 2, when the variable resistor VR2 is adjusted to perform an operation according to a temperature change in an optimal operation state,

At this time, the variation of the 21st transistor Q21 according to the ambient temperature is considered to be smaller than the change of the 22st transistor Q22 and the 23rd transistor Q23.

When the ambient temperature is high, the input resistance between the base and the emitter of the twenty-second transistor Q22 and the twenty-third transistor Q23 is low so that the bias current of each base is increased, and the twenty-second transistor Q22 and the twenty- The idling current flowing between the collector and the emitter of the transistor increases and the heat generation is increased. Since the resistance of the thermistor TH2 is lowered at this time, the combined resistance with the 26th resistor R26 connected in series becomes lower and the combined resistance with the 25th resistor R25 connected in parallel becomes lower, The bias current increases at the base of the first transistor Q22 and the second transistor Q23 to decrease the impedance between the collector and the emitter and decrease the voltage between the positive input terminal Pin2 and the negative input terminal Nin2. And the idling current, which is increased due to the increase of the ambient temperature, is decreased and the normal operation state is maintained.

Conversely, when the ambient temperature is low, the input resistance between the base and the emitter of the twenty-second transistor Q22 and the twenty-third transistor Q23 becomes high, so that the bias current of each base decreases to form the twenty-second transistor Q22 and the twenty- The idling current flowing between the collector and the emitter of the transistors Q23 and Q23 is reduced and the operating point is deviated. At this time, since the resistance of the thermistor TH2 is high, the combined resistance with the 26th resistor R26 connected in series is increased and the combined resistance with the 25th resistor R25 connected in parallel increases, The bias current is reduced in the base to increase the impedance between the collector and the emitter and increase the voltage between the positive input terminal Pin2 and the negative input terminal Nin2 to supply the twenty second transistor Q22 and the twenty third transistor Q23 The idling current decreases due to an increase in the bias voltage due to the decrease in the ambient temperature, and the normal operation state is maintained.

In the present invention, it is possible to appropriately adjust the idling current even when transistors having different characteristics are used in the implementation of the buffer amplifier, thereby making it possible to set the operating point, thereby widening the selection width of the device, and more precisely adjusting the idling current And the idling current once adjusted does not change even when the ambient temperature is changed, so that the stable operating characteristic can be obtained and the operating characteristic is stable even in a wider temperature range.

Claims

The collector of the 21st transistor Q21 and the base of the 25th resistor R25, the 26th resistor R26 and the 22st transistor Q22 are connected to the positive input terminal Pin2,
The other terminal of the 26th resistor R26 is connected to the thermistor TH2,
The other terminal of the thermistor TH2, the other terminal of the twenty-fifth resistor R25, and the variable resistor VR2,
The emitters of the twenty-first transistor Q21 and the base of the twenty-third transistor Q23 are connected to the negative input terminal Nin2,
The emitter of the twenty-second transistor Q22, the twenty-first resistor R21 and the twenty-third resistor R23,
The emitter of the twenty-third transistor Q23, the twenty-second resistor R22 and the twenty-fourth resistor R24,
The other terminal of the variable resistor VR2 and the other terminal of the twenty-third resistor R23 and the other terminal of the twenty-fourth resistor R24 are connected to the base of the twenty-first transistor Q21,
And the other terminal of the twenty-first resistor R21 and the other terminal of the twenty-second resistor R22 are connected to the output terminal Out2.