200919951 九、發明說明： 【發明所屬之技術領域】 本發明係關於電流補償的電路及方法，更係關於動態 電流補償的電路及方法。200919951 IX. Description of the Invention: [Technical Field] The present invention relates to a circuit and method for current compensation, and more particularly to a circuit and method for dynamic current compensation.
【先前技術J 運算放大器（Operation Amplifiers，op-amps)是最為廣 泛運用的電子裝置之一。運算放大器常見於各種商用、消 費者用或科學用裝置等電子產品中。舉例而言，運算放大 器可用以執行邏輯運算像是電壓補償，或是用以執行數學 計算。 傳統上，運算放大器以直流電(^Direct Current，DC)耗 接至具有複數個輸入端及輸出端之電子電壓放大器，其中 只有一輸出端是用以驅動負載。如第1圖所示，一運算放 大器104標示加號“+”之輸入端100和標示減號之輸入 端102可分別接收一第一交流電壓輸入S1 (有一已知振幅) 及一第二交流電壓輸入S2，其中該第二交流電壓輸入S2 為該第一交流電壓輸入S1之反相訊號。理想情況下，該運 算放大器之輸出為該兩訊號電壓差的放大訊號。在此，輸 出一般指「輸入電壓差」之放大。 第1圖中，運算放大器104之減號端輸出106和加號 端輸出108分別具有與減號端輸入102的S2及加號端輸入 100的S1相同極性之輸出訊號。 5 200919951 在傳統運用中’藉由將該輸出之一部分回饋至其輪 的一反相端（負回饋）來控制運算放大器之輸出。此外」、 算放大器由複數個部分（複數級）所組成，其中，運算放大 器之級數隨不同運用而變。例如，運算放大器可由輪入級 頻率銳化級及輸出級所組成，反之，亦可僅僅具有輪入級 及輸出級。 運算放大器依照其輸入電壓與輸出電流之間之關係可 分為數種等級，如A級、B級和AB級等等。A級運算放 大器具有一固定的靜態負載電流，造成相對高功耗及相對 高的小訊號線性度。相反地，B級運算放大器在—般負裁 下具有零靜態負載電流’造成相對低功耗及相對低之小訊 號線性度。AB級運算放大器在功耗及小訊號線性度上則^ 於A級與β級之間。然而，ab級放大器無法於其輪出級 適當地控制靜態電流，造成其易受各種因素影響，例如^ 程、操作電壓，及（或）溫度。此外，因為其固定之偏壓 流，ΑΒ級運算放大器之平均電流消耗量無法明確定義，， 得估計其平均功耗變得相當困難。 使 【發明内容】 有鑑於此，本發明之一範例係提供一種在運算 。 中動態補償電流之方法，其中該運算放大器包括—第j器 和一第二級，該第一級用以接收兩輸入訊號，而該第_、’及 耦接至該第一級，其中該第二級包括含有該運算放大二級 一第一輸出之一第一部分，以及含有該運算放大器器之 °之〜第 200919951 二輸出之一第二部分，該方法包括提供一第一電流至該第 二級之該第一部分、提供一第二電流至該第二級之該第二 部分、依照第二級之該第一部分之電流消耗量調整該第一 電流、及依照第二級之該第二部分之電流消耗量調整該第 二電流，其中該第一及第二電流之和大致為定值。 本發明之另一範例提供一種可動態補償電流之運算放 大器，包括一第一級、一第二級、一第一電流源及一第二 電流源。其中該第一級用以接收至少兩輸入訊號，該第二 級耦接至該第一級，其中該第二級包括含有該運算放大器 之一第一輸出之一第一部分，以及含有該運算放大器之一 第二輸出之一第二部分，而該第一電流源用以提供一第一 偏壓電流以偏壓該第二級之該第一部分，而該第二電流源 用以提供一第二偏壓電流以偏壓該第二級之該第二部分。 本發明之另一範例提供一種用以動態補償電流之積體 電路，包括一第一級、一第二級、一第一組電晶體、一第 二組電晶體。其中該第一級用以接收至少兩輸入訊號，該 第二級耦接至該第一級，其中該第二級包括含有該運算放 大器之一第一輸出之一第一部分，以及含有該運算放大器 之一第二輸出之一第二部分，而該第一組電晶體用以從一 第一電流源提供一第一偏壓電流以偏壓該第二級之該第一 部分，而該第二組電晶體用以從一第一電流源提供一第二 偏壓電流以偏壓該第二級之該第二部分，其中當該運算放 大器之該第一輸出具有正在增加之一訊號時，則該第一電 流源用以增加該第一偏壓電流，而當該運算放大器之該第 7 200919951 二輸出具有正在增加之一訊號時，則該第二電流源用以增 加該第二偏壓電流，而其中該第一偏壓電流與該第二偏壓 電流之總和大致為常數。 為使本發明之上述目的、特徵、和優點能更明顯易懂， 下文特舉較佳實施例並配合所附圖式做詳細說明。 【實施方式】 第2圖為依照本發明之差動運算放大器200之示意 圖。如前所述，運算放大器200，舉例而言，為一積體電 路，用以執行某些運用，像是廣播及電視之傳送接收、高 傳真立體聲裝置、樂器放大器、微電腦、和（或）其他電子 裝置等。運算放大器200在此以差動放大器為例，但其同 樣也可以是非反相放大器、電壓跟隨器、加法放大器、積 分器、微分器或比較器。 運算放大器具有一特性，使得其輸出訊號之線性度隨 其輸入訊號之振幅遞增而遞減。舉例而言，當輸入訊號振 幅增加，則耦接至該運算放大器輸出級之負載所消耗之電 流量也會增加。此時，該運算放大器輸出級也需要較高之 偏壓電流以配合該負載因為增加的輸出訊號所消耗之電 流。一傳統之運算放大器可能無法達到此要求而提高電 流，因此輸出訊號就不能達到理想的水準。是以該輸出訊 號之線性度可能因而降低。 運算放大器200用以動態補償其輸出級（在此指第二級) 上變化電流的需求，且能使總電流消耗維持穩定，因此造 8 200919951 成相對高之大訊號線性度及相對低之平均功耗。運算放大 器200之結構及操作將於下詳述。 如第2圖所示，運算放大器200包括用以從一電源 (VDD)202接收電力之電子連接201、運算放大器輸入204a 及204b(運算放大器輸入204總稱兩者）、運算放大器輸出 206a及206b(運算放大器輸出206總稱兩者）、電晶體 212a、212b、212c、212d、212e 及 212f(電晶體 212 總稱該 等電晶體）。在第2圖的實施例中，電晶體212皆是金屬氧 化層半導體場效電晶體（Metal-Oxide-Semiconductor Field[Prior Art J Amplifiers (op-amps) are one of the most widely used electronic devices. Operational amplifiers are commonly found in a variety of electronic products such as commercial, consumer or scientific devices. For example, an operational amplifier can be used to perform logic operations such as voltage compensation or to perform mathematical calculations. Traditionally, op amps have been drained to a digital voltage amplifier with multiple inputs and outputs with a direct current (DC), of which only one is used to drive the load. As shown in FIG. 1, an operational amplifier 104, the input terminal 100 indicating the plus sign "+" and the input terminal 102 indicating the minus sign, respectively receive a first AC voltage input S1 (having a known amplitude) and a second AC. The voltage input S2, wherein the second AC voltage input S2 is an inverted signal of the first AC voltage input S1. Ideally, the output of the operational amplifier is an amplified signal of the difference between the two signals. Here, the output generally refers to the amplification of the "input voltage difference". In Fig. 1, the minus terminal output 106 and the plus terminal output 108 of the operational amplifier 104 have output signals of the same polarity as S1 of the minus terminal input 102 and S1 of the plus terminal input 100, respectively. 5 200919951 In conventional applications, the output of an operational amplifier is controlled by feeding back a portion of the output to an inverting terminal (negative feedback) of its wheel. In addition, the amplifier consists of a plurality of parts (complex levels), wherein the number of stages of the operational amplifier varies with different applications. For example, an operational amplifier may be composed of a wheel-in frequency sharpening stage and an output stage, and conversely, it may have only a wheel-in stage and an output stage. The operational amplifier can be divided into several levels according to the relationship between its input voltage and output current, such as Class A, Class B, and Class AB. The Class A operational amplifier has a fixed static load current that results in relatively high power consumption and relatively high small signal linearity. Conversely, a Class B op amp with zero static load current at normal negative cut results in relatively low power consumption and relatively low signal linearity. Class AB op amps are between A and β in terms of power consumption and small signal linearity. However, ab-amplifiers are not able to properly control the quiescent current at their wheel-out stage, making them susceptible to various factors such as operating voltage, operating voltage, and/or temperature. In addition, because of its fixed bias current, the average current consumption of the 运算-level operational amplifier cannot be clearly defined, and it is quite difficult to estimate its average power consumption. SUMMARY OF THE INVENTION In view of the above, an example of the present invention provides an in-operation. The method of dynamically compensating current, wherein the operational amplifier includes a jth device and a second stage, the first stage is configured to receive two input signals, and the first _, 'and coupled to the first stage, wherein the The second stage includes a first portion of the second output including the operational amplification second stage, and a second portion of the second output of the 200919951 output containing the operational amplifier, the method comprising providing a first current to the first The first portion of the second level, the second current is supplied to the second portion of the second level, the first current is adjusted according to the current consumption of the first portion of the second level, and the second current is according to the second level A portion of the current consumption adjusts the second current, wherein the sum of the first and second currents is substantially constant. Another example of the present invention provides an operational amplifier capable of dynamically compensating current, comprising a first stage, a second stage, a first current source, and a second current source. The first stage is configured to receive at least two input signals, the second stage is coupled to the first stage, wherein the second stage includes a first portion including a first output of the operational amplifier, and the operational amplifier is included a second output of the second portion, the first current source for providing a first bias current to bias the first portion of the second stage, and the second current source for providing a second A bias current is applied to bias the second portion of the second stage. Another example of the present invention provides an integrated circuit for dynamically compensating current, comprising a first stage, a second stage, a first set of transistors, and a second set of transistors. The first stage is configured to receive at least two input signals, the second stage is coupled to the first stage, wherein the second stage includes a first portion including a first output of the operational amplifier, and the operational amplifier is included One of the second outputs is a second portion, and the first set of transistors is configured to provide a first bias current from a first current source to bias the first portion of the second stage, and the second set The transistor is configured to provide a second bias current from a first current source to bias the second portion of the second stage, wherein when the first output of the operational amplifier has a signal being added, then the The first current source is configured to increase the first bias current, and when the 7th 200919951 output of the operational amplifier has a signal being added, the second current source is used to increase the second bias current. And wherein the sum of the first bias current and the second bias current is substantially constant. The above described objects, features, and advantages of the present invention will be more apparent from the description of the preferred embodiments. [Embodiment] Fig. 2 is a schematic view of a differential operational amplifier 200 in accordance with the present invention. As previously mentioned, operational amplifier 200, for example, is an integrated circuit for performing certain applications, such as broadcast and television transmission and reception, high-fidelity stereo devices, instrument amplifiers, microcomputers, and/or the like. Electronic devices, etc. The operational amplifier 200 is exemplified here as a differential amplifier, but it may also be a non-inverting amplifier, a voltage follower, a summing amplifier, an integrator, a differentiator or a comparator. An operational amplifier has a characteristic such that the linearity of its output signal decreases as the amplitude of its input signal increases. For example, as the input signal amplitude increases, the amount of current consumed by the load coupled to the op amp output stage also increases. At this point, the op amp output stage also requires a higher bias current to match the current consumed by the load due to the increased output signal. A conventional op amp may not be able to meet this requirement and increase the current, so the output signal will not reach the desired level. Therefore, the linearity of the output signal may be reduced. The operational amplifier 200 is used to dynamically compensate for the demand for varying currents at its output stage (here, the second stage), and to maintain a constant total current consumption, thus making a relatively high signal linearity and a relatively low average. Power consumption. The structure and operation of the operational amplifier 200 will be described in detail below. As shown in FIG. 2, operational amplifier 200 includes an electrical connection 201 for receiving power from a power supply (VDD) 202, operational amplifier inputs 204a and 204b (both operational amplifier inputs 204), and operational amplifier outputs 206a and 206b ( The operational amplifier outputs 206 are collectively referred to as both), the transistors 212a, 212b, 212c, 212d, 212e, and 212f (the transistors 212 are collectively referred to as the transistors). In the embodiment of Fig. 2, the transistors 212 are all metal oxide layer semiconductor field effect transistors (Metal-Oxide-Semiconductor Field).
Effect Transistor ’ MOSFET)。運算放大器200更包括電阻 器208a及208b(電阻器208總稱兩者）、電容器210a及 210b(電容器210總稱兩者）、電流源214a及214b(214總稱 兩者）。上述電容器、電阻器、電流源及電晶體之數目僅為 示意，其他不同數量或型態之配置同樣可行。 如第2圖所示，運算放大器200包括差動輸入級(在此 指第一級），其中204作為一差動輸入，包括兩p型電晶體 212a、212b以及耦接至電源VDD 202、用以提供電源電流 給第一級之電流源IB〇。212a及212b之源極互相耦接後又 耦接至電流源IB〇以接收電流供應。212a及212b之閘極用 以分別自運算放大器輸入204a及204b接收輸入訊號S1 及S2 ’而其中S2為S1之反相訊號。212a及212b為汲極 將輸出訊號供應至該第一級之負載，而該第一級之負載可 為共模回饋迴路以包括兩η型電晶體212c及212d。第2 圖中，212c及212d之汲極分別耦接至212a及212b之汲 9 200919951 極，212c及212d之源極耦接至參考電壓224或接地，而 212c及212d之閘極則互相耦接以接收共模回饋 Mode Feedback)訊號。共模回饋迴圈為本技藝人士所熟 知，是以未將其細節表示於第2圖中，且本文將不再贅述。 運算放大器200更包括用以處理第一級輸出訊號之第 二級’其中’運算放大器輸出作為—差動輪出。如第 2圖所不，第二級包括電晶體2Ue及212f，用以作為共源 極放大器。電晶體212e及2l2f之閘極分別耦接至電晶體 212a及212b之及極以分別接收第_級之輸出訊號。電晶 體212e及212f之源極耦接至參考電壓224或接地。第二 級於電晶體212e及212f上提供運算放大器2〇〇的輸出訊 號以及分別由運算放大器輸出2〇6a及2〇6b所提供之差動 輸出。 運鼻放大态200更包括回饋迴路，而回饋迴路包括電 阻器208及電谷器210以穩定運算放大器2〇〇之運作。更 明確地說，電阻器208a及電容器210a耦接於212e之汲極 與212e之閘極間以將輸出訊號之一部分回饋至運算放大 器200的第一級。208b及210b耗接於212f之沒極與212f 之閘極間以將輸出訊號之一部分回饋至運算放大器2〇〇之 第一級。回饋迴路可穩定運算放大器2〇〇之運作，例如， 減少或避免相位邊限(phase margin)及（或）增益邊限（gain margin)。 運算放大器200之第二級也包括電流源214a、214b及 IB1。電流源IB1提供電流至電流源214&及21牝，而電流源 10 200919951 214a及214b則分別提供偏壓電流至包括電晶體212e及 212f的兩共源極放大器，如同作為其負載般。 在電源VDD 202開始動作之後，交流電壓訊號可被施 加於運算放大器輸入204之上，其將於電晶體212a、212b 之汲極端產生訊號（以電壓訊號之型式），並且調整分配於 電晶體212a及212b之間的Ib〇電流。舉例而言’在一貫施 例中，在電晶體212a上之輸出訊號可為一交流電源訊號 S1，而電晶體上之輸入訊號可為一 S1的反相電壓訊號(換 言之，S1與S2相位差180度）。 隨著輸入訊號204a及204b之改變，流經電晶體212a 及212b之電流也跟著改變。該電流變化以電壓訊號之型 式，透過第一級之負載（即包含電晶體212c及212d之共模 回饋迴路)傳送至運算放大器200之第二級（即電晶體212e 及212f)。其中提供至包含電晶體212e及212f之共源極放 大器的電壓訊號將被放大，並於運算放大器輸出206上形 成輸出訊號。 當運算放大器輸出206之輸出訊號振幅相對較小時， 則耦接至運算放大器輸出206之負載依照該運算放大器輸 出206上之輸出訊號振幅而被驅動。當運算放大器輸出206 之輸出訊號振幅相對大時，則該負載必須相應地汲取大量 電流。於此同時，由212e及212f所組成之共源極放大器 也需要相對大量之電流。如果電流源214a及214b不能滿 足這些電流需求，則放大器輸出206上之輸出訊號的線性 度會因而降低。 200919951 與本發明之實施例一致，電流源214a及214b用以當 運算放大器輸出206上之輸出訊號振幅增加時，提高分別 由電流源2Ma及2l4b所提供之電流量。因此，運算放大 器200之第 、奴增加電流之需求依照輸入訊號被動態 地補償，並使運算放大 以保持。該輸人訊號施上輸出訊號的線性度得 第二級所需之電流量彳增加將導錢算放大11 2。〇之 加可將額外㈣流導^增加。並且，輸人訊號振幅之增 輸出級。以此方式，=要㈣電流之運算放大器200的 大器因應輸入^'^214a及21扑動態補償運算放 器輸出206的輸出訊㉟產生的電流需求’也使運算放大 . 死之線性度得以保持。 此外，與作為差動 當運算放大器輸出2〇6a’』出之運算放大器輸出206 一致， 206b上之電流下降。^上之電流增加，則運算放大器輸出 之電流增加，則運算敌也’當運算放大器輸出206b上 運算放大器200之總電^為輪出206a之電流下降。因此， 與本發明之實施例也耗量大致維持穩定。 提供一大致不變之電淠 致電〃IL源214a及214b共同 方面，電流源IB1提供得總電流消耗量維持穩定。一 214b共享從電流源Ιβ]而^數電流輸出，電流源214a及 214b用以使提供至共源極之該常數電流。電流源2i4a及 組成）之電流為分別自電节玫大裔（由電晶體212e及212f所 以下將對提供至電晶體^原Li汲取之電流乘以一常數。 述。 心及212f之電流作更詳細之描 200919951 第3圖表示第2圖所揭露之運算放大器200的一實施 例，其包括電流源214a及214b之使用範例。 如第3圖所示’電流源214a包括一電阻器302a及 302b(電阻器302總稱兩者）、一 MOS電晶體304a、304b 又及304c(MOS電晶體304總稱此三者）。而電流源214b 包括電阻器306a及306b(電阻器306總稱兩者）、一 MOS 電晶體308a、308b又及308c(MOS電晶體308總稱此三者）。 此外，電阻器302a電性耦接於電晶體212b之汲極與 電晶體304c之閘極間。電阻器302b電性耦接至電阻器 302a、306b、電源 VDD 202 及電晶體 304a、304b、308a、 308b之源極。電阻器306a電性耦接於電晶體212a之汲極 與電晶體308c之閘極之間。此外，電晶體304a、304b之 閘極皆輛接至電晶體304b之没極。 從電晶體304a之源極流至其没極之電流ιΒ11之值隨電 晶體304A之閘源極壓降(vGS)而改變，而該閘源極壓降與 電晶體304b之閘源極壓降相同。當電晶體3〇4a及3〇4b皆 _ (W / L)Transistor304a j 1 (W / L)Transistor304b 丑1 - 操作於飽合模式（saturation mode) ’則從電晶體304a之源 極流至其汲極之電流Ibm和從電晶體3〇4b之源極流至其 及極之電流Ιβ 1 _2之間存有一關係式（1)如下： 2 (1) 在關係式（1)之分子中，W及L分別為MOS電晶體304a 之通道寬度及長度。而在關系式（1)之分母中，W及L分別 為MOS電晶體304b之通道寬度及長度。 相似地，從電晶體308a之源極流至其汲極之電流 13 200919951 和從電晶體308b之源極流至其汲極之電流Ib 1 -5之間存有 一關係式（2)如下： j _ {WIL)Transistor30^a j lBl~ 6 - (W / L)Transistor30U lBl ~ 5 (2) 在關係式（2)之分子中，W及L分別為MOS電晶體308a 之通道寬度及長度。而在關係式（2)之分母中，W及L分別 為MOS電晶體308b之通道寬度及長度。 如第3圖所不5電流Ib1-2及Ιβ1_5乃由電流源Ιβί所提 供。而電流Ib 1-2及Ib 1-5 之和與電流源Ib 1所提供之電流相 同。因此，如果電晶體304a之寬長比（W/L)與電晶體304a 之寬長比（W/L)之比值相等於電晶體308a之寬長比（W/L) 與電晶體308b之寬長比（W/L)之比值，則電流Ibm與IB1_6 之和為電流源IB1所提供之電流乘上一常數。 此外，電阻器302及306上電壓之改變造成電晶體304c 及308c之閘極上的電位發生改變。電流I B1-2及Ib1-5為電 阻器302及306上之電壓降之函數。因為流經電晶體304a、 308a至運算放大器輸出206之電流為電流IB1_2及IB1_5之函 數，而電流IB1_!及IB1-6也為電阻器302及306之電壓降的 函數。此外，如前文所述，導向至運算放大器206之電流 Ibm及IB1_6之量大體上將分別由電晶體304及308之通道 的寬長比所決定。結果，藉由適當地設計電晶體304及308 的尺寸，電流I B1-1 ^ Ιβ1-6 的範圍可被調整以配合各種應用。 如第3圖所示，其標示了運算放大器200中的複數個 電流。包括流經電晶體304a之電流Ιβη、流經電晶體304b 及304c之電流Ib 1 _2、流經電阻裔302之電流Ib 1 -3、流經電 14 200919951 阻器212a及212b之電流IB〇、流經電阻器3〇6之電流Ιβΐ 4、 流經電晶體3〇8b及308c之電流Ιβι·5、及流經電晶體3〇84a 之電流〗B1_6。 與第3圖之實施例一致，當輪入訊號之振幅相對大 ，、，則電流源214a及214b對負裁増加電流之需求進行動 態補償，因此維持大訊號線性度之穩定。 *輸入訊號S1及S2之振幅相對小時，則運算放大器 輸出206上之訊號之振幅同樣也相對小。因此，第二級上 之電流波動相對小’運算放大器輪出襄之線性度可不予 考慮三負回饋之結果，舉例而言，當訊號81之電位（施加 於運算放大器輸入204a之訊號）較訊號S2之電位（施加於 運算放大器輸入204b之訊號）高時，則運算放大器輸出 206b上之訊號的電位較運算放大器輸出2〇6a之訊號的電 位為低。 在此情況下，第一級在電晶體212a之汲極上之訊號輸 出（施加於電阻器306a及306b上）同樣也較電晶體212b之 没極的訊號（施加於電阻器302a及302b)為低。因此，一相 對較低之偏壓被施加於電晶體308之閘極，造成流經電晶 體之電流ιΒ]_5也相對低。因為電流ιΒ1·6正比於電流Ibi_5， 所以電流ιΒ1_6也相對低。因此’供應至運算放大器輸出2〇6b 之負載及含有電晶體⑽的共源減A器上之總電流也相 對低。相反地，由於電晶體304c之閘極電壓相對較大 故，電流IB1_2及Ib]_3則相對大。 同樣地，承上例，當訊號S2之電位較訊號S1低時， 15 200919951 214b所提供之Effect Transistor ’ MOSFET). The operational amplifier 200 further includes resistors 208a and 208b (both resistors 208 collectively), capacitors 210a and 210b (both capacitors are collectively referred to as both), and current sources 214a and 214b (both collectively referred to as both). The number of capacitors, resistors, current sources, and transistors described above is illustrative only, and other different numbers or configurations are equally feasible. As shown in FIG. 2, the operational amplifier 200 includes a differential input stage (herein referred to as a first stage), wherein 204 is a differential input, including two p-type transistors 212a, 212b and coupled to the power supply VDD 202. To provide a supply current to the current source IB of the first stage. The sources of 212a and 212b are coupled to each other and then coupled to the current source IB to receive the current supply. The gates 212a and 212b are used to receive input signals S1 and S2' from operational amplifier inputs 204a and 204b, respectively, and S2 is the inverted signal of S1. 212a and 212b are drain electrodes that supply output signals to the load of the first stage, and the load of the first stage can be a common mode feedback loop to include two n-type transistors 212c and 212d. In the second figure, the drains of 212c and 212d are respectively coupled to 汲9 200919951 poles of 212a and 212b, the sources of 212c and 212d are coupled to the reference voltage 224 or ground, and the gates of 212c and 212d are coupled to each other. To receive the Mode Feedback signal. The common mode feedback loop is well known to those skilled in the art, and the details are not shown in Figure 2, and will not be repeated herein. The operational amplifier 200 further includes a second stage 'in' operational amplifier output for processing the first stage output signal as a differential wheel. As shown in Fig. 2, the second stage includes transistors 2Ue and 212f for use as a common source amplifier. The gates of the transistors 212e and 212f are respectively coupled to the gates of the transistors 212a and 212b to receive the output signals of the _th stage, respectively. The sources of the electrical crystals 212e and 212f are coupled to a reference voltage 224 or to ground. The second stage provides an output signal of the operational amplifier 2A on the transistors 212e and 212f and a differential output provided by the operational amplifier outputs 2〇6a and 2〇6b, respectively. The nose-enhanced state 200 further includes a feedback loop, and the feedback loop includes a resistor 208 and a grid 210 to stabilize the operation of the operational amplifier 2. More specifically, resistor 208a and capacitor 210a are coupled between the drain of 212e and the gate of 212e to feed a portion of the output signal back to the first stage of operational amplifier 200. 208b and 210b are consuming between the gate of 212f and the gate of 212f to feed back one of the output signals to the first stage of the operational amplifier 2〇〇. The feedback loop stabilizes the operation of the operational amplifier 2, for example, reducing or avoiding phase margins and/or gain margins. The second stage of operational amplifier 200 also includes current sources 214a, 214b and IB1. Current source IB1 provides current to current sources 214 & and 21 牝, while current sources 10 2009 19951 214a and 214b provide bias currents to the two common source amplifiers including transistors 212e and 212f, respectively, as they are loaded. After the power supply VDD 202 begins to operate, an alternating voltage signal can be applied to the operational amplifier input 204, which will generate a signal (in the form of a voltage signal) at the extremum of the transistors 212a, 212b, and the adjustment is distributed to the transistor 212a. Ib〇 current between 212b and 212b. For example, in a consistent embodiment, the output signal on the transistor 212a can be an AC power signal S1, and the input signal on the transistor can be an inverted voltage signal of S1 (in other words, the phase difference between S1 and S2) 180 degree). As the input signals 204a and 204b change, the current flowing through the transistors 212a and 212b also changes. The current change is transmitted to the second stage of operational amplifier 200 (i.e., transistors 212e and 212f) through the load of the first stage (i.e., the common mode feedback loop including transistors 212c and 212d) in the form of a voltage signal. The voltage signal provided to the common source amplifier comprising transistors 212e and 212f is amplified and an output signal is formed on operational amplifier output 206. When the output signal amplitude of the operational amplifier output 206 is relatively small, the load coupled to the operational amplifier output 206 is driven in accordance with the output signal amplitude on the operational amplifier output 206. When the output signal amplitude of the op amp output 206 is relatively large, the load must draw a large amount of current accordingly. At the same time, a common source amplifier composed of 212e and 212f also requires a relatively large amount of current. If current sources 214a and 214b are unable to meet these current demands, the linearity of the output signal on amplifier output 206 will thus decrease. 200919951 Consistent with embodiments of the present invention, current sources 214a and 214b are used to increase the amount of current provided by current sources 2Ma and 214b, respectively, as the amplitude of the output signal on operational amplifier output 206 increases. Therefore, the demand for the first and slave currents of the operational amplifier 200 is dynamically compensated according to the input signal, and the operation is amplified to maintain. The input signal is applied with the linearity of the output signal. The amount of current required for the second stage is increased by 11 2 . The addition of the additional (four) flow guide can be increased. Moreover, the input signal amplitude is increased by the output level. In this way, the current of the op amp 200 of the current (four) current is required to input the current demand generated by the output of the dynamic compensation amplifier output 206. The operation is also amplified. maintain. In addition, the current on 206b decreases as the op amp output 206, which is differential as the op amp output 2〇6a'. When the current increases, the current of the op amp output increases, and the operation of the enemy is also 'when the total power of the operational amplifier 200 on the operational amplifier output 206b is the current drop of the turn 206a. Therefore, the consumption is also substantially stable with the embodiment of the present invention. Providing a substantially constant power to the 〃IL sources 214a and 214b, the current source IB1 provides a constant total current consumption. A 214b shares the current output from the current source Ιβ], and the current sources 214a and 214b are used to supply the constant current to the common source. The currents of the current source 2i4a and the composition are respectively derived from the electric node (the currents supplied to the transistor Li by the transistors 212e and 212f are multiplied by a constant.) The current of the heart and the 212f More specifically, 200919951, FIG. 3 shows an embodiment of the operational amplifier 200 disclosed in FIG. 2, which includes an example of the use of current sources 214a and 214b. As shown in FIG. 3, the current source 214a includes a resistor 302a and 302b (resistor 302 collectively referred to as both), a MOS transistor 304a, 304b and 304c (MOS transistor 304 collectively referred to as the three), and current source 214b includes resistors 306a and 306b (resistor 306 collectively referred to as both), A MOS transistor 308a, 308b and 308c (the MOS transistor 308 collectively referred to as the three). In addition, the resistor 302a is electrically coupled between the drain of the transistor 212b and the gate of the transistor 304c. The resistor 302b is electrically The resistors 306 are electrically coupled to the drains of the transistors 212a, 304b, 308a, 308b. The resistors 306a are electrically coupled between the drains of the transistors 212a and the gates of the transistors 308c. In addition, the gates of the transistors 304a, 304b are connected to the electricity. The value of the current ιΒ11 flowing from the source of the transistor 304a to its infinite pole changes with the gate-source voltage drop (vGS) of the transistor 304A, and the gate-source voltage drop and the transistor 304b The gate voltage drop is the same. When the transistors 3〇4a and 3〇4b are both _ (W / L)Transistor304a j 1 (W / L)Transistor304b ugly 1 - operate in saturation mode 'from electricity The relationship between the current Ibm flowing from the source of the crystal 304a to its drain and the current flowing from the source of the transistor 3〇4b to its sum Ιβ 1 _2 has the following relationship (1) as follows: 2 (1) In relation In the molecule of the formula (1), W and L are the channel width and length of the MOS transistor 304a, respectively, and in the denominator of the relation (1), W and L are the channel width and length of the MOS transistor 304b, respectively. The relationship between the current flowing from the source of the transistor 308a to its drain 13 200919951 and the current flowing from the source of the transistor 308b to its drain Ib 1 -5 is as follows: j _ {WIL)Transistor30^aj lBl~ 6 - (W / L)Transistor30U lBl ~ 5 (2) In the numerator of relation (2), W and L are the channel widths of MOS transistor 308a, respectively. And length. In the denominator of relation (2), W and L are the channel width and length of MOS transistor 308b, respectively. As shown in Fig. 3, the currents Ib1-2 and Ιβ1_5 are supplied by the current source Ιβί. The sum of the currents Ib 1-2 and Ib 1-5 is the same as the current supplied by the current source Ib1. Therefore, if the ratio of the aspect ratio (W/L) of the transistor 304a to the aspect ratio (W/L) of the transistor 304a is equal to the width to length ratio (W/L) of the transistor 308a and the width of the transistor 308b. The ratio of the length ratio (W/L) is such that the sum of the current Ibm and IB1_6 is multiplied by a constant supplied by the current source IB1. In addition, changes in the voltage across resistors 302 and 306 cause changes in the potential across the gates of transistors 304c and 308c. Currents I B1-2 and Ib1-5 are a function of the voltage drop across resistors 302 and 306. Because the current flowing through transistors 304a, 308a to operational amplifier output 206 is a function of currents IB1_2 and IB1_5, currents IB1_! and IB1-6 are also a function of the voltage drop across resistors 302 and 306. Moreover, as previously described, the amounts of currents Ibm and IB1_6 directed to operational amplifier 206 will generally be determined by the aspect ratio of the channels of transistors 304 and 308, respectively. As a result, by appropriately designing the dimensions of the transistors 304 and 308, the range of the current I B1-1 ^ Ι β 1-6 can be adjusted to suit various applications. As shown in Figure 3, it identifies the plurality of currents in operational amplifier 200. The current Ιβη flowing through the transistor 304a, the current Ib 1 _2 flowing through the transistors 304b and 304c, the current Ib 1 -3 flowing through the resistor 302, and the current IB〇 flowing through the resistor 14 200919951 resistors 212a and 212b, The current flowing through the resistor 3〇6Ιβΐ4, the current flowing through the transistors 3〇8b and 308cΙβι·5, and the current flowing through the transistor 3〇84a are B1_6. Consistent with the embodiment of Fig. 3, when the amplitude of the rounding signal is relatively large, the current sources 214a and 214b dynamically compensate for the need for negative cutting and current application, thereby maintaining the stability of the linearity of the large signal. * When the amplitudes of the input signals S1 and S2 are relatively small, the amplitude of the signal on the operational amplifier output 206 is also relatively small. Therefore, the current fluctuation on the second stage is relatively small. The linearity of the operational amplifier wheel enthalpy may not take into account the result of the three-negative feedback. For example, when the signal 81 has a potential (signal applied to the operational amplifier input 204a) is a signal When the potential of S2 (the signal applied to the operational amplifier input 204b) is high, the potential of the signal on the operational amplifier output 206b is lower than the potential of the signal of the operational amplifier output 2〇6a. In this case, the signal output of the first stage on the drain of the transistor 212a (applied to the resistors 306a and 306b) is also lower than the signal of the transistor 212b (applied to the resistors 302a and 302b). . Therefore, a relatively low bias voltage is applied to the gate of the transistor 308, causing the current ι Β _5 flowing through the transistor to be relatively low. Since the current ιΒ1·6 is proportional to the current Ibi_5, the current ιΒ1_6 is also relatively low. Therefore, the total current supplied to the load of the operational amplifier output 2〇6b and the common source minus A of the transistor (10) is also relatively low. Conversely, since the gate voltage of the transistor 304c is relatively large, the currents IB1_2 and Ib]_3 are relatively large. Similarly, in the above example, when the potential of the signal S2 is lower than the signal S1, 15 200919951 214b provides
206a產生電位 則電流源214a所提供之電流IB〗_ι較電炸源 電流Ib 1-6來得大，因 值的。此外’分別流經電晶體304c及3〇8 Ibi_5)之和保持和電流Ibi相等。因此，隨著 電流Ibi-2則相應減少。因為電流IBl_]正卜 流Ibi-i也隨之減少，造成運算放大器輪出 較小之訊號。 因此，第3 圖所示之電路對運算放A||在大訊號操作 時所增加之電流需求進行補償，也使運算放大器2〇〇之總 電流消耗量保持穩定。 第2圖及第3圖以同型之電晶體為例（不是p盤的 MOSFET就是η型的MOSFET)。然而值得注意的是，運算 放大器200同樣也可由相反型式之電晶體所組成，換言 之’以η型電晶體取代p型電晶體，反之亦然。更值得 >主 意的是，運算放大器200也可由其他型式的電晶體如雙極 性接面電晶體（Bipolor Junction Transistors，BJT)戶斤取代。 最後’本發明所屬技術領域中具有通常知識者’在不 脫離本發明後附申請專利範圍的精神下，可以本發明所揭 露之概念及實施例為基礎，輕易地設計及修改其他用以達 成與本發明目標相同之架檇：。 16 200919951 【圖式簡單說明】 第1圖為本發明運算放大器之示意圖； 第2圖為本發明之運算放大器使用動態電流補償之示 意圖，以及 第3圖為本發明第2圖的運算放大器之示意圖。 【主要元件符號說明】 100〜輸入端； 102〜輸入端； 104〜運算放大器； 106〜輸出端； 108〜輸出端； 200〜運算放大器； 202〜電源； 201〜電子連接； 204a〜運算放大器輸入； 204b〜運算放大器輸入； 206a〜運算放大器輸出； 206b〜運算放大器輸出； 208a〜電阻； 208b〜電阻； 210a〜電容器； 210b〜電容器； 212a〜電晶體； 200919951 212b〜電晶體； 212c〜電晶體； 212d〜電晶體； 212e〜電晶體； 212f〜電晶體； 214a〜電流源； 214b〜電流源， 224〜參考電壓； 302a〜電阻器； 302b〜電阻； 304a〜MOS電晶體； 304b〜MOS電晶體； 304c〜MOS電晶體； 306a〜電阻器； 306b〜電阻器； 308a〜MOS電晶體； 308b〜MOS電晶體； 308c〜MOS電晶體；206a generates a potential. The current IB _ ι provided by the current source 214a is larger than the current source Ib 1-6, which is due to the value. Further, the sum of the 'flow through the transistors 304c and 3'8 Ibi_5, respectively, is kept equal to the current Ibi. Therefore, the current Ibi-2 decreases accordingly. Because the current IB1_] is also reduced, the Ibi-i is also reduced, causing the op amp to take a smaller signal. Therefore, the circuit shown in Figure 3 compensates for the increased current demand of the operational amplifier A|| during large signal operation, and also keeps the total current consumption of the operational amplifier 2〇〇 stable. Figures 2 and 3 show an example of a transistor of the same type (a MOSFET that is not a p-disk is an n-type MOSFET). It is worth noting, however, that the operational amplifier 200 can also be composed of an opposite type of transistor, in other words, an n-type transistor instead of a p-type transistor, and vice versa. It is more worthwhile to > the operational amplifier 200 can also be replaced by other types of transistors such as Bipolar Junction Transistors (BJT). In the spirit of the invention, the present invention can be easily designed and modified based on the concepts and embodiments disclosed in the present invention without departing from the scope of the invention. The object of the present invention is the same: 16 200919951 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of an operational amplifier of the present invention; FIG. 2 is a schematic diagram of dynamic current compensation using an operational amplifier of the present invention, and FIG. 3 is a schematic diagram of an operational amplifier of FIG. 2 of the present invention; . [Main component symbol description] 100~ input terminal; 102~ input terminal; 104~ operational amplifier; 106~output terminal; 108~output terminal; 200~ operational amplifier; 202~ power supply; 201~ electronic connection; 204a~ operational amplifier input 204b~ operational amplifier input; 206a~ operational amplifier output; 206b~ operational amplifier output; 208a~ resistor; 208b~ resistor; 210a~ capacitor; 210b~ capacitor; 212a~ transistor; 200919951 212b~ transistor; 212d ~ transistor; 212e ~ transistor; 212f ~ transistor; 214a ~ current source; 214b ~ current source, 224 ~ reference voltage; 302a ~ resistor; 302b ~ resistance; 304a ~ MOS transistor; 304b ~ MOS Crystal; 304c~MOS transistor; 306a~resistor; 306b~resistor; 308a~MOS transistor; 308b~MOS transistor; 308c~MOS transistor;
Ibo〜 電流源， Ibi〜 電流源， Ibi-i 〜電流； Ib1-2 〜電流； Ιβ1-3 〜電流， Ib1-4 〜電流； 18 200919951Ibo~ current source, Ibi~ current source, Ibi-i~ current; Ib1-2~ current; Ιβ1-3 ~ current, Ib1-4 ~ current; 18 200919951
Ib 1 -5〜電流， Ιβ1-6〜電流； S1〜訊號， S2〜訊號。Ib 1 -5~ current, Ιβ1-6~ current; S1~ signal, S2~ signal.