JPH09219629A - Operational amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an operational amplifier which can be simplified in a manufacturing process, does not have manufacturing dispertion, becomes constant in current consumption against power source voltage fluctuation and temperature fluctuation and is capable of performing a stable operation. SOLUTION: The bias circuit 10 of an operational amplifier is provided with a source electrode ground amplification stage 50 having load resistors 52 and 53 and a differential amplifier 40 generating voltage so that inputted reference voltage and the voltage level of the output signal of the source electrode ground amplification stage 50 may be the same and outputting the voltage the source electrode ground amplification stage 50 and a current/voltage conversion stage 60. The amplification output of the source electrode ground amplification stage 50 is fed back to the inversion input terminal of the differential amplifier 40. Between the inversion input terminal 73 of the differential amplifier 40 and the output terminal of the source electrode ground amplification stage 50, an analog switch 70 switching a connection state is connected. The output of the differential amplifier 40 is converted into voltage by the current/voltage conversion stage 60 and the voltage is outputted as bias voltage to the constant current sources NMO 25 and 27 of an A grade CMOS amplifier 20.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an operational amplifier which is formed on an integrated circuit by CMOS or the like and is used for addition and subtraction of analog signals. More specifically, the current values of a differential stage and an output stage are biased. The present invention relates to an operational amplifier having a constant current transistor determined by a voltage.

[0002]

An operational amplifier is a typical linear amplifier integrated circuit. In particular, MOS operational amplifiers are widely used as part of mixed analog / digital integrated circuits. The difference from the circuit configuration of the bipolar operational amplifier is that the load is normally capacitive, so that it has a two-stage configuration including a differential stage and a high gain stage having phase compensation.

As a conventional operational amplifier in this type of semiconductor integrated circuit, for example, there is one disclosed in Japanese Patent Laid-Open No. 52-129355.

The operational amplifier disclosed in the above document includes a reference voltage source, a constant current bias unit for receiving the voltage, a mirror stage differential stage of the input unit, and a level shift amplifying stage for amplifying the differential stage output while level shifting, The output stage further amplifies the output.

The reference voltage source stably supplies an output voltage against fluctuations in power supply voltage and fluctuations in temperature. Further, the constant current bias unit receives a voltage generated by a reference voltage source whose output voltage is stable.

In this configuration, in order to stabilize the characteristics of the operational amplifier against power supply voltage fluctuations and temperature fluctuations, a voltage generated by a reference voltage source whose output voltage is stable with respect to power supply voltage fluctuations and temperature fluctuations is used. There is a constant current bias unit as an input, and this constant current bias unit supplies a current proportional to the threshold voltage of the output of the reference voltage generator and the input MOS transistor of the constant current bias unit and a current value determined by the conductance coefficient to the differential stage. It works so as to flow to the pair transistor and the level shift stage transistor, respectively.

[0007]

However, in such a conventional operational amplifier, in order to stabilize the current value, it is necessary to form MOS transistors having different thresholds on the same substrate, which is selective. It can be realized only by channel doping by simple ion implantation. For this reason, there are problems that the manufacturing process becomes complicated and that fine control of ion implantation is necessary to obtain a desired threshold voltage.

The present invention provides an operational amplifier capable of simplifying the manufacturing process, having no manufacturing variations, and having a constant current consumption with respect to power supply voltage fluctuations and temperature fluctuations and capable of stable operation. With the goal.

[0009]

An operational amplifier according to the present invention is an operational amplifier having a constant current transistor in which the current values of a differential stage and an output stage are determined by a bias voltage, and a reference voltage source is used as an input. It is configured to have a bias circuit that generates a bias voltage.

The bias circuit is a differential amplifier which generates a voltage so that the input reference voltage and the voltage level of the output signal of the amplifying means are the same as those of the amplifying means having a load resistance and outputs the voltage to the amplifying means. The bias circuit may further comprise a differential amplifier having a non-inverting input terminal connected to the reference voltage source, and an output terminal connected to the inverting input terminal of the differential amplifier. A source electrode grounded amplifier having a source electrode grounded, wherein the differential amplifier outputs a differential amplification output to a gate electrode of the source electrode grounded amplifier and also outputs to the constant current transistor as a bias voltage, The source electrode grounded amplifier may be configured to feed back the amplified output to the inverting input terminal of the differential amplifier.

The source electrode grounded amplifier may have its source electrode grounded via a load resistor.

The bias circuit may include a current-voltage conversion circuit for converting the output signal of the differential amplifier into a voltage, and the output signal of the current-voltage conversion circuit may be output as a bias voltage. An analog switch for switching the connection state may be provided between the inverting input terminal and the output terminal of the source electrode grounding type amplifier. Further, a plurality of load resistors may be provided and the voltage appearing in the plurality of load resistors may be output as the output voltage of the source-electrode grounded amplifier.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION The operational amplifier according to the present invention is a CM.
It can be applied to an operational amplifier made on an integrated circuit by an OS or the like and used for addition and subtraction of analog signals.

FIG. 1 is a circuit diagram showing the configuration of an operational amplifier according to the first embodiment of the present invention. In FIG. 1, 10
Is a bias circuit of the operational amplifier, 20 is the class A CMOS
The bias circuit 10 is an amplifier and includes a reference voltage input terminal 1, a control terminal 2, a first output terminal 13, a second output terminal 14, a bias voltage generation circuit 30 that generates a bias voltage in the bias circuit 10, and a difference. Source amplifier grounded amplification stage 50 using dynamic amplifier 4Ο (differential amplification means) and a resistor as a load element.
(Amplifying means, source electrode grounding type amplifier), current / voltage conversion stage 60 (current / voltage conversion circuit) and analog switch 7
It consists of 0.

The bias voltage generating circuit 30 has a Ρ channel MOS transistor (hereinafter referred to as a PMOS) 3.
1 and an N-channel MOS transistor (hereinafter referred to as NMOS) 32, the source electrode of the ΡMOS 31 is the positive power supply V +, and the gate and drain electrodes are NM.
It is connected to the drain electrode and the gate electrode of the OS 32 and also to the node N1. The source electrode of the NMOS 32 is connected to the negative power source V- (or ground potential). The bias voltage generation circuit 30 is a bias circuit for the differential amplifier 40, and generates a bias voltage by dividing the ΡMOS 31 and the NMOS 32.

The differential amplifier 40 is an input MOS transistor.
41, 42, PMOS 43, 44 for load elements, and NMOS 45 for constant current source. The gate electrode of the NMOS 41 is the non-inverting input terminal at the reference voltage input terminal 1,
The drain electrode is connected to the drain electrode and the gate electrode of the PMOS 43, and the source electrode is connected to the drain electrode of the NMOS 45.

The gate electrode of the NMOS 42 serves as an inverting input terminal at the output terminal 73 of the analog switch 70.
The drain electrode is connected to the drain electrode of the PMOS 44 and the node N3, and the source electrode is connected to the drain electrode of the NMOS 45. The gate electrode of PMOS44 is PMOS4
3 and the source electrodes of the PMOSs 43 and 44 are connected to the positive power source V +. The gate electrode and the source electrode of the NMOS 45 are connected to the node N1 and the negative power supply V-, respectively.

The source electrode grounded amplification stage 50 is a PMO.
S51 and load resistors 52 and 53
The gate electrode of 51 is the node N3 and the second output terminal 14
The source electrode is connected to the positive power source V +, and the drain electrode is connected to the node N4. One end of load resistor 52 is connected to node N4, the other end is connected to node N5, one end of load resistor 53 is connected to node N5, and the other end is connected to negative power supply V-. That is, the gate electrode of the PMOS 51 has a node N3 (differential output terminal of the differential amplifier 40).
And the second output terminal 14 are connected, the source electrode is connected to the positive power source V +, and the drain electrode is connected to the load resistors 52 and 5.
3 is connected to the negative power source V-.

The current / voltage conversion stage 60 includes a PMOS 6
1 and NMOS 62, the gate electrode of the PMOS 61 is connected to the node N3, and the source electrode is the positive power supply V
The drain electrode is connected to +, and the drain electrode and the gate electrode of the NMOS 62 are connected to the first output terminal 13. The source electrode of the NMOS 62 is connected to the negative power source V-. The current / voltage conversion circuit 60 receives the voltage of the node N3 as an input, and supplies the first output terminal 13 with the class A CMOS amplifier 20.
Output the bias voltage used in
A transistor having the same conductance as the PMOS 51 is used for S61.

The analog switch 70 has two input terminals 71 and 72, one output terminal 73, and a control terminal 7.
4, the first input terminal 71 is connected to the node N4, the second input terminal 72 is connected to the node N5, and the output terminal 73 is connected to the node N4.
2, the control terminal 74 is connected to the control terminal 2, respectively. The analog switch 70 connects the first input terminal 71 or the second input terminal 72 to the output terminal 73 according to the control signal input to the control terminal 2.

In this way, the bias circuit 10 and the source-electrode grounded amplification stage 50 having the load resistors 52 and 53 have the same reference voltage and the voltage level of the output signal of the source-electrode grounded amplification stage 50 are the same. The main part of the differential amplifier 40 is to generate a voltage at the source electrode and output it to the source electrode grounded amplification stage 50 and the current / voltage conversion stage 60. The source electrode grounded amplification stage 50 outputs the amplified output to the inverting input of the differential amplifier 40. It is configured to be fed back to the terminal. Further, the inverting input terminal 73 of the differential amplifier 40 and the source electrode grounded amplification stage 5
An analog switch 70 for switching the connection state is further provided between the output terminals of 0, and a current / voltage conversion stage 60 for converting the output of the differential amplifier 40 into a voltage.

On the other hand, the class A CMOS amplifier 20 includes NMOS 21 and 22 for input and PMOS 2 for load element.
3, 24, a constant current source ΝMOS 25 (constant current transistor) constitutes a differential amplification stage, and ΡM0S26 and NMO
The output stage is composed of S27 (constant current transistor).
This is a known class A CMOS amplifier having a differential input terminal 3, 4, an output terminal 5, and a bias input terminal 13, which constitutes a phase compensation circuit with the MOS 28, the PMOS 29, and the capacitor C1.

Here, the constant current sources ΝMOS 25 and 27 are
It is composed of a transistor having the same conductance as or proportional to the NMOS 62 of the current / voltage conversion circuit 60.

A concrete circuit configuration of the analog switch 70 is shown in FIGS.

For example, as shown in FIG. 2, the analog switch 70 includes an inverter 301 connected to the control terminal 2.
One electrode is connected to the first and second input terminals, the other electrode is connected to the output terminal, and the gate electrodes are constituted by NMOSs 302 and 303 which receive the control signal or its inverted signal. Further, as shown in FIG. 3, the inverter 301 connected to the control terminal 2 and one of the electrodes are the first and second electrodes.
P is connected to the input terminal of P, the other electrode is connected to the output terminal, and the gate electrode receives the control signal or its inverted signal.
Alternatively, as shown in FIG. 4, one electrode is connected to the first and second input terminals, the other electrode is connected to the output terminal, and a control signal is applied to the gate electrode. It may be configured by the receiving NMOS 306 and PMOS 307.

The operation of the operational amplifier configured as described above will be described below.

The operational amplifier according to the first embodiment comprises a bias circuit 10 and a class A CMOS amplifier 20. A constant current source MOS 25, which determines the current values of the differential stage and the output stage of the class A CMOS amplifier 20, 27 (constant current transistor) is optimally controlled by the bias voltage (voltage of the first output terminal 13) from the bias circuit 10.

First, the operation of the bias circuit 10 will be described. The reference voltage input terminal 1 is applied with a stable voltage whose voltage value is based on the negative power supply voltage and is not affected by the power supply voltage, temperature fluctuations, and manufacturing variations. This reference voltage is input to the non-inverting input terminal of the differential amplifier 40 (that is, the gate electrode of the input MOS 41).

The output terminal of the differential amplifier 40 is the node N3.
The source-electrode grounded amplification stage 50, which is connected to the input terminal of the differential amplifier 40, receives the output of the differential amplifier 40 as an input, inverts and amplifies the voltage change of the node N3, and outputs it to the node N4.

At this time, the voltage of the node N5 is the same as that of the node N4.
Is divided by the resistors 52 and 53 to obtain the voltage difference between the negative voltage and the negative power supply V-voltage. On the other hand, the analog switch 70 is the first
Of the control terminal 2 is connected to the input terminal 71 of the node N4 and the second input terminal 72 of the node N5, and the output terminal 73 receives the voltage of the node N4 or the node N5 depending on the logic state (1 or 0) of the control terminal 2. Output. The output terminal 73 of the analog switch 70 is connected to the node N2,
Since 2 is connected to the inverting input terminal of the differential amplifier 40 (that is, the gate electrode of the input MOS 42), the voltage of the node N2 is input to the reference voltage input terminal 1 by the operation of this differential amplifier 40. Is equal to the reference input voltage. That is, the differential amplifier 40 outputs an error to the output terminal so that the reference input voltage input to the reference voltage input terminal 1 and the output signal of the source electrode grounding amplification stage 50 input to the inverting input terminal have the same voltage level. A voltage is generated and output to the source-electrode grounded amplification stage 50, and the
Since the amplified output of is fed back to the inverting input terminal of the differential amplifier 40, the voltage of the node N2 becomes equal to the reference input voltage input to the reference voltage input terminal 1.

Now, the analog switch 70 is connected to the node N4.
If connected to the side, the voltage value of the node N4 becomes equal to the reference voltage value input to the reference voltage input terminal 1, and the current value flowing in the PMOS 51 is the differential voltage between the node N4 and the negative power supply V- It is a value divided by the series resistance value of 52, 53. If the analog switch 70 is connected to the node N5 side, the voltage value of the node N5 becomes equal to the reference voltage value input to the reference voltage input terminal 1 due to the similar operation of the differential amplifier 40. Has a PMOS
The current value flowing through 51 is a value obtained by dividing the differential voltage between the node N5 and the negative power source V- by the resistance value of the resistor 53.

The current / voltage conversion circuit 60 receives the voltage of the node N3 as an input, and supplies the first output terminal 13 thereof with a class A CMO.
It outputs the bias voltage used in the S amplifier 20, and P
Since a transistor having the same conductance as the PMOS 51 is used for the MOS 61, the current flowing through the PMOS 61 has the same value as the current flowing through the PMOS 51.
That is, PMOS51, PMOS61, NMOS62
The value of the current flowing through the resistors 52 and 53 and the reference voltage input terminal 1
It is determined by the reference voltage value input to, and does not depend on the power supply voltage or the characteristic variation (manufacturing variation) of other active elements.

On the other hand, the class A CMOS amplifier 20 outputs the voltage of the first output terminal 13 which is the output of the bias circuit 10,
It is used as a gate electrode voltage of the constant current sources ΝMOS 25 and 27. Since the constant current sources NMOS 25 and 27 have the same conductance or proportional conductance as the NMOS 62 of the current / voltage conversion circuit 60, a class A CMOS amplifier is used. The current values of the 20 differential amplification stages and the output stage are fixed values. For example, a constant current source NMOS
When 25 and 27 are configured to have the same conductance as the NMOS 62 of the current / voltage conversion circuit 60,
The NMOS 62 serves as a mirror for the constant current sources NMOS 25 and 27, and the NMOS 62 and the constant current sources NMOS 25 and 27.
The currents flowing through all are the same.

After all, the value of the consumption current of the class A CMOS amplifier 20 is determined by the reference voltage value input to the reference voltage input terminal 1 and the resistors 52 and 53, and the power supply voltage and the characteristic variation of other active elements (manufacturing). Variation).

Further, in order to change the consumption current required for the class A CMOS amplifier 20, the node N4 or the node N input to the differential amplifier 40 by the analog switch 70 is used.
This can be easily handled by selecting 5 according to a logical value and outputting it to the node N2.

Here, as an example when the consumption current required for the class A CMOS amplifier 20 is changed, for example, A
When the frequency band of a signal handled by the class CMOS amplifier 20 is high, a large current consumption is required. Further, as the signal to be handled changes from an analog signal to a pulse signal, a large current consumption is required. Further, the bias circuit 10
On the other hand, in the case where the class A CMOS amplifier 20 is connected in a plurality of blocks, the current may be changed for each block, or the same current may flow between blocks having the same circuit configuration.

The resistor 5 of the source electrode grounding amplification stage 50
Of course, the number of 2, 53 and the number of input terminals of the analog switch 70 connected between the resistors 52, 53 and the inverting input terminal 73 of the differential amplifier 40 are not limited to those in the above embodiment. . For example, the resistance value is 1 as the load resistance.
Connect 20 kΩ resistors and their connection terminals to 15 kΩ
The output voltage appearing in the resistor may be used as a central value to be switched by an analog switch, and fine adjustment can be performed after the circuit configuration. Further, without using an analog switch, it is also possible to preliminarily form a wiring that connects each resistor to the inverting input terminal 73 of the differential amplifier 40 and leave only the wiring necessary at the final stage of the manufacturing process. Furthermore, the resistance of the source electrode grounded amplification stage 50 may be external.

As described above, the bias circuit 10 of the operational amplifier according to the first embodiment has the load resistors 52, 5
3, the source electrode grounded amplification stage 50 and the source electrode grounded amplification stage 50 and the current / voltage are generated so that the input reference voltage and the output signal of the source electrode grounded amplification stage 50 have the same voltage level. A differential amplifier 40 for outputting to the conversion stage 60, the amplified output of the source electrode grounded amplification stage 50 is fed back to the inverting input terminal of the differential amplifier 40, and the inverting input terminal 73 and the source electrode of the differential amplifier 40. An analog switch 70 for switching the connection state is connected between the output terminals of the ground amplification stage 50, the output of the differential amplifier 40 is converted into a voltage by the current / voltage conversion stage 60, and the class A CMOS amplifier 2 is connected.
Since it is configured to output as a bias voltage to the constant current sources ΝMOS 25 and 27 of 0, the current value flowing in the source electrode grounding amplification stage 50 is input to the reference voltage input terminal 1 and the resistors 52 and 53. The effect is that the consumption current of the class A CMOS amplifier 20 does not depend on the power supply voltage and manufacturing variations.

Therefore, unlike the conventional example, it is not necessary to form MOS transistors having different thresholds on the same substrate, so that the manufacturing process can be simplified, there is no manufacturing variation, and the consumption current against power supply voltage fluctuations and temperature fluctuations is reduced. It is possible to realize an operational amplifier that has a constant value and can perform stable operation.

Further, the load resistance of the source electrode grounded amplification stage 50 is divided, and the analog switch 70 is provided in the feedback circuit to the differential amplifier 40 so that which of the divided load resistances 52 and 53 is used can be selected. Since it is set to A grade C
There is an advantage that the consumption current value of the MOS amplifier 20 can be easily changed.

FIG. 5 is a circuit diagram showing the configuration of an operational amplifier according to the second embodiment of the present invention. In Figure 1, Class A CM
Although the operational amplifier in which the constant current source of the OS amplifier is composed of NMOS has been described, the same can be applied to the operational amplifier in which the constant current source of the class A CMOS amplifier is composed of PMOS. In the description of the operational amplifier according to the present embodiment, the same components as those of the operational amplifier shown in FIG. 1 will be assigned the same reference numerals and overlapping description will be omitted.

In FIG. 5, a class A CMOS amplifier 80
Are input PMOS 81, 82, load element NMO
S83, 84, the constant current source PMOS85 constitutes a differential amplifier stage, the ΝMOS86 and the PMOS87 constitute an output stage, the NMOS88, the PMOS89 and the capacitor C2 constitute a phase compensation circuit, and the differential input terminals 3, 4 , Known class A CMOS having output terminal 5 and bias input terminal 13
It is an amplifier.

In the class A CMOS amplifier 80, since the constant current source is composed of the PMOS 85 and 87, voltage conversion by the current / voltage conversion circuit 60 is not necessary, and the output of the differential amplifier 40 of the bias circuit 10 is Direct bias input terminal 14 to constant current source PMOS8 of class A CMOS amplifier 80
It is output to 5,87. Therefore, when the constant current source of the operational amplifier of the operational amplifier is configured by the PMOS as in the present embodiment, the current / voltage conversion circuit 60 of the bias circuit 10 becomes unnecessary.

Also in the second embodiment, the conductances of the PMOS 51 of the source electrode grounding amplification stage 50 of the bias circuit 10 and the constant current source PMOSs 85 and 87 of the class A CMOS amplifier 80 are set to be the same or proportional. With the configuration, the value of the consumption current of the class A CMOS amplifier 80 is set to the reference voltage value input to the reference voltage input terminal 1 and the resistance 5
It can be determined by 2, 53 and is therefore a Class A CM
The consumption current of the OS amplifier 80 does not depend on the power supply voltage and the characteristic variation (manufacturing variation) of other active elements, and the same effect as that of the first embodiment can be obtained. Similarly, as for the bias circuit 10, it is obvious that a bias circuit in which PMOS and NMOS are interchanged can be realized.

The operational amplifier according to each of the above embodiments can be applied to an operational amplifier used for addition and subtraction of analog signals, but the current values of the differential stage and the output stage are determined by the bias voltage. It goes without saying that any operational amplifier having a current transistor may be used in any integrated circuit device or may be applied to an operational amplifier incorporated in an integrated circuit device for use. For example, it is suitable for application to a switched capacitor integrated circuit, an analog signal processing circuit, and the like.

Further, in the operational amplifier according to each of the above-mentioned embodiments, it is formed on an integrated circuit by CMOS or the like.
Of course, it is not limited to MOS.

Further, the operational amplifier according to each of the above embodiments may have any configuration as long as it has a bias circuit for generating a bias voltage with a reference voltage source as an input, and the number of MOSFETs, resistors, capacitors, etc. The connection state and the like are not limited to the above embodiments.

[0048]

The operational amplifier according to the present invention is configured to have a bias circuit for generating a bias voltage using a reference voltage source as an input. For example, the bias circuit has an amplifying means having a load resistance and the input reference voltage. And the differential amplifying means for generating a voltage so that the voltage level of the output signal of the amplifying means becomes the same and outputting the voltage to the amplifying means, the manufacturing process can be simplified. In addition, there is no manufacturing variation, and the current consumption is constant with respect to power supply voltage fluctuations and temperature fluctuations, and stable operation can be performed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an operational amplifier according to a first embodiment to which the present invention is applied.

FIG. 2 is a circuit diagram showing a configuration of an analog switch of the operational amplifier.

FIG. 3 is a circuit diagram showing a configuration of an analog switch of the operational amplifier.

FIG. 4 is a circuit diagram showing a configuration of an analog switch of the operational amplifier.

FIG. 5 is a circuit diagram showing a configuration of an operational amplifier according to a second embodiment of the present invention.

[Explanation of symbols]

1 reference voltage input terminal, 2 control terminal, 13 1st output terminal, 14 2nd output terminal, 10 bias circuit,
20, 80 A class CMOS amplifier, 40 Differential amplifier (differential amplification means), 50 Source electrode grounded amplification stage (amplification means, source electrode grounded amplifier), 60 Current / voltage conversion stage (current-voltage conversion circuit), 70 Analog switch,
25,27 Constant current source ΝMOS (constant current transistor), 52,53 Load resistance

Claims (7)

[Claims] 1. An operational amplifier having a constant current transistor in which current values of a differential stage and an output stage are determined by a bias voltage, and a bias circuit which generates the bias voltage with a reference voltage source as an input. Characteristic operational amplifier. 2. The bias circuit generates a voltage so that the input reference voltage and the voltage level of the output signal of the amplifying means are the same as those of the amplifying means having a load resistance, and outputs the voltage to the amplifying means. A differential amplifying means is provided.
An operational amplifier as described. 3. The bias circuit, wherein a differential amplifier having a non-inverting input terminal connected to a reference voltage source, and an output terminal connected to an inverting input terminal of the differential amplifier,
A source electrode grounded amplifier having a source electrode grounded, wherein the differential amplifier outputs a differential amplification output to the gate electrode of the source electrode grounded amplifier and outputs it as a bias voltage to the constant current transistor. 2. The operational amplifier according to claim 1, wherein the grounded source electrode amplifier feeds back the amplified output to the inverting input terminal of the differential amplifier. 4. The operational amplifier according to claim 3, wherein the source electrode grounded amplifier has a source electrode grounded via a load resistor. 5. The bias circuit further comprises a current-voltage conversion circuit for converting the output signal of the differential amplifier into a voltage, and the output signal of the current-voltage conversion circuit is output as a bias voltage. The operational amplifier according to claim 3, which is characterized in that. 6. An analog switch for switching a connection state is provided between the inverting input terminal of the differential amplifier and the output terminal of the source electrode grounding type amplifier. The operational amplifier according to claim 1. 7. The load resistance is provided in plural, and the voltage appearing in the plurality of load resistances can be outputted as an output voltage of the source electrode grounding type amplifier. The operational amplifier according to any one of 1.