KR20140098401A - Thin film transistor substrate having color filter and method of fabricating the same - Google Patents

Abstract

The present invention provides a thin film transistor substrate having a color filter, which simplifies manufacturing processes, and a manufacturing method thereof. The thin film transistor substrate having a color filter according to the present invention is characterized by comprising: gate lines and data lines which are arranged to cross one another to provide a pixel area on the substrate; a thin film transistor connected to the gate lines and data lines; a color filter which is formed in every pixel region and provides a light blocking hole in an area overlapped with the thin film transistor; a pixel electrode which is directly connected with a drain electrode of the thin film transistor and formed on the color filter; a protective film formed to cover the pixel electrode and the thin film transistor; a black matrix formed on the protective film inside the light blocking hole; a planarization layer which planarizes a step difference between the black matrix and the color filter; a common electrode which is formed on the planarization layer and forms a fringe electric field with the pixel electrode; and a column spacer which is formed to be overlapped with the black matrix on the planarization layer.

Description

TECHNICAL FIELD [0001] The present invention relates to a thin film transistor substrate having a color filter and a method of manufacturing the thin film transistor substrate.

The present invention relates to a thin film transistor substrate having a color filter capable of simplifying a process and a manufacturing method thereof.

2. Description of the Related Art In general, a liquid crystal display (LCD) is one of flat panel display devices for displaying an image using a liquid crystal, and is thin and light compared to other display devices, has advantages of low driving voltage and low power consumption, It is widely used throughout.

Such a liquid crystal display device includes a liquid crystal display panel having a thin film transistor substrate and a color filter substrate facing each other with a liquid crystal therebetween.

The color filter substrate comprises a black matrix formed on the upper substrate for preventing light leakage, a color filter for color implementation, and an upper alignment film formed thereon for liquid crystal alignment.

The thin film transistor substrate includes a gate line and data lines formed on a lower substrate, a thin film transistor formed as a switching element at each intersection of gate lines and data lines, a pixel electrode formed in a unit of a liquid crystal cell and connected to the thin film transistor, A common electrode which forms an electric field with the electrodes, and an alignment film coated thereon. Here, the thin film transistor supplies the pixel electrode with a video signal supplied to the data line in response to the scan signal supplied to the gate line.

If misalignment occurs in the process of attaching the color filter substrate and the thin film transistor substrate in the related art, the transmittance is reduced and display quality is uneven.

In addition, since each of the thin film transistor substrate and the color filter substrate requires a plurality of mask processes, the manufacturing process is complicated, which is an important cause of an increase in the manufacturing cost of the liquid crystal panel. Accordingly, a technique capable of reducing the number of mask processes required in forming a thin film transistor substrate and a color filter substrate has recently been required.

In order to solve the above problems, the present invention provides a thin film transistor substrate having a color filter capable of simplifying a process and a manufacturing method thereof.

According to an aspect of the present invention, there is provided a thin film transistor substrate having a color filter, including: a gate line and a data line crossing each other to form a pixel region on a substrate; A thin film transistor connected to the gate line and the data line; A color filter formed in each of the pixel regions and providing a light shielding hole in a region overlapping the thin film transistor; A pixel electrode directly connected to a drain electrode of the thin film transistor and formed on the color filter; A protective film covering the pixel electrode and the thin film transistor; A black matrix formed on the protective film inside the light shielding hole; A planarization layer for planarizing a step between the black matrix and the color filter; A common electrode formed on the planarization layer and forming a fringe electric field with the pixel electrode; And a column spacer formed on the planarization layer so as to overlap with the black matrix.

And the color filter is superimposed on the data line with the color filter of the adjacent pixel region which realizes a different color.

And a transparent electrode connected to the source electrode and formed in the same layer as the pixel electrode, wherein the transparent electrode and the pixel electrode are opposed to each other with the channel portion of the thin film transistor interposed therebetween.

According to an aspect of the present invention, there is provided a method of manufacturing a thin film transistor substrate, including: forming a thin film transistor connected to a gate line and a data line intersecting each other to form a pixel region on a substrate; Forming a color filter for providing a light shielding hole in a region overlapping the thin film transistor for each pixel region; Forming a pixel electrode on the color filter directly connected to a drain electrode of the thin film transistor; Forming a protective film to cover the pixel electrode and the thin film transistor; Forming a black matrix on the protective film inside the light-shielding hole; Forming a planarization layer on the substrate on which the black matrix is formed; Forming a common electrode on the planarization layer to form a fringe electric field with the pixel electrode; And forming a column spacer on the substrate having the common electrode formed thereon.

The forming of the planarization layer may include forming the planarization layer on the entire surface of the substrate on which the black matrix is formed to a first thickness; And planarizing the planarization layer to form the planarization layer to a second thickness that is thinner than the first thickness.

Wherein forming the thin film transistor comprises: forming a gate electrode on the substrate, the gate electrode being connected to the gate line; Forming a gate insulating film covering the gate electrode; Forming a semiconductor pattern including an active layer and an ohmic contact layer on the gate insulating layer, and forming source and drain electrodes integrated on the semiconductor pattern, wherein the step of forming the pixel electrode comprises: Forming a transparent conductive layer over the formed substrate; Patterning the transparent conductive layer and the source and drain electrodes simultaneously to form a transparent electrode connected to the source electrode and a pixel electrode connected to the drain electrode and separating the source and drain electrodes; And exposing the active layer by etching the ohmic contact layer using the transparent electrode, the pixel electrode, the source and drain electrodes as a mask.

The protective film is formed by depositing SiNx or SiOx at a temperature of 150 to 230 degrees.

The present invention can form a thin film transistor substrate having a color filter using a total of ten mask processes, thereby simplifying the process and reducing the cost. In addition, the present invention can realize a high resolution by using a color filter in place of the conventional organic insulating film. Further, since the upper substrate can be formed only by the thin glass itself, the cost and the aperture ratio are improved, and the viewing angle of the stereoscopic image display device is enlarged. Further, since the drain electrode and the pixel electrode are directly connected without a contact hole, the present invention can secure an aperture ratio equivalent to the area occupied by the conventional contact hole. In addition, since the color filter is formed on the lower substrate according to the present invention, the adhesion margin and the maintenance between the lower substrate and the upper substrate are facilitated, thereby preventing display quality unevenness.

1 is a plan view showing a thin film transistor substrate having a color filter according to the present invention.
FIG. 2 is a cross-sectional view showing a thin film transistor substrate taken along line I-I '', line II-II 'and line III-III' in FIG.
3 is a cross-sectional view for explaining color filters on the data lines shown in FIG. 2 in detail.
4 is a cross-sectional view illustrating a liquid crystal display panel including the thin film transistor substrate having the color filter shown in FIG.
5A to 5J are cross-sectional views illustrating a method of manufacturing a thin film transistor substrate having the color filter shown in FIG.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings and embodiments.

FIG. 1 is a plan view of a thin film transistor substrate having a color filter according to the present invention. FIG. 2 is a cross-sectional view taken along line I-I ', line II- Sectional view taken along line III 'of FIG.

The thin film transistor substrate having the color filter shown in FIGS. 1 and 2 includes a gate line 102 and a data line 104 crossing the gate insulating layer 112 on the lower substrate 101 to define a pixel region, A thin film transistor connected to the intersection of the gate line 102 and the data line 104, a pixel electrode 122 connected to the thin film transistor, a common electrode 126 formed to form the pixel electrode 122 and the fringe field in the pixel region, A common line 138 connected to the common electrode 126, a color filter 130 formed in the pixel region, a black matrix 132 overlapping the thin film transistor, and a black matrix 132 formed on the black matrix 132 And a column spacer 134 for providing a cell gap.

The gate line 102 supplies a scan signal from a gate driver (not shown) through a gate pad 150 and the data line 104 supplies a video signal from a data driver (not shown) do. The gate line 102 and the data line 104 intersect each other with a gate insulating film 112 therebetween to define respective pixel regions.

The gate pad 150 is composed of a gate pad lower electrode 152 extending from the gate line 102 and a gate pad upper electrode 154 connected above the gate pad lower electrode 152. Here, the gate pad upper electrode 154 is connected to the gate pad lower electrode 152 through a gate contact hole 156 penetrating the protection film 118.

The data pad 160 includes a data pad lower electrode 162 extending from the data line 104, a data pad intermediate electrode 168 formed on the data pad lower electrode 162, a data pad intermediate electrode 168, And a connected data pad upper electrode 164. The data pad upper electrode 164 is formed in the data contact hole 166 passing through the passivation layer 118 and is connected to the data pad intermediate electrode 162. The data pad intermediate electrode 168 is formed in the same pattern as the data pad lower electrode 162 on the data pad lower electrode 162. A gate insulating pattern 112, an active layer 114, and an ohmic contact layer 116 are formed between the data pad lower electrode 162 and the lower substrate 101.

The thin film transistor causes the video signal on the data line 104 to be charged and held in the pixel electrode 122 in response to the scan signal of the gate line 102. For this, the thin film transistor has a gate electrode 106 connected to the gate line 102, a source electrode 108 connected to the data line 104, and a source electrode 108 connected to the pixel electrode 122, An active layer 114 and a source electrode 108 overlapping the gate line 102 with the gate insulating film 112 sandwiched therebetween and forming a channel between the source electrode 108 and the drain electrode 110, And an ohmic contact layer 116 formed on the active layer 114 except for the channel region for ohmic contact with the drain electrode 110. The semiconductor pattern including the active layer 114 and the ohmic contact layer 116 is formed to overlap the data line 104 and the data pad lower electrode 162. The source electrode 108 is connected to the transparent electrode 140 formed on the same layer as the pixel electrode 122 and the transparent electrode 140 is disposed to face the pixel electrode 122 with the channel portion interposed therebetween. .

The pixel electrode 122 is formed in a plate shape on the substrate 101 and is formed as a transparent conductive layer on the color filter 130. The pixel electrode 122 is connected to the drain electrode 110 exposed through the light blocking hole 120 located between the color filters 130. The pixel electrode 122 overlaps the common electrode 124 with a protective film 118 therebetween to form a fringe field in each pixel region. That is, when a video signal is supplied through the thin film transistor, the pixel electrode 122 forms a fringe field with the common electrode 124 to which the common voltage is supplied, so that the liquid crystal molecules arranged in the horizontal direction between the thin film transistor substrate and the color filter substrate Are rotated by dielectric anisotropy. The transmittance of light passing through the pixel region is changed according to the degree of rotation of the liquid crystal molecules, thereby realizing the gradation.

The distance between the pixel electrode 122 and the common electrode 124 is minimized because the pixel electrode 122 overlaps the common electrode 124 with one layer of the protective film 118 interposed therebetween so that the driving voltage can be reduced.

The common electrode 124 is formed in each pixel region and is connected to the common line 138. The slit 126 of the common electrode 124 is symmetric with respect to the center line of each pixel region parallel to the gate line 102, and is formed in an inclined oblique direction. Accordingly, the liquid crystal molecules are arranged symmetrically with respect to the slit 126 by the fringing electric field formed between the common electrode 124 and the pixel electrode 122, so that the multi-domain can be formed and the viewing angle can be improved .

The common line 138 supplies a reference voltage for driving the liquid crystal, that is, a common voltage to each common electrode 128. The common line 138 is formed in parallel with the gate line 102 and the data line 104. The common line 138 is formed on the same layer as the common electrode 124 and is connected to the common electrode 124.

The common line 138 overlaps the pixel electrode 122 and the protective film 118 to form a first storage capacitor and is formed between the data line 104 and the gate insulating film 112 and the protective film 118 And are overlapped to form a second storage capacitor.

The common line 138 also prevents the video signal supplied to the data line 104 from being coupled to the common electrode 124 through the parasitic capacitance formed between the data line 104 and the pixel electrode 122. This minimizes the distortion of the video signal supplied to the pixel electrode 122 in accordance with the video signal of the data line 104, thereby preventing crosstalk. The parasitic capacitance between the data line 104 and the pixel electrode 122 can be reduced because a relatively thick color filter 130 is formed between the data line 104 and the pixel electrode 122.

The R, G, and B color filters 130 are formed in a dot shape in each pixel region. The red (R) color filter 130R is formed on the gate insulating film 112 of the red (R) sub pixel region to emit red (R) The blue color filter 130B is formed on the gate insulating film 112 of the blue (B) sub pixel region to emit blue (B) light, do. This color filter 130 is formed to overlap with the color filter 130 of the adjacent color on the data line 104 as shown in Figs. Specifically, the color filters 130 shown in FIG. 2 are superimposed on the data lines 104. FIG. The color filters 130 shown in FIG. 3 are also overlapped on the data line 104 and also in the region between the data line 104 and the pixel electrode 122.

In this case, the level difference (about 0.3 mu m) between the color filter (R, 130) and the color filter (G, 130) in the region corresponding to the data line 104 is smaller than the level difference between the black matrix (About 1 mu m). Accordingly, the rubbing failure and the liquid crystal alignment irregularity in the region corresponding to the data line 104 can be prevented, and the light leakage can be prevented.

The black matrix 132 is formed in the light shielding hole 120 so as to overlap the thin film transistor with the protective film 118 interposed therebetween to prevent the channel region of the thin film transistor from being exposed to light. On the other hand, the protective layer 118 located between the black matrix 132 and the thin film transistor prevents the leakage current of the thin film transistor, which is generated when the thin film transistor and the black matrix 132 are in contact with each other.

The spacers 134 are formed between the black matrix 132 and the upper substrate 111 on the lower substrate 101 as shown in FIG. 4 to provide a space for forming liquid crystals. On the other hand, an antistatic film 136 made of a transparent conductive film is formed on the front surface of the upper substrate 111, or the glass itself is formed without any thin film. On the upper substrate 111, a color filter, a black matrix, or the like is not formed. Accordingly, the difference in thermal expansion coefficient between the color filter and the black matrix and the upper substrate 111 need not be considered, so that the upper substrate 111 can be formed of thin or inexpensive glass.

5A to 5J are cross-sectional views illustrating a method of manufacturing a thin film transistor substrate having the color filter shown in FIG. A method of manufacturing a thin film transistor substrate having a color filter according to the present invention will be described with reference to FIG.

Referring to FIG. 5A, a first conductive pattern including a gate line 102, a gate electrode 106, and a gate pad lower electrode 152 is formed on a lower substrate 101 by a first mask process. Specifically, a gate metal layer is deposited on the lower substrate 101 through a deposition method such as a sputtering method. As the gate metal layer, a metal material such as Mo, Ti, Cu, AlNd, Al, Cr, or an alloy thereof may be used as a single layer, or a multi-layer structure using them may be used. Then, the gate line 102, the gate electrode 106, and the gate pad lower electrode 152 are patterned by using the photoresist pattern formed through the exposure process and the development process using the first photomask as a mask, The first conductive pattern is formed.

5B, a gate insulating layer 112 is formed on a lower substrate 101 on which a first conductive pattern is formed, and an active layer 114 and an ohmic contact layer And a second conductive pattern including a data line 104, a source electrode 108, a drain electrode 110, and a data pad lower electrode 162 are formed.

Specifically, an amorphous silicon layer doped with a gate insulating layer 112, an amorphous silicon layer, and impurities (n + or p +) is sequentially formed on a lower substrate 101 on which a first conductive pattern is formed by a deposition method such as PECVD, And a source / drain metal layer is formed thereon by a deposition method such as sputtering. As the gate insulating film 112, an inorganic insulating material such as SiOx, SiNx, or the like is used. As the source / drain metal layer, a metal material such as Mo, Ti, Cu, AlNd, Al, Cr or an alloy thereof may be used as a single layer, or may be used as a multi-layer structure by using them. Then, the amorphous silicon layer, the amorphous silicon layer doped with the impurity (n + or p +) and the source / drain metal layer are patterned by using the photoresist pattern formed through the exposure process and the development process using the second photomask as a mask, The active layer 114 and the ohmic contact layer 116 are formed on the insulating film 112 with the semiconductor pattern and the data line 104 and the integrated source and drain electrodes 108 and 110 and the data pad lower electrode 162 A second conductive pattern is formed. Here, the second conductive pattern is formed on the semiconductor pattern in the same pattern as the semiconductor pattern.

Referring to FIG. 5C, a red (R) color filter 130 is formed on the gate insulating layer 112 having the second conductive pattern formed by the third mask process.

Specifically, a red photosensitive resin is applied on the entire surface of the lower substrate 101 on which the second conductive pattern is formed. Then, a red (R) color filter 130 is formed by patterning a red photosensitive resin through an exposure process and a development process using a third photomask.

Referring to FIG. 5D, a green (G) color filter 130 is formed on the gate insulating film 112 on which the red (R) color filter 130 is formed by the fourth mask process.

Specifically, a green photosensitive resin is applied onto the lower substrate 101 on which the red (R) color filter 130 is formed. Then, a green (G) color filter 130 is formed by patterning a green photosensitive resin through an exposure process and a developing process using a fourth photomask.

Referring to FIG. 5E, a blue (B) color filter 130 is formed on the gate insulating film 112 on which a green (G) color filter 130 is formed by a fifth mask process.

Specifically, a blue photosensitive resin is coated on the lower substrate 101 on which the green (G) color filter 130 is formed. Then, a blue (B) color filter 130 is formed by patterning a blue photosensitive resin through an exposure process and a developing process using a fifth photomask.

On the other hand, the red (R), green (G), and blue (B) color filters 130 are formed on the side and top surfaces of the drain electrode 110, the top surface of the source electrode 108, And the light shielding hole 120 exposing the region between the drain electrodes 108 and 110 is formed.

Referring to FIG. 5F, in the sixth mask process, a third conductive pattern including the pixel electrode 122, the transparent electrode 140, and the data pad intermediate electrode 168 is formed on the color filter 130.

Specifically, a transparent conductive layer is formed on the lower substrate 101 on which the color filter 130 is formed by a deposition method such as sputtering. As the transparent conductive layer, ITO, TO, IZO, ITZO, or the like is used. Next, the transparent conductive layer and the source / drain metal layer between the integrated source and drain electrodes are simultaneously etched using the photoresist pattern formed through the exposure and development processes using the sixth photomask as a mask to form the pixel electrode 122 and the transparent The electrode 140 is formed and the source and drain electrodes 108 and 110 are separated. The pixel electrode 122 is directly connected to the drain electrode 110 without a contact hole and the transparent electrode 140 is connected to the source electrode 108 exposed through the light shielding hole 120. The data pad intermediate electrode 168 is formed on the data pad lower electrode 162 in the same pattern as the data pad lower electrode 162 and directly connected to the data pad lower electrode 162.

Then, the ohmic contact layer 116 exposed between the source and drain electrodes 108 and 110 is removed through a dry etching process using the pixel electrode 122, the transparent electrode 140, and the source and drain electrodes 108 and 110 as a mask The active layer 114 of the channel region is exposed.

Referring to FIG. 5G, a passivation layer 118 is formed on a lower substrate 101 on which a third conductive pattern is formed, and then a black matrix 132 is formed on the passivation layer 118 by a seventh mask process.

Specifically, a protective film 118 is formed on the entire surface of the lower substrate 101 on which the third conductive pattern is formed through a deposition method such as PECVD. As the protective film 118, an inorganic insulating material such as SiNx or SiOx is used. Here, the deposition process of the protective film 118 proceeds at a low temperature in order to prevent damage such as fume of the color filter due to the heat generated during the deposition process of the protective film 118. For example, the protective film 118 is deposited on the lower substrate 101 at a low temperature of 150 to 230 degrees. Then, opaque resin is applied on the protective film 118 entirely. Then, the opaque resin is patterned by a photolithography process using a seventh photomask to form a black matrix 132. [

Referring to FIG. 5H, a planarization layer 118 having a gate contact hole 154 and a data contact hole 164 is formed on a lower substrate 101 on which a black matrix 132 is formed by an eighth mask process.

Specifically, the planarizing layer 128 is formed on the entire surface of the lower substrate 101 on which the black matrix 132 is formed by applying an organic insulating material such as PAC or the like entirely. At this time, the planarization layer 128 is thickly applied on the lower substrate 101 to a first thickness of about 1 to 2 탆 in order to prevent the occurrence of pinholes and the like due to the nature of the material. Then, the planarization layer 128 is completely dry etched without a mask, so that the planarization layer 128 has a second thickness less than about 5000 Å which is less than the first thickness.

In addition, if the planarization layer 128 is formed of a soluble material, the planarization layer 128 may be formed to a thickness of about 5000 ANGSTROM or less only by a coating and curing process of a soluble material. Specifically, a coating solution having a low viscosity is prepared by mixing a solid component containing an acrylic-based material and a solvent. When the coating solution is thickly applied on the front surface of the lower substrate 101 on which the black matrix 132 is formed to a first thickness and cured, the solvent component is evaporated so that the flattening layer 128 has a thickness of about 5000 Å or less As shown in FIG.

Then, the planarization layer 128, the protective film 118 and the gate insulating film 112 are patterned by the photolithography process and the etching process using the eighth photomask to form gate contact holes 154 and data contact holes 164 do. Here, the gate contact hole 154 exposes the gate pad lower electrode 152 through the gate insulating film 112, the protective film 118, and the planarization layer 128. The data contact hole 164 exposes the data pad intermediate electrode 168 through the passivation layer 118 and the planarization layer 128.

5i, in a ninth mask process, a common electrode 124 having a slit 126 on the planarization layer 128, a common line 138, a gate pad upper electrode 156 and a data pad upper electrode 166 Is formed on the second conductive pattern.

Specifically, a transparent conductive layer is formed on the planarization layer 128 by a deposition method such as sputtering. As the transparent conductive layer, ITO, TO, IZO, ITZO or the like as the third conductive pattern is used. The common electrode 124, the common line 138, the gate pad upper electrode 156, and the data pad upper electrode 166 are formed by patterning the transparent conductive layer by a photolithography process and an etching process using a ninth photomask. A fourth conductive pattern is formed. The gate pad upper electrode 156 is connected to the gate pad lower electrode 152 exposed through the gate contact hole 154 and the data pad upper electrode 166 is connected to the data pad middle exposed through the data contact hole 164, And is connected to the electrode 168.

Referring to FIG. 5J, a column spacer 134 is formed on a lower substrate 101 on which a fourth conductive pattern is formed by a tenth mask process.

Specifically, a transparent resin or an opaque resin is entirely coated on the lower substrate 101 on which the fourth conductive pattern is formed. Then, a transparent resin or an opaque resin is patterned by a photolithography process and an etching process using a tenth photomask, thereby forming a column spacer 134.

As described above, the thin film transistor substrate having the color filter according to the present invention can be completed by using 10 photomasks in total.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Will be clear to those who have knowledge of.

102: gate line 104: data line
106: gate electrode 108: source electrode
110: drain electrode 112: gate insulating film
114: active layer 116: ohmic contact layer
118: protective film 122: pixel electrode
124: common electrode 126: slit
138: Common line

Claims (10)

A gate line and a data line formed on the substrate so as to intersect with each other to provide a pixel region;
A thin film transistor connected to the gate line and the data line;
A color filter formed in each of the pixel regions and providing a light shielding hole in a region overlapping the thin film transistor;
A pixel electrode directly connected to a drain electrode of the thin film transistor and formed on the color filter;
A protective film covering the pixel electrode and the thin film transistor;
A black matrix formed on the protective film inside the light shielding hole;
A planarization layer for planarizing a step between the black matrix and the color filter;
A common electrode formed on the planarization layer and forming a fringe electric field with the pixel electrode;
And a column spacer formed on the planarization layer so as to overlap with the black matrix. The method according to claim 1,
Wherein the color filter is overlapped on the data line with a color filter of an adjacent pixel region which realizes a different color. The method according to claim 1,
And a transparent electrode connected to the source electrode and formed in the same layer as the pixel electrode,
Wherein the transparent electrode and the pixel electrode are opposed to each other with the channel portion of the thin film transistor interposed therebetween. The method according to claim 1,
Wherein the protective film is formed by depositing SiNx or SiOx at a temperature of 150 to 230 degrees. Forming a thin film transistor connected to a gate line and a data line formed so as to intersect with each other to provide a pixel region on a substrate;
Forming a color filter for providing a light shielding hole in a region overlapping the thin film transistor for each pixel region;
Forming a pixel electrode on the color filter directly connected to a drain electrode of the thin film transistor;
Forming a protective film to cover the pixel electrode and the thin film transistor;
Forming a black matrix on the protective film inside the light-shielding hole;
Forming a planarization layer on the substrate on which the black matrix is formed;
Forming a common electrode on the planarization layer to form a fringe electric field with the pixel electrode;
And forming a column spacer on the substrate having the common electrode formed thereon. 6. The method of claim 5,
The step of forming the planarization layer
Forming the planarization layer to a first thickness on the entire surface of the substrate on which the black matrix is formed;
And etching the planarization layer to form a planarization layer having a second thickness that is smaller than the first thickness. 6. The method of claim 5,
Wherein the color filter is overlapped on the data line with a color filter of an adjacent pixel region which realizes a different color. 6. The method of claim 5,
The step of forming the thin film transistor
Forming a gate electrode connected to the gate line on the substrate;
Forming a gate insulating film covering the gate electrode;
Forming a semiconductor pattern including an active layer and an ohmic contact layer on the gate insulating layer and forming source and drain electrodes integrated on the semiconductor pattern,
The step of forming the pixel electrode
Forming a transparent conductive layer on the entire surface of the substrate on which the color filter is formed;
Patterning the transparent conductive layer and the source and drain electrodes simultaneously to form a transparent electrode connected to the source electrode and a pixel electrode connected to the drain electrode and separating the source and drain electrodes;
And exposing the active layer by etching the ohmic contact layer using the transparent electrode, the pixel electrode, the source and drain electrodes as a mask, and exposing the active layer. 9. The method of claim 8,
Wherein the transparent electrode and the pixel electrode are opposed to each other with the channel of the thin film transistor interposed therebetween. 6. The method of claim 5,
Wherein the protective film is formed by depositing SiNx or SiOx at a temperature of 150 to 230 degrees.

Images