KR20140044998A - Probe array head and probe card comprising the same - Google Patents

Abstract

The present invention relates to a probe array head and a probe card having the probe array head capable of maintaining the excellence of the probe pin arrangement of the probe card for a wafer check and easily performing the probe pin arrangement. The probe card comprises a support board, a plurality of probe array heads, a main circuit board, and an interface pin. The support board comprises a plurality of penetration holes which corresponds to wafer chips of a wafer. The plurality of probe array heads is installed into the penetration holes and comprises a plurality of probe pins which corresponds to the pads of the semiconductor chip of the wafer. The main circuit board in which the support board is installed is electrically connected to the probe array heads. The interface pin is arranged between the probe array head and the main circuit board and electrically connects the probe pin of the probe array head and the main circuit board. Each probe array head comprises the support board, a flexible probe board, and the probe pins. The probe board is positioned on the support board. The probe pins are positioned on the probe board.

Description

Probe array head and a probe card having the same and a method of manufacturing the same {Probe array head and probe card comprising the same}

The present invention relates to a probe card, and more particularly, a probe card and a probe card capable of facilitating probe pin alignment more easily while maintaining superiority of probe pin alignment of a probe card for wafer inspection, and capable of coping with fine pitching. It relates to a manufacturing method.

After a series of wafer fabrication processes are completed and numerous semiconductor chips are formed in the wafer, the wafer is divided into individual semiconductor chips and package assembly is performed. At this time, to inspect whether or not a defect occurs in the state of the semiconductor chips produced before the package assembly process, an electrical die sorting (EDS) process, which is the last process in the wafer state, is required. In this electrical test fixing, a probe card is used as a medium for electrically connecting the semiconductor chip to be inspected and the test equipment.

On the other hand, a number of input and output pads exposed to the outside are formed on the surface of the semiconductor chip, the probe card is provided with a probe pin (probe pin) for inputting and outputting electrical signals by physically contacting these pads. The probe card is then connected to the inspection device. The semiconductor chip receives a predetermined signal from an inspection device through a probe pin in contact with a pad, performs an operation, and then outputs the processing result back to the inspection device through a probe pin. The inspection equipment may examine the electrical characteristics of the semiconductor chip and determine whether the corresponding chip is defective.

Generally, this inspection process is performed by simultaneously contacting a plurality of probe pins to various pads of a semiconductor chip for quick and efficient inspection. However, semiconductor chips are not only miniaturized, but also have a larger number of pads and smaller sizes. Accordingly, the spacing between the pads of the semiconductor chips, that is, the pitch, is gradually decreasing. Therefore, the probe card must also be manufactured by arranging a plurality of probe pins at minute intervals corresponding to the pads of the semiconductor chip. However, as the distance between the probe pins provided in the probe card is reduced, electrical or physical interference between the probe pins occurs, so forming the probe pins without such interference is a very difficult task.

Moreover, it is also very important to precisely align numerous probe pins and arrange them with high flatness in order to inspect a large number of semiconductor chips on the wafer on which the semiconductor chips are placed, but the probe pins must be uniform and uniform. It is very difficult to deploy. In addition, a method of manufacturing a probe card having a simple process and economical manufacturing cost is required for the purpose of reducing production cost and improving yield. In addition, the conventional probe card also requires a solution for poor probe pin contact due to the difference in thermal expansion coefficient with the wafer.

Accordingly, an object of the present invention is to improve the alignment of the probe pins on the probe card and to facilitate the alignment of the probe pins, thereby saving time and labor required for the manufacture of the probe card, and providing a more improved probe card. An array head and a probe card having the same are provided.

It is another object of the present invention to provide a probe array head and a probe card having a probe card that supports the production of a more robust product while reducing the production cost by more easily manufacturing a probe card with a small difference in thermal expansion coefficient with a wafer.

It is still another object of the present invention to provide a probe array head and a probe card having the same which can cope with the fine pitch of the chip pad of the semiconductor chip formed on the wafer.

In order to achieve the above object, the present invention provides a probe card including a support plate, a plurality of probe array heads, a main circuit board and an interface pin. The support plate has a plurality of through holes corresponding to the semiconductor chips of the wafer to be tested. The plurality of probe array heads are inserted into the plurality of through holes, respectively, and include a plurality of probe pins corresponding to pads of the semiconductor chip of the wafer. The main circuit board is fixed to the support plate, the plurality of probe array head is electrically connected. The interface pin is disposed between the probe array head and the main circuit board to electrically connect the probe pin of the probe array head and the main circuit board. In this case, each of the plurality of probe array heads includes a support substrate, a flexible probe substrate bonded on the support substrate, and a plurality of probe pins bonded on a surface of the probe substrate.

In the probe card according to the present invention, the probe substrate includes a circuit pattern formed on both sides and a plurality of via holes connecting the circuit patterns on both sides to each other, and the plurality of probe pins are respectively bonded onto the plurality of via holes. Can be.

In the probe card according to the present invention, the probe substrate may further include a filler filled in the via hole. The filler supports the probe pins that are bonded to the via holes.

In the probe card according to the present invention, the probe substrate includes a circuit pattern formed on both sides and a plurality of via holes connecting the circuit patterns on both sides, and the plurality of probe pins extend from the plurality of via holes. Each can be bonded to a pattern.

In the probe card according to the present invention, a circuit pattern formed on a surface to which the probe pin is bonded may be formed to be connected to the via hole, and a connection pad to which the probe pin is bonded may be formed at an end portion thereof.

In the probe card according to the present invention, a plurality of probe pins may be formed in the probe array head to correspond to chip pads of at least one semiconductor chip.

In the probe card according to the invention, the probe pin comprises a connecting portion, a beam portion and a contact portion. The connection portion is bonded to the surface of the probe substrate in the form of a surface mount. The beam part has one end connected to an upper end of the connection part and extending in a horizontal direction, and a penetrating part is formed in the center part in the horizontal direction, and at least one pin pressure control bar connecting one side of the bottom of the through part and the other side of the ceiling. Have The contact part is connected to the other end of the beam part and extends upward, and has a contact tip contacting a chip pad of a semiconductor chip formed on a wafer.

In the probe card according to the present invention, the support plate may be made of a material having a thermal expansion rate similar to that of a wafer on which semiconductor chips are arranged.

The probe card according to the present invention may further include a connection reinforcing plate disposed between the probe array head or the support plate and the main circuit board to reinforce the probe array head or the support plate to be connected to the main circuit board.

The probe card according to the present invention includes a first fastening member for penetrating one side of the probe array head or one side of the support plate to fix the connection reinforcing plate to the main circuit board, and one side of the probe array head or the support plate. One side and the connection reinforcement plate and the connection reinforcement plate and the main circuit board may further include one of the second fastening members for fixing the connection.

The present invention also includes a support substrate, a flexible probe substrate bonded to the support substrate, the extended portion of the support substrate being bonded to the main circuit board, and a plurality of probe pins bonded to a surface of the probe substrate. A probe array head for a probe card is provided.

According to the present invention, the probe array heads are manufactured by manufacturing the probe array heads in such a range that the position of the probe pin does not deviate from the chip pad of the wafer by thermal expansion of the probe substrate, thereby eliminating the pad position of the probe pin due to the difference in thermal expansion coefficient between the probe card and the wafer. You can prevent it.

In addition, the present invention can significantly improve the probe pin alignment on the probe substrate by performing the process of inserting the probe pin into the probe substrate through the wafer process.

In addition, the present invention can facilitate alignment of the probe pin with respect to the semiconductor chip pad by providing a wafer having a pin hole formed at a position corresponding to the semiconductor chip pad to be inspected.

In addition, the present invention by bonding a batch of probe array heads of a certain module type on a circular support plate of the wafer-like shape and then by dividing a predetermined portion through a cutting process according to the user purpose of various forms with a simple process and economical manufacturing cost Probe cards can be made.

In addition, the present invention not only simplifies the process by inserting the probe array heads onto the support plate, but also makes it possible to better match and maintain the alignment of the probe pins.

In addition, the present invention can easily improve the reliability of the electrical connection between the probe array head and the main circuit board using the interface pin and the through hole of the support plate.

In addition, the present invention can bond the probe pin to the surface of the probe substrate, for example, in the form of a surface mount to a connection hole of a via hole or a wiring pattern, so that the chip pad of the semiconductor chip formed on the wafer can be more effectively pitched. It can respond.

1 is a cross-sectional view showing a predetermined cross section of a probe card according to a first embodiment of the present invention.
2 is a schematic view of the front of a probe card according to a first embodiment of the present invention.
FIG. 3 illustrates the area “A” of FIG. 1 in more detail.
4 to 9 are views for explaining a method of manufacturing a probe array head of a probe card according to a first embodiment of the present invention.
10 to 15 are views for explaining a method of manufacturing a probe array head of a probe card according to a second embodiment of the present invention.
16 and 17 illustrate a probe array head of a probe card according to a third embodiment of the present invention.
18 and 19 illustrate a probe array head of a probe card according to a fourth embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First Embodiment

1 is a cross-sectional view illustrating a probe card according to a first embodiment of the present invention. 2 is a diagram schematically illustrating a front surface of a probe card according to a first embodiment of the present invention. 3 is a view showing in detail the area “A” of the probe card, ie, the probe array head, of the probe card according to the first embodiment of the present invention.

1 to 3, the probe card 100 according to the first embodiment of the present invention includes a support plate 110, a probe array head 130, a main circuit board 140, and an interface pin 150. It is configured by. The probe card 100 further includes an upper reinforcement plate 160 and a connection reinforcement plate 170 for connection between the support plate 110 on which the probe array head 130 is disposed and the main circuit board 140. It may further include a fastening member 190 for coupling through the plates (160, 170).

Probe card 100 according to the first embodiment having such a configuration is composed of a material having a coefficient of thermal expansion similar to the wafer 110, the probe array on a spaced apart position on the support plate 110 By arranging the heads 130, it is possible to minimize the shape change according to the coefficient of thermal expansion. In addition, since the probe array heads 130 are separately manufactured, the probe array heads 130 may be implanted on the support plate 110 to facilitate substrate fabrication, repair, and replacement. Meanwhile, although FIG. 2 illustrates that the probe card 100 is configured in a circular shape, the probe card 100 may be modified in various forms such as a rectangle according to a designer's intention. Hereinafter, each configuration of the probe card 100 will be described in more detail.

The support plate 110 may be formed of a circular plate shaped like a wafer, and may be formed of a material having a thermal expansion similar to that of the wafer, such as a metal alloy including silicon, ceramic, glass, invar, and nobinite. Can be formed. The support plate 110 may be disposed on the main circuit board 140 to provide a physical foundation on which the probe array heads 130 may be disposed. The support plate 110 may be circular in the form of a wafer, but a plurality of long block shapes may be collected to form a wafer-like shape. A plurality of through holes 139 may be formed in the support plate 110 at predetermined intervals at which the probe array heads 130 may be implanted.

In this case, the through holes 139 formed in the support plate 110 may be provided at positions corresponding to the positions of the semiconductor chips provided in the wafer. The probe array heads 130 installed in the through holes 139 are electrically connected to each other via the interface pin 150 formed on the main circuit board 140. As the interface pin 150, a pogo pin or a spring pin may be used. The shape of the through holes 139 may be provided in a shape corresponding to the shape of the probe array heads 130 to be implanted. Referring to FIG. 2, the through holes 139 correspond to not only shapes in which one probe array head 130 is implanted but also block shapes in which a plurality of probe array heads 130 are lined and implanted. It can also be arranged. Meanwhile, the support plate 110 may include a region in which the fastening member 190 is disposed on one side in order to be fixed on the main circuit board 140. That is, a plurality of connectors through which the fastening member 190 penetrates may be provided in a predetermined region of the support plate 110.

The probe array head 130 is implanted into the through holes 139 provided in the support plate 110, respectively. The probe array heads 130 may be manufactured in various forms such as multilayer ceramic (MLC) or rigid printed circuit board (RFPCB). Manufacturing of the probe array head 130 will be described in more detail with reference to the accompanying drawings. First, in the following description, a form manufactured in a multilayer ceramic form will be mainly described. The probe array head 130 includes a probe substrate 180 and a probe pin 180 electrically connected to the probe substrate member through a conductive adhesive 133 as shown, and the probe substrate member is connected to the probe substrate 120. The support layer 131 may be configured to be bonded to the probe substrate 120 through the non-conductive adhesive 135. In particular, the support layer 131 to which the probe pin 180 is inserted and fixed is made of a material having a thermal expansion coefficient equivalent to that of the wafer under test, for example, silicon or ceramic material. Therefore, the probe array head 130 may have a coefficient of thermal expansion equivalent to that of the wafer.

The circuit board 121 is formed inside the probe substrate 120, and a first pad 125 is formed on one surface of the probe substrate 120, and a second pad 127 is formed on the other surface opposite to the one surface. have. The first and second pads 125 and 127 are electrically connected to each other through the circuit pattern 121. In this case, the first pad 125 is electrically connected to the interface pin 150 by mechanical contact. The second pad 127 is formed at a position corresponding to the exposed hole 132 of the support layer 131. The first pad 125 in contact with the interface pin 150 has the probe array head 130 supported by the support plate ( It may be formed on the side of the direction in contact with the interface pin 150, that is opposite to the surface on which the probe pin 180 is disposed after being seated on 110. Such a probe substrate 120 is a printed circuit board, a flexible printed circuit board (FPCB; flexible PCB), or a flexible printed circuit board (RFPCB; rigid flexible PCB) made of any one or a combination thereof, the circuit pattern 121 is not shown, but the probe substrate 120 It is electrically connected to the first pad 125 provided on a surface of the rear surface of the rear surface of the rear surface of the rear surface of the substrate 110 and may be formed in multiple layers. Round plates of the same form or several long block types The probe substrate 120 may be collectively installed on the support plate 110. The connection between the probe substrate 120 and the support plate 110 may be performed by using a non-conductive adhesive such as epoxy or mechanically using bolts and nuts. The thickness of the probe substrate 120 may be formed to correspond to the depth of the through hole 139 formed in the support plate 110. The thickness of the probe substrate 120 may be formed by using a probe array head. For the uniformity and flatness of the arrangement on the support plate 110 of 130. Meanwhile, the thickness of the probe substrate 120 may be formed thinner or thicker than the depth of the through hole 139 according to the designer's intention. Even when the probe array head 130 is disposed on the support plate 110 is preferably arranged to have a uniform uniformity.

The support layer 131 is bonded to the surface of the probe substrate 120 on which the second pad 127 is formed through the non-conductive adhesive 135. The support layer 131 has exposure holes 132 at positions corresponding to the second pads 127 of the probe substrate 120. The material of the support layer 131 is a material equivalent to that of the wafer as described above. However, if the area of the probe card 100 is not large enough that the poor contact of the probe pin 180 due to the difference in thermal expansion rate is not concerned, the material of the support layer 131 may be ceramic, FR4, polyimide, Various materials such as organic materials, photoresist (PR), dry film, and the like may be used. Each exposed hole 132 may be filled with a conductive adhesive 133 for electrical bonding with the probe pin 180. The conductive adhesive 133 is an adhesive having electrical conductivity, and may be, for example, a liquid adhesive, a solder paste, solder, or the like containing metal powder. The conductive adhesive 133 filled in the exposed hole 132 secures the probe pin 180 to the exposed hole 132 when the probe pin 180 is inserted, and maintains the electrical connection with the probe pin 180. do. As a result, the second pad 127 and the probe pin 180 exposed to the exposure hole 132 are electrically connected to each other through the conductive adhesive 133. The non-conductive adhesive 135 is an adhesive having no electrical conductivity. For example, an epoxy-based adhesive may be used.

The probe pin 180 may be in the form of a cantilever as shown. However, the probe pin 180 is not necessarily limited to this shape, and any shape may be used as long as the probe pin 180 has elasticity that can be restored to its original state when pressed against the chip pad of the wafer and dropped from the contact state. For example, the probe pin 180 of the present invention has a connection part 181 inserted into and connected to the exposed hole 132 of the probe substrate 120, and one end thereof is connected to the upper end of the connection part 181 to extend in a horizontal direction and horizontally. The semiconductor chip formed on the wafer and connected upwardly by being connected to the other end of the beam part 183 and the beam part 183 having a pin pressure control bar connecting one side of the bottom of the through part and the other side of the ceiling in the direction; It may be provided in the form including a contact portion 185 having a contact tip in contact with the pad of the.

The connection portion 181 of the probe pin 180 is inserted into the exposure hole 132 of the probe substrate 120 in the vertical direction and physically inserted into the exposure hole 132 through the conductive adhesive 133 filled in the exposure hole 132. As well as being fixed to the electrically connected to the second pad 127 of the probe substrate 120. The connection part 181 of the probe pin 180 may be provided to correspond to the depth of the exposure hole 132. That is, the connection part 181 of the probe pin 180 may have a length corresponding to the depth of the exposure hole 132 and a thickness smaller than the diameter of the exposure hole 132. On the other hand, the start portion from which the connection portion 181 protrudes from the body of the probe pin 180 may be provided in a stepped shape from a peripheral structure, for example, the beam portion 183, for protruding the connection portion. The stepped lower end of the connection part faces the front surface of the probe substrate 120 while the connection part 181 is inserted into the exposure hole 132 so that the probe pin 180 is not inserted into the exposure hole 132 more than necessary. Can play a supporting role.

The contact portion 185 of the probe pin 180 is a part in physical contact with the pad of the semiconductor chip. The tip of the contact portion 185 may be processed into a thinner and thinner tip portion as the chip pad is miniaturized. For example, the tip of the contact tip may be provided in the shape of a pin protruding from the adjacent peripheral tip region.

Meanwhile, the probe pin 180 of the present invention may be provided in various forms such as a form in which a plurality of pin pressure adjusting bars are formed in the beam unit 183, a portion of the contact unit 185 is deformed, and a thickness of the beam unit 183 is stepped. Can be. The probe pin 180 may be formed of tungsten (W), rhenium tungsten (ReW), beryllium copper (BeCu), nickel (Ni) alloy which is a micro electro-mechanical system (MEMS) material, and the like. It can be provided with materials.

The main circuit board 140 is electrically connected to the probe array heads 130 to transmit a signal transmitted from the inspection equipment to the semiconductor chip pad through the probe array head 130, and the semiconductor chip pad is connected to the probe array head 130. Is to provide information to the inspection equipment. The support plate 110 is coupled and fixed to the main circuit board 140, and the pad (not shown) of the main circuit board 140 and the contact point of the probe board 120 are electrically connected to each other through the interface pin 150. do. As shown in the figure, the coupling between the main circuit board 140 and the support plate 110 may be made of a screw coupling based on the fastening member 190, and may be made of a non-conductive adhesive or the like according to necessity or a user option. It may be combined. In order to reinforce the coupling of the main circuit board 140 and the support plate 110 when the main circuit board 140 and the support plate 110 are coupled, a separate connection reinforcement plate 170 is provided on the lower surface of the main circuit board 140. ) May be used further. That is, the connection reinforcement plate 170 may be disposed in a predetermined region between the main circuit board 140 and the support plate 110. However, when the supporting plate 110 is provided to perform the role of the reinforcing plate itself, the connection reinforcing plate 170 may be omitted.

When the connection reinforcement plate 170 is provided to couple and fix the main circuit board 140 and the support plate 110, the connection reinforcement plate 170 is disposed between the edge region of the support plate 110 and the main circuit board 140. It can be arranged with a certain width, a certain length and a certain number of. When the connection reinforcement plate 170 is disposed between the main circuit board 140 and the support plate 110, the fastening member 190 penetrates through the connector formed at one side of the support plate 110, for example, the temporary edge of the support plate 110. The support plate 110 may be fixed to the connection reinforcement plate 170 in a form extending to the connection reinforcement plate 170. To this end, the connector may be provided in a shape corresponding to the fastening member 190, for example, a female thread shape, so that the fastening member 190 may be fixed after being inserted. Accordingly, the fastening member 190 may also be provided in the shape of a male thread to fix the support plate 110 to the connection reinforcement plate 170 through screw coupling. Meanwhile, the connection reinforcement plate 170 is firmly attached to one side of the main circuit board 140, so that the support plate 110 coupled to the connection reinforcement plate 170 is fixed to the main circuit board 140. Can be.

The upper reinforcement plate 160 is provided on the main circuit board 140 to reinforce the upper surface of the main circuit board 140 and to support the main circuit board 140. Connection holes through which the fastening member 190 may pass are provided in a predetermined region of the upper reinforcement plate 160 and a predetermined region of the main circuit board 140. Then, the fastening member 190 passes through the connection hole provided in the main circuit board 140 and the upper reinforcement plate 160 and then is fastened to the connection reinforcement plate 170. Accordingly, the fastening member 190 may connect and fix the upper reinforcement plate 160, the main circuit board 140, and the connection reinforcement plate 170.

The interface pin 150 electrically connects the main circuit board 140 and the probe array head 130, and in particular, the circuit pattern 121 and the main circuit board 140 provided on the probe board 120 of the probe array head 130. ) Is configured to electrically connect. To this end, a predetermined contact point or pad may be provided at a point where the interface pin 150 contacts on the main circuit board 140, and as described above, the circuit pattern 121 is connected to the rear surface of the probe board 120. The first pad 125 may be provided to be in contact with the interface pin 150. The interface pin 150 may be composed of various types of electrically conductive members, and for example, wires, cables, pogo pins, spring pins, and the like may be used.

Based on the above-described configuration, the probe card 100 according to the first exemplary embodiment may be electrically connected to the circuit pattern 121 by inserting the probe pin 180 into the exposed hole 132 of the probe substrate 120. By connecting to the main circuit board 140 through the interface pin 150, an electrical signal transmission and reception path may be configured. In particular, the probe card 100 according to the first embodiment configures the support plate 110 to have a coefficient of thermal expansion similar to or close to that of the wafer, and the probe array heads 130 implanted in the support plate 110 also support plate 110. It is configured to have a coefficient of thermal expansion similar to). That is, the probe array head 130 of the probe card 100 according to the first exemplary embodiment may be formed of a multilayer ceramic substrate or a flexible printed circuit board, thereby reducing a difference in thermal expansion rate between the support plate 110 and a wafer on which a semiconductor chip is provided, and thus maintaining a constant ratio. By being disposed in the form spaced apart from each other it is possible to minimize the positional change due to thermal expansion or thermal contraction. In particular, the probe card 100 according to the first exemplary embodiment may separately prepare the probe substrate 120 having the probe pins 180 arranged thereon and provide them as the probe array heads 130 and uniformly arrange them on the support plate 110. By bonding, it is possible to increase the degree of alignment of the probe pins 180 and to facilitate the fabrication of the probe card 100, and to easily replace or repair a certain portion as necessary.

Meanwhile, in the above description, the support plate 110 formed of a separate dummy ceramic is provided, and the probe array heads 130 are disposed on the support plate 110, but the present invention is not limited thereto. That is, the probe card 100 according to the first embodiment does not provide a separate support plate 110, but is provided in a form in which the probe array heads 130 are attached in a predetermined arrangement so that the probe card 100 is fixedly coupled to the main circuit board 140. Production is possible. In this case, the probe card 100 according to the first embodiment may be electrically connected to the at least one probe array head 130 and the probe array head 130 including the probe substrate 120 to which the probe pins 180 are connected. It may be configured to include a main circuit board 140 connected to the probe array head 130, the interface pin 150 for electrically connecting the main circuit board 140 and the probe array head 130. At this time, the probe card 100 reinforces the connection of the probe array head 130 and the main circuit board 140, which are connected to each other by a fastening member, and the upper part reinforcing the connection reinforcing plate 170 and the main circuit board 140. It may further include a reinforcement plate 160.

Hereinafter, manufacturing of the probe array head 130 of the probe card 100 according to the first embodiment will be described in more detail with reference to FIGS. 4 to 10.

4 to 10 illustrate one end surface of the probe array head to explain a method of manufacturing the probe array head 130 according to the first embodiment of the present invention. The first and second wafers 210 and 220 may be bare wafers on which semiconductor chips are not formed, and various other materials may be used.

4 through 10, first, as shown in FIG. 4, a first wafer material 211 is provided to align the probe pins 180. The first wafer material 211 may be provided in a form corresponding to a wafer on which a semiconductor chip is provided, and may also be provided in a form for aligning a predetermined number of probe pins 180 as shown. In the following description, the first wafer material 211 will be described based on a form in which two probe pins 180 are aligned.

When the first wafer material 211 is provided, based on the first wafer material 211 provided as shown in FIG. 5, the probe wafer 180 may have a shape corresponding to the x and y axis coordinates on which the probe pin 180 is to be placed. Processing. For example, as illustrated, the pin hole region 201 into which the contact portion 185 contacting the pad of the semiconductor chip is inserted and the beam portion 183 of the probe pin 180 may be seated. The first wafer 210 processed to form the support region 203 and the through region 205 where the connection portion 181 of the probe pin 180 is to be formed is manufactured. The penetrating region 205 may be used to perform the operation for fixing the connection 181 of the probe pin 180 to the exposed hole 132 of the probe substrate 120. At this time, a photo process and a dry etching process may be used as the processing process. As the photolithography process performed in the first embodiment, a MEMS (Micro Electro Mechanical Systems) exposure process may be used.

When the processing of the first wafer material 211 is completed and the processed first wafer 210 is provided, the probe pins 180 are disposed on the processed first wafer 210 as shown in FIG. 6. In this case, the contact portion of the probe pin 180 adjusts the position of the probe pin 180 to be inserted into the pin hole of the processed first wafer 210. The position of the pinhole may correspond to a position corresponding to a pad of a wafer on which a semiconductor chip to perform an inspection process is substantially provided. Accordingly, the first wafer material 211 may be processed to be formed to correspond to the pad position of the wafer to be inspected when the pinhole region 201 is formed. Meanwhile, when the probe array head 130 is provided in a predetermined module shape, the pin hole region 201 may be formed in a shape corresponding to the contact portion 185 of the probe pin 180.

After the probe pin 180 is disposed on the processed first wafer 210, a portion 181 of the probe pin 180 protrudes from the front surface of the processed first wafer 210 as shown in FIG. 7. The second wafer 220 processed so as to be stacked. At this time, the second wafer 220 is formed by processing the second wafer material. The second wafer 220 is formed to protrude the connection portion 181 of the probe pin 180 by using a photo process and a dry or wet etching process with respect to the second wafer material. Here, since the thickness of the second wafer 220 determines the flatness of all the probe pins 180, polishing is performed to uniformly and uniformly form the surface of the second wafer 220. In addition, the second wafer 220 is stacked on the upper surface of the processed first wafer 210, but the second wafer 220 is exposed to the outside so that the penetration region where the connection part 181 of the probe pin 180 is disposed is exposed to the outside. Place it. Accordingly, the connection portion 181 of the probe pin 180 may be exposed through the through region 205 of the processed first wafer 210 and the second wafer 220. The probe array frame 250 including the first wafer 210, the second wafer 220, and the probe pin 180 processed through the above process is provided.

Meanwhile, as illustrated in FIG. 8, an intermediate body of the probe array head to which the support layer 131 is bonded is prepared on the probe substrate 120. The probe array frame 250 is disposed on the support layer 131 so that the connection portion 181 of the probe pin 180 is inserted into the exposed hole 132 of the support layer 131. In this case, the probe array frame 250 is disposed such that the upper surface of the second wafer 220 faces the front surface of the probe substrate 120. Accordingly, the connection portion 181 of the probe pin 180 and the exposure hole 132 of the support layer 131 may be exposed through the through region 205 of the wafers. Then, the process of bonding the connection part 181 of the probe pin 180 and the exposure hole 132 through the through part region 205 is performed. In this case, the probe pin 180 may be bonded to the exposed hole 132 of the probe substrate 120 through the conductive adhesive 133 by individual bonding such as reflow, laser, or the like as a bonding method.

Next, as shown in FIG. 9, the first and second wafers 210 and 220 of FIG. 8 except for the probe pin 180 are removed using an etching process. Accordingly, a probe array head 130 may be provided in which probe pins 180 connected to the exposed holes 132 of the support layer 131 are arranged.

In the above description, the two probe pins 180 are disposed on the probe substrate 120 as an example, but the present invention is not limited thereto. That is, the manufacturing process of the probe array head 130 of the first embodiment may be used to manufacture the probe array head 130 in which a larger number of probe pins 180 are simultaneously disposed on the probe substrate 120 according to the designer's intention. It may also be used to fabricate the probe array head 130 in which the probe pins 180 are disposed on the probe substrate 120.

Meanwhile, as described above, the probe array head 130 manufactured according to the above-described method may be inserted into each of the support plates on which the through holes 139 are formed to constitute the probe card 100.

Second Embodiment

Meanwhile, in the probe array head 130 according to the first embodiment, the support layer 131 having the exposed holes 132 formed thereon is bonded to the probe substrate 120, and the probe pins are connected to the probe substrate 120 through the exposed holes 132. Although 180 has been disclosed to be bonded and electrically connected, the configuration is not limited thereto.

For example, in the probe array head 130 according to the second embodiment of the present invention, as illustrated in FIG. 15, a probe substrate 136 having a via hole 134 formed on a supporting substrate 138 is bonded to the probe array head 130. The connection portion 181 of the probe pin 180 may be inserted into the 134 to be electrically connected to the junction 181 through the conductive adhesive 133. In this case, the probe array head 130 includes a probe substrate member and a probe pin 180 electrically connected to the probe substrate member through the conductive adhesive 133. The probe substrate member includes a support substrate 138 and a probe substrate 136 bonded onto the support substrate 138 via a nonconductive adhesive 135.

10 to 15 are views for explaining a method of manufacturing the probe array head 130 according to the second embodiment of the present invention. In particular, FIGS. 10 to 15 are views for explaining fabrication of the probe array head 130 including the flexible printed circuit board type probe substrate 136.

First, referring to FIG. 10, a first wafer 210 and a second wafer 220 having a space in which the probe pin 180 may be disposed are prepared. In more detail, a wafer having a predetermined thickness and width is provided, and a pin hole region 201 through which the contact portion 185 of the probe pin 180 can be inserted first using a photo process and an etching process is provided. The second wafer 220 may be prepared. And a support area on the second wafer 220 and including a support area on which the beam part 183 of the probe pin 180 is disposed and to expose the connection part 181 of the probe pin 180. 1 Wafer 210 is prepared. The shape of the first wafer 210 may also be processed into a shape corresponding to the beam portion 183 of the probe pin 180 using a photo process and an etching process. The entire thickness of the first wafer 210 and the second wafer 220 may be provided to correspond to the vertical height of the probe pin 180 except for the connection portion 181. Accordingly, when the probe pin 180 is seated in the space provided by the first wafer 210 and the second wafer 220, the connection portion 181 of the probe pin 180 is fixed from the front surface of the first wafer 210. It may be arranged in a shape protruding by the height.

Next, as shown in FIG. 11, after the first wafer 210 and the second wafer 220 are respectively provided and bonded to connect the pin hole region 201 and the beam seating region 207, the first wafer ( The probe pin 180 is seated in the space formed in the 210 and the second wafer 220. Herein, the first wafer 210 and the second wafer 220 may be configured to be bonded together to simplify the process. Accordingly, it may be possible to process a single wafer into a shape in which the probe pin 180 may be seated according to a designer's intention. When arranging the probe pin 180, the contact portion of the probe pin 180 may be disposed in the pin hole region 201 provided in the second wafer 220. The probe pin 180 is disposed so that one surface of the beam part of the probe pin 180 faces the front surface of the second wafer 220.

Next, as shown in FIG. 12, a spacer 230 covering one side of the probe pin 180 is provided. That is, the spacer 230 is disposed to cover one surface of the probe pin 180 on the pin hole region of the probe pin 180 region. In this case, the spacer 230 may be formed to fill a region of the first wafer 210. In forming the spacer 230, a photo process and an etching process may be used to expose the remaining area of the probe pin 180, that is, a part of the beam part and the connection part of the probe pin 180. Based on the above method, the probe array frame 250 including the probe pin 180, the first wafer 210, the second wafer 220, and the spacer 230 may be prepared. In this case, the same silicon as the material of the first wafer 210 may be used as the material of the spacer 230, and various materials such as ceramics and plastics may be used.

Subsequently, as illustrated in FIG. 13, a probe substrate 136 having a via hole 134 to which the connection portion 181 of the probe pin 180 is connected is provided on the probe array frame 250. The probe substrate 136 is a circuit board facing the first wafer 210 region, the spacer 230 region, and the second wafer 220 region provided in the remaining region except for the connection portion 181 of the probe pin 180. And a via hole 134 to which the connection portion 181 of the probe pin 180 is connected. The conductive adhesive 133 may be filled in the via hole 134 for electrical connection with fixing of the connection part 181 of the probe pin 180.

Next, as illustrated in FIG. 14, the support substrate 138 supporting the connection portion 181 of the probe pin 180 is bonded to the non-conductive adhesive 135 on the probe substrate 136.

Thereafter, as illustrated in FIG. 15, the probe array head 130 may be prepared by disassembling the first wafer 210, the second wafer 220, and the spacer 230. That is, the first wafer 210 and the second wafer 220 are separated from the probe substrate 136. In addition, the probe array head 130 may be prepared by moving the spacer 230 in the horizontal direction along the surface of the probe substrate 136 to separate the probe pin 180 from the probe substrate 136. Alternatively, when the spacer 230 is made of the same material as the first wafer 210, the probe array head 130 may be provided by removing the spacer 230 using an etching process.

The probe array head 130 fabricated in the above-described manner is inserted into and bonded to the via hole 134 provided in the probe substrate 136, and the probe substrate 136 is supported by the support substrate 138. Is supported by. The probe substrate 136 may be a flexible printed circuit board. The circuit pattern formed inside the probe substrate 136 is connected to the via hole 134 at one end thereof, and the other end thereof is exposed to one side of the probe substrate 136. The circuit pattern exposed to one side may be electrically connected to the main circuit board by an external flexible printed circuit board and a connection member.

Meanwhile, in the second embodiment, as shown in FIGS. 13 and 14, after bonding the probe substrate 136 on the probe array frame 350, the supporting substrate 138 is bonded on the probe substrate 136. Although disclosed is not limited thereto. For example, after the probe substrate 136 is bonded to the support substrate 138, the probe substrate 136 supported by the support substrate 138 may be bonded to the probe array frame 250.

Third and fourth embodiments

Meanwhile, in the first embodiment, as shown in FIG. 9, an example in which the connection portion 181 of the probe pin 180 is inserted into the exposure hole 132 of the support layer 131 is disclosed. In the second embodiment, as shown in FIG. 15, an example in which the connection portion 181 of the probe pin 180 is inserted into the via hole 134 of the probe substrate 136 is disclosed. However, the present invention is not limited thereto. no. For example, as illustrated in FIGS. 16 to 19, the connection portion 181 of the probe pin 180 may be bonded to the surface of the probe substrate 136 in the form of a surface mount.

16 and 17 illustrate a probe array head 130 of a probe card according to a third embodiment of the present invention. 16 is a plan view showing a part of the probe array head 130, and FIG. 17 is a cross-sectional view taken along the line II of FIG.

16 and 17, the probe array head 130 according to the third embodiment includes a support substrate 138, a probe substrate 136, and a plurality of probe pins 180, and includes a plurality of probe pins ( 180 has a structure bonded to the surface of the probe substrate 136 in the form of a surface mount.

As the support substrate 138, a material having a thermal expansion similar to that of the wafer may be used. For example, a material of the support substrate 138 may be a ceramic, invar, a metal alloy including novenite, or the like.

The probe substrate 136 is bonded onto and fixed to the substrate substrate 138 via a nonconductive adhesive 135. As the probe substrate 136, a flexible printed circuit board may be used. A portion of the probe substrate 136 extending outward of the support substrate 138 of the probe substrate 136 is bonded to the main circuit board.

Circuit patterns are formed on both surfaces of the probe substrate 136, and the circuit patterns formed on both surfaces are electrically connected to each other by a plurality of via holes 131. The probe substrate 136 may be formed in multiple layers. In this case, a circuit pattern may be formed in the probe substrate 136. The circuit pattern formed in the probe substrate 136 may be connected to at least one of the circuit patterns formed on both surfaces of the probe substrate 136 by the via hole 131. The plurality of via holes 131 may be formed to correspond to the number of probe pins 180 to be bonded to the probe substrate 136. When the via holes 131 are to be used for purposes other than the purpose in which the probe pins 180 are connected, the via holes 131 may be formed more than the number of the probe pins 180.

Since a plurality of chip pads are formed on the semiconductor chip of the wafer with fine pitch, the probe pin 180 bonded to the probe substrate 136 is also bonded to the probe substrate 136 so as to correspond to the fine pitch of the chip pad. . Therefore, the via hole 131 formed in the probe substrate 136 may be formed in a zigzag form so as to correspond to the fine pitch of the chip pad.

When the probe pin 180 is bonded to the via hole 131, the exposed hole 132 of the via hole 131 may be filled with the filler 133a to stably support the probe pin 180. As the filler 133a, a conductive or nonconductive filler may be used. For example, silver, copper, nickel or solder may be used as the conductive filler. As the non-conductive filler, an epoxy material, a photo solder resist sheet, or the like may be used.

The plurality of probe pins 180 are bonded to the via holes 131 of the probe substrate 136. At this time, in the third embodiment, the connection part 181 of the probe pin 180 is mounted on the via hole 131 and bonded. As the method of bonding the probe pin 180 to the via hole 131, a method such as brazing, soldering, laser welding, or the like may be used, but is not limited thereto. Reference numeral 187 denotes a bonding layer 187 formed by the bonding method described above. Since the exposed hole 132 of the via hole 131 is filled with the filler 133a, the connection part 181 of the probe pin 180 mounted on the via hole 131 can be stably supported.

In this case, when compared to the probe pins according to the first and second embodiments, the probe pin 180 according to the third embodiment has the same shape as the beam part 183 and the contact part 185, and the connection part 181 has a via hole. The difference is that the part inserted in 131 is removed.

As described above, the probe array head 130 according to the third embodiment is bonded to the probe pin 180 in a surface-mounted manner on the via hole 131, so that the probe pin 180 is inserted into the via hole 131. Compared to the bonding method according to the first and second embodiments, the size of the via hole 131 may be reduced. Since the spacing between the via holes 131 can be finer by reducing the size of the via holes 131, the probe array head 130 according to the third embodiment may be formed by the chip pad formed on the semiconductor chip of the wafer. It can respond more effectively to fine pitching.

Since the probe array head 130 according to the third embodiment may be manufactured in the same order as the method of manufacturing the probe array head according to the second embodiment disclosed in FIGS. 10 to 15, detailed description thereof will be omitted.

Alternatively, the probe array head 130 according to the third exemplary embodiment may be manufactured by bonding the probe pins 180 to the via holes 131 of the probe substrate 136 to which the support substrate 138 is bonded. .

Fourth Embodiment

18 and 19 illustrate a probe array head 130 of a probe card according to a fourth exemplary embodiment of the present invention. 18 is a plan view showing a portion of the probe array head 130, and FIG. 19 is a cross-sectional view taken along the line II-II of FIG.

18 and 19, the probe array head 130 according to the fourth embodiment includes a support substrate 138, a probe substrate 136, and a plurality of probe pins 180, and includes a plurality of probe pins ( 180 has a structure bonded to the surface of the probe substrate 136 in the form of a surface mount.

The probe array head 130 according to the fourth embodiment includes a support substrate 138, a probe substrate 136, and a plurality of probe pins 180, and a probe pin 180 on a surface of the probe substrate 136. Since it has the same configuration as the probe array head according to the third embodiment in that it has a bonded structure, detailed description of this portion is omitted.

However, the probe array head 130 according to the fourth embodiment is a probe array head according to the third embodiment in that the plurality of probe pins 180 are bonded on the circuit pattern 137 formed on one surface of the probe substrate 136. Compared with the configuration has a difference.

Circuit patterns 137 are formed on both surfaces of the probe substrate 136, and the circuit patterns 137 formed on both surfaces of the probe substrate 136 are electrically connected by a plurality of via holes 131. The plurality of via holes 131 may be formed to correspond to the number of probe pins 180 to be bonded to the probe substrate 136. The circuit pattern 137 formed on the surface of the probe substrate 136 is connected to the via hole 131, and a connection pad 137a to which the probe pin 180 is bonded is formed at an end portion thereof.

The plurality of probe pins 180 are bonded to the connection pads 137a of the probe substrate 136. At this time, in the fourth embodiment, the connection part 181 of the probe pin 180 is mounted on the connection pad 137a and bonded. As a method of bonding the probe pin 180 to the connection pad 137a, a method such as brazing, soldering, laser welding, or the like may be used, but is not limited thereto. Reference numeral 187 denotes a bonding layer 187 formed by the bonding method described above.

As described above, the probe array head 130 according to the fourth embodiment is bonded in such a manner that the probe pins 180 are surface-mounted on the connection pads 137a, so that the probe pins are via holes as in the first and second embodiments. The size of the via hole 131 can be reduced compared to the bonding method inserted into the bonding hole. In addition, since the connection pad 137a to which the probe pin 180 is bonded may be rearranged from the via hole 131 to a desired shape through a circuit pattern 137 connected to the via hole 131, according to the fourth exemplary embodiment The probe array head 130 may more effectively correspond to the fine pitch of the chip pad formed on the semiconductor chip of the wafer. In other words, by rewiring the circuit pattern 137 on the portion where the via hole 131 is formed, the connection pads 137a to which the probe pins 180 are bonded are formed to form the connection pads 137a as compared with the spacing between the via holes 131. It is possible to secure more space between Therefore, compared with the via hole insertion method, the probe array head 130 according to the fourth embodiment may more effectively cope with the fine pitch of the chip pad formed on the semiconductor chip of the wafer. In addition, the spacing between the connection pads 137a can be more wider than the spacing between the via holes 131, so that the short problem between adjacent probe pins 180 can be suppressed as the pitch of the probe pins 180 becomes finer. There is an advantage to this.

In this case, the probe pin 180 according to the fourth embodiment may have the same shape as the probe pin according to the third embodiment.

Since the probe array head 130 according to the fourth embodiment may be manufactured in the same order as the method for manufacturing the probe array head according to the second embodiment disclosed in FIGS. 10 to 15, detailed description thereof will be omitted.

Alternatively, the probe array head according to the fourth exemplary embodiment may be manufactured by bonding the probe pins 180 to the connection pads 137a of the probe substrate 136 to which the support substrate 138 is bonded.

Meanwhile, the probe array head 130 manufactured in this manner may be inserted into the through hole 139 of the support plate 110 described above to configure a probe card, and a plurality of probe array heads may be integrated according to a user's purpose. It is also possible to configure the head of the probe card independently without the support plate.

In addition, the embodiments of the present invention disclosed in the specification and the drawings are only presented as specific examples for clarity and are not intended to limit the scope of the present invention. It will be apparent to those skilled in the art that other modifications based on the technical idea of the present invention are possible in addition to the embodiments disclosed herein.

100: probe card 110: support plate
120: probe substrate 121: circuit pattern
125: first pad 127: second pad
130: probe array head 131: support layer
132: exposed hole 133: conductive adhesive
134: via hole 135: non-conductive adhesive
136: probe substrate 137: circuit pattern
137a: connection pad 139: through hole
140: main circuit board 150: interface pins
160: upper reinforcement plate 170: connection reinforcement plate
180: probe pin 181: connection
183: beam portion 185: contact portion
190: fastening member 210, 211, 220, 230: wafer
250 probe frame

Claims (17)

A support plate having a plurality of through holes formed corresponding to the semiconductor chips of the wafer to be tested;
A plurality of probe array heads inserted into the plurality of through holes and having a plurality of probe pins corresponding to pads of the semiconductor chip of the wafer;
A main circuit board to which the support plate is fixedly installed and to which the plurality of probe array heads are electrically connected;
And an interface pin disposed between the probe array head and the main circuit board to electrically connect the probe pin of the probe array head and the main circuit board.
The plurality of probe array heads, respectively
A support substrate;
A flexible probe substrate bonded onto the support substrate;
A plurality of probe pins bonded on a surface of the probe substrate;
Probe card comprising a. The method of claim 1, wherein the probe substrate,
And a plurality of via holes connecting the circuit patterns formed on both surfaces and the circuit patterns formed on both surfaces thereof, wherein the plurality of probe pins are respectively bonded onto the plurality of via holes. The method of claim 2, wherein the probe substrate,
And a filler filled in the via hole.
And the filler supports the probe pin bonded to the via hole. The method of claim 1, wherein the probe substrate,
And a plurality of via holes connecting the circuit patterns formed on both sides and the circuit patterns on both sides, wherein the plurality of probe pins are respectively bonded to circuit patterns extending from the plurality of via holes. The circuit pattern of claim 4, wherein the circuit pattern formed on the surface to which the probe pin is bonded is formed.
And a connection pad formed to be connected to the via hole and to which the probe pin is joined at an end portion thereof. The method according to any one of claims 1 to 5,
And the probe array head includes a plurality of probe pins corresponding to chip pads of at least one semiconductor chip. The method of claim 6, wherein the probe pin
A connection part bonded to a surface of the probe substrate in a surface mount form;
A beam part having one end connected to an upper end of the connection part and extending in a horizontal direction, and having a through part formed at a center portion in the horizontal direction, and having at least one pin pressure control bar connecting one side of the bottom of the through part and the other side of the ceiling;
A contact part connected to the other end of the beam part and extending upward and having a contact tip contacting a chip pad of a semiconductor chip formed on a wafer;
Probe card comprising a. The method according to claim 6,
The support plate
A probe card comprising a material having a thermal expansion rate similar to that of a wafer in which semiconductor chips are arranged. The method according to claim 6,
A connection reinforcement plate disposed between the probe array head or the support plate and the main circuit board to reinforce the probe array head or the support plate to be connected to the main circuit board;
Probe card further comprising. 10. The method of claim 9,
A first fastening member penetrating one side of the probe array head or one side of the support plate to fix the connection reinforcing plate to the main circuit board; And
A second fastening member configured to connect and fix one side of the probe array head or one side of the support plate and the connection reinforcement plate and the connection reinforcement plate and the main circuit board;
Probe card further comprising any one of. A probe array head for a probe card,
A support substrate;
A flexible probe substrate bonded to the support substrate, wherein a portion extending from the support substrate is bonded to a main circuit board;
A plurality of probe pins bonded on a surface of the probe substrate;
Probe array head for a probe card comprising a. The method of claim 11, wherein the probe substrate,
And a plurality of via holes connecting the circuit patterns formed on both surfaces and the circuit patterns formed on both surfaces thereof, wherein the plurality of probe pins are respectively bonded onto the plurality of via holes. The method of claim 12, wherein the probe substrate,
And a filler filled in the via hole.
And said filler supports said probe pin bonded to said via hole. The method of claim 11, wherein the probe substrate,
And a plurality of via holes connecting the circuit patterns formed on both sides and the circuit patterns on both sides, wherein the plurality of probe pins are bonded to circuit patterns extending from the plurality of via holes, respectively. Probe array head. The circuit pattern of claim 14, wherein the circuit pattern formed on the surface to which the probe pin is bonded is formed.
And a connection pad formed to be connected to the via hole and to which the probe pin is joined at an end portion thereof. The method according to any one of claims 11 to 15,
And the plurality of probe pins are arranged on the probe substrate so as to correspond to chip pads of at least one semiconductor chip. The method of claim 16, wherein the probe pin
A connection part bonded to a surface of the probe substrate in a surface mount form;
A beam part having one end connected to an upper end of the connection part and extending in a horizontal direction, and having a through part formed at a center portion in the horizontal direction, and having at least one pin pressure control bar connecting one side of the bottom of the through part and the other side of the ceiling;
A contact part connected to the other end of the beam part and extending upward and having a contact tip contacting a chip pad of a semiconductor chip formed on a wafer;
Probe array head for a probe card comprising a.

Images