KR20140011071A - Method for separating epitaxial growth layer from growth substrate - Google Patents

Abstract

The present invention relates to a method for separating a nitride semiconductor layer from a growth substrate. Provided is the method for separating the nitride semiconductor layer from the growth substrate, which includes the steps of: preparing the growth substrate; growing a sacrificial layer on one surface of the growth substrate; forming a plurality of fine pores on the sacrificial layer; forming a plurality of cavities from the fine pores; and separating the growth substrate by using the cavities.

Description

Separation method of nitride semiconductor layer and growth substrate {METHOD FOR SEPARATING EPITAXIAL GROWTH LAYER FROM GROWTH SUBSTRATE}

The present invention relates to a nitride semiconductor layer and a growth substrate separation method.

The light emitting diode is basically a PN junction diode which is a junction between a P-type semiconductor and an N-type semiconductor.

When the P-type semiconductor and the N-type semiconductor are bonded to each other by applying a voltage to the P-type semiconductor and the N-type semiconductor, the light emitting diode (LED) Type semiconductor and the electrons of the N type semiconductor migrate toward the P type semiconductor, and the electrons and the holes move to the PN junction.

The electrons moved to the PN junction are combined with holes as they fall from the conduction band to the valence band. At this time, energy corresponding to a height difference between the conduction band and the electromotive band, that is, an energy difference, is emitted, and the energy is emitted in the form of light.

Such a light emitting diode is a semiconductor device that emits light and has characteristics such as eco-friendliness, low voltage, long lifespan, and low cost. In the past, light emitting diodes have been widely applied to simple information display such as display lamps and numbers. In particular, with the development of information display technology and semiconductor technology, it has been used in various fields such as display fields, automobile headlamps and projectors.

A general light emitting diode, such as a lateral LED, is sequentially formed of a plurality of semiconductor layers including an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a growth substrate, for example, a sapphire substrate. After growth, a portion of the p-type semiconductor layer and the active layer are etched to form an n-type electrode, and a p-type electrode is formed on the p-type semiconductor layer, and then a voltage is applied to drive the light emitting diode.

The manufacturing method of such a horizontal type light emitting diode is simple, but the current is applied to the n-type electrode when the current flows into the active layer is injected horizontally, it is limited by the space, the current spreading (current spreading) narrow current efficiency Is lowered.

In addition, as part of the active layer is etched, a part of the light generated in the active layer is consumed, and thus the light extraction efficiency is slightly reduced.

In addition, as the growth substrate having low thermal conductivity is used, it is difficult to release the heat energy generated from the light emitting diode to the outside, and the stress concentration phenomenon caused by the residual heat energy is significantly increased.

In order to solve such a problem of the horizontal type light emitting diode, various kinds of vertical type light emitting diodes have been developed. The vertical light emitting diode consumes a more complicated process and manufacturing cost than the aforementioned horizontal light emitting diode, but has high light efficiency and current efficiency, and sapphire using laser lift-off (LLO). Since the substrate is selectively removed, the efficiency of the light emitting diode due to heat can be prevented.

The most important process technology in the vertical light emitting diode is a technology for efficiently separating the substrate and the nitride semiconductor layer by a laser.

However, when the sapphire substrate is separated by the laser, surface cracks are generated by the strong energy of the vertical light emitting diode, that is, the laser injected into the plurality of semiconductor layers. This can result in damage to the active layer and thermal damage.

In addition, a complicated process is required in using an expensive laser, and a technology having low yield and difficulty in large area.

Therefore, a technique for separating the growth substrate and the nitride semiconductor layer at a more effective, simple and low cost is required.

It is an object of the present invention to provide a method for separating a growth substrate from a nitride semiconductor layer which is more effective, simpler and less costly detachable and minimizes damage to the nitride semiconductor layer upon separation.

In addition, another object of the present invention is to form fine pores using an ECE process, and to effectively infiltrate an etching solution into the fine pores using mesa etching to easily separate the large-area growth substrate and the nitride semiconductor layer. To provide a way.

In addition, another object of the present invention is to provide a method of selectively forming fine pores to uniformly remove the growth substrate to increase process efficiency.

In order to achieve the above object, according to an aspect of the present invention, preparing a growth substrate; Growing a sacrificial layer on one surface of the growth substrate; Forming a plurality of fine pores in the sacrificial layer; Forming a plurality of cavities from the plurality of micropores; And separating the growth substrate by using the plurality of cavities.

The method of separating the nitride semiconductor layer from the growth substrate may further include forming an insulating pattern on a surface of the sacrificial layer before or after forming the plurality of micropores.

The forming of the plurality of cavities from the plurality of micropores may include growing a plurality of nitride semiconductor layers on the sacrificial layer, and forming a plurality of cavities from the plurality of micropores while the nitride semiconductor layers are grown. Can be.

Preparing the growth substrate may include forming a stripe pattern on one surface of the growth substrate.

The stripe pattern may be formed by etching one surface of the growth substrate by dry etching or wet etching.

The forming of the stripe pattern includes dry etching the surface of one side of the growth substrate to form the stripe pattern on one surface of the growth substrate, and then forming a growth suppression layer on the bottom surface of the stripe pattern. can do.

방향과 60 내지 90도 방향으로 형성되고, 상기 성장 기판이 GaN 기판인 경우, 상기 스트라이프 패턴은 상기 GaN 기판의

방향과 60도 방향으로 형성되는 것일 수 있다.When the growth substrate is a sapphire substrate, the stripe pattern is formed of the sapphire substrate.

Direction and 60 to 90 degrees, and when the growth substrate is a GaN substrate, the stripe pattern is formed of the GaN substrate.

Direction and may be formed in a 60 degree direction.

The sacrificial layer may include n-GaN.

The sacrificial layer may be formed of at least two layers having different impurity concentrations of n.

The plurality of micropores may be formed by an ECE (electro chemical etching) process.

The plurality of micropores may be formed by applying at least two voltages, and the first applied voltage may be lower than the voltage applied later.

Separating the growth substrate using the plurality of cavities: forming nitride semiconductor layers on the sacrificial layer; Attaching a support substrate on the nitride semiconductor layers; And separating the growth substrate and the nitride semiconductor layers by applying mechanical stress to the sacrificial layer.

Separating the growth substrate using the plurality of cavities: forming nitride semiconductor layers on the sacrificial layer; Etching the nitride semiconductor layers and the sacrificial layer by mesa etching to form mesa lines connected to at least the cavities; Attaching a support substrate on the nitride semiconductor layers; And injecting an etching solution into the mesa line to etch the sacrificial layer to separate the growth substrate and the nitride semiconductor layers.

The growth substrate may include a stripe pattern on one surface thereof, and the mesa line may be connected to the stripe pattern.

The mesa line and the stripe pattern may not be parallel to each other so that the mesa line and the stripe pattern cross each other.

The method of separating the nitride semiconductor layer and the growth substrate may further include removing the insulating pattern after separating the growth substrate and the nitride semiconductor layers.

According to another aspect of the invention, the support substrate; And a plurality of semiconductor layers provided on the support substrate, and an uppermost portion of the plurality of semiconductor layers provides a light emitting diode device having irregularities and a rough surface.

The rough surface may include two surfaces having different roughness.

One of two surfaces having different roughness may be a surface of the unevenness.

One of two surfaces having different roughness may be a surface formed by breaking of a layer including a cavity.

According to the present invention, there is an effect of providing a method of separating the growth substrate and the nitride semiconductor layer which is more effective, simple and can be separated at low cost and minimizes damage of the nitride semiconductor layer at the time of separation.

In addition, according to the present invention, a method of forming fine pores using an ECE process and efficiently infiltrating an etching solution into the fine pores using mesa etching to easily separate a large-area growth substrate from a nitride semiconductor layer. It is effective to provide.

In addition, according to the present invention there is an effect of providing a method of selectively forming fine pores to uniformly remove the growth substrate to increase the process efficiency.

1 to 6 are cross-sectional views illustrating a method of separating a growth substrate and a nitride semiconductor layer according to an embodiment of the present invention.
7 is a cross-sectional view of an LED device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to an embodiment of the present disclosure.
8 is a conceptual diagram of an ECE process.
9 and 10 are cross-sectional views illustrating embodiments of micropores formed by an ECE process.
11 to 13 are perspective views and cross-sectional views illustrating another embodiment of a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to an embodiment of the present disclosure.
14 to 21 are cross-sectional views illustrating a method of separating a growth substrate from a nitride semiconductor layer according to another embodiment of the present invention.
FIG. 22 is a cross-sectional view of a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another embodiment of the present disclosure.
23 is a conceptual diagram illustrating an embodiment in which a stripe pattern is formed on one surface of a growth substrate.
24 to 26 are perspective views and cross-sectional views illustrating another embodiment of a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another embodiment of the present invention.
27 is a cross-sectional view illustrating a method of separating a growth substrate from a nitride semiconductor layer according to another embodiment of the present invention.
28 to 33 are cross-sectional views illustrating a method of separating a growth substrate from a nitride semiconductor layer according to another embodiment of the present invention.
34 is a cross-sectional view illustrating an LED device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another exemplary embodiment of the present disclosure.
35 to 37 are perspective views and cross-sectional views showing another embodiment of a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 to 6 are cross-sectional views illustrating a method of separating a growth substrate and a nitride semiconductor layer according to an embodiment of the present invention.

7 is a cross-sectional view illustrating a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to an exemplary embodiment of the present disclosure.

8 is a conceptual diagram of an ECE process.

9 and 10 are cross-sectional views illustrating embodiments of micropores formed by an ECE process.

Referring to FIG. 1, in the method of separating the growth substrate and the nitride semiconductor layer according to an exemplary embodiment, first, the growth substrate 110 is prepared.

The growth substrate 110 may be a sapphire substrate, a GaN substrate, a glass substrate, a silicon carbide (SiC) substrate, a silicon (Si) substrate, or the like. Preferably, the growth substrate 110 may be a sapphire substrate or a GaN substrate. .

The sacrificial layer 120 is grown on the growth substrate 110 after the growth substrate 110 is charged into a chamber of an epitaxial growth apparatus such as metalorganic chemical vapor deposition (MOCVD). The sacrificial layer 120 may include GaN doped with impurities, preferably n-GaN doped with high concentration of n-type impurities.

Referring to FIG. 2, a plurality of fine pores 130 are formed in the sacrificial layer 120.

The fine pores 130 may be formed by an electro chemical etching (ESE) process.

In this case, in the ECE process, as shown in FIG. 8, the fine substrate 130 is immersed by an electric field formed by dipping the growth substrate 110 having the sacrificial layer 120 formed therein into the ECE solution 112 and then applying a voltage. It may be a process of forming them.

The ECE solution 112 may be an electrolyte solution, preferably an electrolyte solution containing oxalic acid, HF or NaOH.

The ECE process includes a cathode electrode 114 in the ECE solution 112, and the cathode electrode 114 is formed on the sacrificial layer 120 when the sacrificial layer 120 is immersed in the ECE solution 112. Is provided in, so as to be spaced apart at regular intervals.

In the ECE process, after immersing the ECE solution 112 in the sacrificial layer 120, positive power is applied to the sacrificial layer 120, and negative power is applied to the cathode electrode 114. You can proceed.

The micropores 130 may be formed to a predetermined depth into the sacrificial layer 120 from the surface of the sacrificial layer 120. The formation depth and diameter of the micropores 130 may be controlled by adjusting an applied voltage, a process time, a doping concentration of the sacrificial layer 120, or a temperature of an ECE solution.

In this case, the micropores 130 may include at least two regions, that is, the first micropores 132 and the second micropores 134, as shown in FIGS. 8 and 9. The second micropores 134 may be formed to have a larger diameter than the first micropores 132.

The reason for forming the micropores 130 as the first micropores 132 and the second micropores 134 is a region close to the surface of the sacrificial layer 120, that is, the first micropores 132 The micropores having a small diameter are formed, and the inside of the sacrificial layer 120, that is, the second micropores 134 are formed with micropores having a large diameter, and then nitride is formed on the sacrificial layer 120. When the semiconductor layer 150 is regrown, the nitride semiconductor layer 150 is less damaged, and the cavity 160 having a larger size is formed in the sacrificial layer 120 or the number of the cavity 160 is increased. To do that.

In the method of manufacturing the fine pores 130 shown in FIG. Second micropores 134 may be formed.

That is, the first micropores 132 may be formed at a first voltage, and then the second micropores 134 may be formed at a second voltage that is higher than the first voltage.

Therefore, the method of manufacturing the micropores 130 illustrated in FIG. 9 may be formed by dividing an applied voltage in at least two steps in forming the micropores 130.

In the method of manufacturing the fine pores 130 illustrated in FIG. 10, in forming the sacrificial layer 120, after forming the first sacrificial layer 122 and the second sacrificial layer 124 having different concentrations of impurities, The first micropores 132 and the second micropores 134 are formed by dipping the growth substrate 110 having the first sacrificial layer 122 and the second sacrificial layer 124 in an ECE solution and then applying power. can do. In this case, the first sacrificial layer 122 may be formed at a higher concentration of impurities than the second sacrificial layer 124.

Therefore, in the method of manufacturing the fine pores 130 shown in FIG. 10, the sacrificial layer 120 is formed by forming at least two sacrificial layers 120 having different impurity concentrations and performing an ECE process. Can be.

At this time, the method of manufacturing the fine pores 130 shown in FIG. 10 is based on proceeding the applied voltage in one step in performing the ECE process, but may proceed in two or more steps. In addition, the size of the first micropores 132 may be increased.

Referring to FIG. 3, an insulating pattern 140 is formed on the sacrificial layer 120 in which the micropores are formed.

The insulating pattern 140 may be formed of an insulating material such as silicon oxide or silicon nitride.

The insulating pattern 140 may have an open area in the form of a stripe or a mesh.

The insulating pattern 140 has a width, a thickness, a shape, and the like, when the light emitting diode device is formed using the nitride semiconductor layer separated by the method of separating the growth substrate and the nitride semiconductor layer according to an embodiment of the present invention. Can be formed in consideration of dicing and can be formed in consideration of light extraction efficiency.

The insulating pattern 140 may be formed to a thickness of 240 nm.

Referring to FIG. 4, a plurality of nitride semiconductor layers 150 are formed on the sacrificial layer 120 having the insulating pattern 140 formed thereon.

The plurality of nitride semiconductor layers 150 may be made by re-growing the growth substrate 110 in a chamber of an epitaxial growth apparatus such as MOCVD.

That is, the plurality of nitride semiconductor layers 150 may be formed by epitaxial growth from the surface of the sacrificial layer 120 exposed by the open region of the insulating pattern 140.

In this case, the fine pores 130 of the sacrificial layer 120 may be formed of a plurality of cavities 160 when the plurality of nitride semiconductor layers 150 are epitaxially grown.

The plurality of cavities 160 may be formed by combining a plurality of fine pores 130 into one, or may be formed by expanding one fine pore 130.

At this time, when epitaxially growing the plurality of nitride semiconductor layers 150, the size, position and number of the cavity 160 may be controlled by controlling the growth temperature of the epitaxial growth or the type and flow rate of the injected gas. .

The cavities 160 are mainly formed in an upper region of the sacrificial layer 120 (in this case, an upper region of the sacrificial layer 120 means a region close to an interface contacting the plurality of nitride semiconductor layers 150). Can be.

The cavities 160 are larger in size than those in the region of the sacrificial layer 120 and close to the plurality of nitride semiconductor layers 150, and the plurality of nitride semiconductor layers ( The farther it is from 150), the larger the size may be provided.

In FIG. 4, the plurality of nitride semiconductor layers 150 includes the first nitride semiconductor layer 152 and the second nitride semiconductor layer 154, but may be a single layer or a plurality of three or more layers. It may consist of layers.

The first nitride semiconductor layer 152 may be a buffer layer, and the second nitride semiconductor layer 154 may be a semiconductor layer including at least an active layer.

That is, the first nitride semiconductor layer 152 may be an n-GaN layer doped with n-type impurities or a μ-GaN layer doped with impurities.

The second nitride semiconductor layer 154 may include a first type semiconductor layer (not shown), an active layer (not shown), and a second type semiconductor layer (not shown).

In this case, the first type semiconductor layer (not shown) is a III-N-based compound semiconductor doped with a first-type impurity, for example, an N-type impurity, such as (Al, In, Ga) N-based group III nitride semiconductor layer. That is, it may be an N-GaN layer.

The active layer (not shown) may be formed of a III-N-based compound semiconductor, such as (Al, Ga, In) N semiconductor layer, may be formed of a single layer or a plurality of layers, and may emit light of at least a predetermined wavelength. have. In addition, the active layer (not shown) may be a single quantum well structure including one well layer (not shown), or a multiple quantum structure in which a well layer (not shown) and a barrier layer (not shown) are alternately stacked. It may be provided in a well structure. In this case, the well layer (not shown) or the barrier layer (not shown) may be formed of a superlattice structure, respectively or both.

The second type semiconductor layer (not shown) may be a III-N type compound semiconductor doped with a second type impurity, for example, a P type impurity, such as a (Al, Ga, In) N type III nitride semiconductor layer, that is, , P-GaN layer.

The second nitride semiconductor layer 154 may further include a superlattice layer (not shown) or an electron breaking layer (not shown).

Subsequently, the support substrate 170 is attached onto the plurality of nitride semiconductor layers 150.

The support substrate 170 may be a sapphire substrate, a GaN substrate, a glass substrate, a silicon carbide substrate, or a silicon substrate, a conductive substrate made of a metal material, a circuit board such as a PCB, or a ceramic including ceramic. It may be a substrate.

Although not shown in FIG. 4, a bonding layer (not shown) is provided between the plurality of nitride semiconductor layers 150 and the support substrate 170 to provide the plurality of nitride semiconductor layers 150 and the support substrate 170. ) May be joined.

Referring to FIG. 5, a process of separating the growth substrate 110 and the nitride semiconductor layer 150 is performed.

In the present embodiment, mechanical stress is applied to the sacrificial layer 120 having the plurality of cavities 160 so that breakage propagates along the cavities 160 so that the sacrificial layer 120 is shown in FIG. 5. By separating, the growth substrate 110 and the support substrate 170 provided with the nitride semiconductor layers 150 may be separated.

Referring to FIG. 6, the process of removing the insulating pattern 140 from the support substrate 170 including the nitride semiconductor layers 150 from which the growth substrate 110 is separated may be performed.

In this case, as the growth substrate 110 is separated, a part of the sacrificial layer 120 remains on the nitride semiconductor layer 150, precisely, the nitride semiconductor layer 150 and the insulation pattern 140, and the insulation When removing the insulating pattern 140 by removing the pattern 140, a portion of the sacrificial layer 120 grown on the nitride semiconductor layer 150 may remain as shown in FIG. 6. have.

The first surface 126, which is a surface of a portion of the remaining sacrificial layer 120 may have a roughness as shown in FIGS. 5 and 6. This is because the first surface 126 is formed by exposing the inner surface of the cavities 160 or the surface of the sacrificial layer 120 broken by the propagation of the fracture.

In addition, the second surface 156, which is the surface of the first nitride semiconductor layer 152 exposed by removing the insulating pattern 140, may also have roughness, as shown in FIG. 6. This is because the second surface 156 is a surface exposed by the removal of the insulating pattern 140, so that the surface is roughened by an etching solution or the like that etches the insulating pattern 140.

At this time, the first surface 126 and the second surface 156 may have different roughness, which is the first surface 126 and the second surface 156 is formed in a different layer, different process Because it is formed.

Referring to FIG. 7, the nitride semiconductor layer (on the support substrate 170) is formed on the support substrate 170 by a method of separating the growth substrate and the nitride semiconductor layer according to the exemplary embodiment described with reference to FIGS. 1 to 6. 150 and a portion of the remaining sacrificial layer 120 provided on the nitride semiconductor layer 150 may be manufactured.

In other words, a portion of the remaining sacrificial layer 120 and the nitride semiconductor layer 150 are mesa-etched to form a portion of the nitride semiconductor layer 150, for example, a first type semiconductor of the second nitride semiconductor layer 154. Mesa etching process to expose a portion of the layer (not shown), the first electrode 182 and the nitride on a portion of the first type semiconductor layer (not shown) of the exposed second nitride semiconductor layer 154 An electrode forming process of forming the second electrode 184 on the semiconductor layers 150 and a support substrate dicing process of dicing the support substrate 170 to manufacture individual light emitting diode elements may be performed. The device can be manufactured.

In this case, the light emitting diode device may have a surface of the nitride semiconductor layers 150 or a part of the remaining sacrificial layer 120 formed by the separation of the growth substrate 110 or the removal of the insulating pattern 140. The concave-convex 186 is formed, and the surface thereof is formed to be rough so that the top surface of the nitride semiconductor layers 150 on the support substrate 170 have the concave-convex 186 and the rough surface 126, 156. do.

Therefore, when light is extracted to the surfaces of the nitride semiconductor layers 150, the light extraction efficiency may be increased.

Meanwhile, the separated growth substrate 110 may be reused after the cleaning process of removing a portion of the sacrificial layer 120 remaining on the surface thereof.

11 to 13 are perspective views and cross-sectional views illustrating another embodiment of a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to an embodiment of the present disclosure.

11 is a cross-sectional view taken along the line AA ′ of FIG. 12, and FIG. 13 is a cross-sectional view taken along the line B-B ′ of FIG. 12.

Referring to FIG. 11, the nitride semiconductor layer (on the support substrate 170) is formed on the support substrate 170 by a method of separating the growth substrate and the nitride semiconductor layer according to the exemplary embodiment described with reference to FIGS. 1 to 6. 150 and a portion of the remaining sacrificial layer 120 provided on the nitride semiconductor layer 150 may be manufactured.

That is, an interlayer insulating layer 142 is formed on the support substrate 170 having the nitride semiconductor layer 150.

In this case, the nitride semiconductor layer 150 may be separated into a plurality. The nitride semiconductor layer 150 may be separated by etching a part of the nitride semiconductor layer 150 using the mesa etching or the like to expose the support substrate 170.

In FIG. 11, the side surface of the nitride semiconductor layer 150 is exposed by mesa etching or the like, so that the interlayer insulating layer 142 is covered. However, when the nitride semiconductor layer 150 is not separated, the interlayer insulating layer 150 is exposed. 142 may be provided to cover an upper portion of the nitride semiconductor layer 150.

The interlayer insulating layer 142 may include an opening 144. The opening 144 may be provided only in an area in which the electrode extension 188b to be described later will be formed.

The interlayer insulating layer 142 may be provided to protect the lower nitride semiconductor layer 150, in particular, the uppermost first nitride semiconductor layer 152. Of course, the interlayer insulating layer 142 may be omitted as necessary.

12 and 13, the upper electrode part 188 is formed on the support substrate 170 on which the interlayer insulating layer 142 having the opening 144 is formed.

The upper electrode 188a of the upper electrode part 188 is formed on the interlayer insulating layer 142, and the electrode extension part 188b is formed in the opening 144 of the interlayer insulating layer 142.

Accordingly, the electrode extension 188b is in direct contact with the first nitride semiconductor layer 152 and electrically connected thereto, and the upper electrode 188a is not in direct contact with the first nitride semiconductor layer 152. It may be electrically connected through the electrode extension 188b.

In this case, one or more electrode extensions 188b may be formed. That is, in the present embodiment, it is illustrated as having two electrode extensions 188b, but only one may be provided, and three or more electrode extensions 188b may be provided.

Subsequently, as shown in FIG. 12, a support substrate separation process for separating the support substrate 170 or a separation process for separating the support substrate 170 and the nitride semiconductor layer 150 provided thereon are performed. A plurality of the same light emitting diode chip can be manufactured.

14 to 21 are cross-sectional views illustrating a method of separating a growth substrate from a nitride semiconductor layer according to another embodiment of the present invention.

FIG. 22 is a cross-sectional view illustrating a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another exemplary embodiment of the present disclosure.

23 is a conceptual diagram illustrating an embodiment in which a stripe pattern is formed on one surface of a growth substrate.

Referring to FIG. 14, in the method of separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present disclosure, first, the growth substrate 210 is prepared.

Subsequently, a stripe pattern 212 is formed on one surface of the growth substrate 210.

The stripe pattern 212 may be formed by etching one surface of the growth substrate 210 to a predetermined depth to form a groove including a bottom surface 212a and an inclined surface 212b.

The stripe pattern 212 may be formed by forming a mask pattern on one surface of the growth substrate 210 and performing dry etching.

방향과 60 내지 90도 방향(도 23의 (a)에서는 90도 방향인 것을 도시)이 되도록 형성한다.In this case, as illustrated in FIG. 23A, when the growth substrate 210 is a sapphire substrate, the stripe pattern 212 may be formed of the sapphire substrate.

Direction and the 60-90 degree direction (FIG. 23 (a) shows a 90 degree direction).

방향과 60도 방향이 되도록 형성한다.In addition, as shown in FIG. 23B, when the growth substrate 210 is a GaN substrate, the stripe pattern 212 may be formed of the GaN substrate.

It is formed to be in the direction and 60 degrees direction.

This is because when the sacrificial layer 220 is epitaxially grown on the growth substrate 210 on which the stripe pattern 212 is formed, the sacrificial layer 220 is formed from the surfaces of the growth substrate 210 on both sides of the stripe pattern 212. This is because a portion of the portion grows, and portions of the grown sacrificial layer 220 are laterally grown to combine into one layer to form the sacrificial layer 220. That is, when the stripe pattern 212 is formed in the direction as described above, the sacrificial layer 220 is merged well.

Next, a growth inhibitory layer 214 is formed on the bottom surface 212a of the stripe pattern 212. This is because when the sacrificial layer 220 is grown on the growth substrate 210, the sacrificial layer 220 does not grow on the inclined surface 212b of the stripe pattern 212, but the stripe pattern 212 This is to prevent this because growth can be made on the bottom surface 212a of the.

The growth inhibitory layer 214 may be formed of an insulating material such as silicon oxide or silicon nitride.

Referring to FIG. 15, the sacrificial layer 220 is grown on the growth substrate 210 on which the stripe pattern 212 is formed.

The sacrificial layer 220 is charged into the growth substrate 210 after the growth substrate 210 is charged into the chamber of the epitaxial growth apparatus such as MOCVD. The sacrificial layer 220 may include GaN doped with impurities, preferably n-GaN doped with high concentration of n-type impurities.

When the sacrificial layer 220 is formed, the sacrificial layer formed on the growth suppression layer 214 is controlled by controlling the growth conditions of the sacrificial layer 220, that is, the flow rate, growth temperature, or growth pressure of the injected gases. Some surfaces 222 of the 220 are formed to be uniform. This is because if the side surface 222 of the sacrificial layer 220 is not uniform while the sacrificial layer 220 is laterally grown, the etching becomes uneven in the sacrificial layer 220, and thus, the growth of the growth substrate 210. This is because the separation may not be easy.

In the present embodiment, when the stripe pattern 212 is formed by dry etching, the growth suppression layer 214 is required to suppress the growth on the bottom surface 212a of the stripe pattern 212. When the unevenness is formed on the bottom surface 212a or when the depth of the bottom surface 212a of the stripe pattern 212 is deep, it may not be necessary to form the growth suppression layer 214.

When the sacrificial layer 220 is formed, growth is not generated on the bottom surface 212a when the unevenness is formed on the bottom surface 212a, and when the depth of the bottom surface 212a is deep. Not only does growth not occur well, but growth does not affect the sacrificial layer 220.

Referring to FIG. 16, a plurality of micropores 230 are formed in the sacrificial layer 220.

The micropores 230 may have the same shape as the micropores 130 including the first micropores 132 and the second micropores 134 described with reference to FIGS. 2, 8, and 9. Therefore, detailed description of forming the micropores 230 will be omitted.

Referring to FIG. 17, an insulating pattern 240 is formed on the sacrificial layer 220.

The insulating pattern 240 may be formed of an insulating material such as silicon oxide or silicon nitride.

The insulating pattern 240 may have an open area in the form of a stripe or a mesh.

Subsequently, a plurality of nitride semiconductor layers 250 are formed on the sacrificial layer 220 on which the insulating pattern 240 is formed.

The plurality of nitride semiconductor layers 250 may be formed by remounting the growth substrate 210 in a chamber of an epitaxial growth apparatus such as MOCVD and the like, and then regrowing the growth substrate 210.

That is, the plurality of nitride semiconductor layers 250 may be formed by epitaxially growing from the surface of the sacrificial layer 220 exposed by the open region of the insulating pattern 240.

In this case, the fine pores 230 of the sacrificial layer 220 may be formed of a plurality of cavities 260 when the plurality of nitride semiconductor layers 250 are epitaxially grown.

The plurality of cavities 260 may be formed by combining a plurality of micro pores 230 into one, or one micro pore 230 may be formed to be expanded.

At this time, when epitaxially growing the plurality of nitride semiconductor layers 250, the size, position and number of the cavities 260 may be controlled by controlling the growth temperature of the epitaxial growth or the type and flow rate of the injected gas. .

The cavities 260 are mainly formed in an upper region of the sacrificial layer 220 (in this case, an upper region of the sacrificial layer 220 means a region close to an interface contacting the plurality of nitride semiconductor layers 250). Can be.

The cavities 260 are larger in size than those in the region of the sacrificial layer 220 that are close to the plurality of nitride semiconductor layers 250, and the plurality of nitride semiconductor layers ( The farther it is from 250), the larger the size may be provided.

Meanwhile, although FIG. 17 illustrates that the plurality of nitride semiconductor layers 250 include the first nitride semiconductor layer 252 and the second nitride semiconductor layer 254, the plurality of nitride semiconductor layers 250 may be a single layer or a plurality of three or more layers. It may consist of layers.

The first nitride semiconductor layer 252 may be a buffer layer, and the second nitride semiconductor layer 254 may be a semiconductor layer including at least an active layer.

That is, the first nitride semiconductor layer 252 may be an n-GaN layer doped with n-type impurities or a μ-GaN layer doped with impurities.

The second nitride semiconductor layer 254 may include a first type semiconductor layer (not shown), an active layer (not shown), and a second type semiconductor layer (not shown). In addition, the second nitride semiconductor layer 154 may further include a superlattice layer (not shown) or an electron breaking layer (not shown).

The first type semiconductor layer (not shown), the active layer (not shown), the second type semiconductor layer (not shown), the superlattice layer (not shown), and the electronic blocking layer (not shown) may be used in an embodiment of the present invention. Detailed description is omitted since it is described in detail.

Referring to FIGS. 18 and 19, at least the nitride semiconductor layer 250 is mesa-etched to form a mesa line 270.

The mesa line 270 is for injecting an etching solution for etching the sacrificial layer 220, and is preferably formed to be connected to at least the sacrificial layer 220.

In this embodiment, since the stripe pattern 212 is formed on one surface of the growth substrate 210, the mesa line 270 etches the nitride semiconductor layer 250 and the sacrificial layer 220. The cavities 260 and the stripe pattern 212 may be connected to each other.

When the stripe pattern 212 is not formed on the growth substrate 210 according to the present embodiment, the mesa line 270 may be provided to be connected to the cavities 260 of the sacrificial layer 220. have.

As shown in FIG. 19, the mesa line 270 may be formed over the entire growth substrate 210.

That is, when the growth substrate 210 is viewed in a plane, the mesa line 270 may be formed from one end to the other end. The mesa line 270 may be provided in a stripe shape that is repeatedly disposed in the vertical or horizontal direction on the growth substrate 210.

In addition, the mesa line 270 is repeatedly disposed in the vertical direction and the horizontal direction on the growth substrate 210 so that the mesa lines 270 in the vertical direction and the mesa lines 270 in the horizontal direction cross each other. And may be provided in a mesh form (see FIG. 19).

The mesa lines 270 may be formed to cross the stripe pattern 212. That is, the formation direction of the mesa line 270 and the formation direction of the stripe pattern 212 may be formed not to be parallel to each other.

This is to allow the mesa line 270 to be more connected to the stripe pattern 212 so that the etching solution injected through the mesa line 270 can be evenly injected onto the surface of the growth substrate 210. .

Referring to FIG. 20, the support substrate 280 is attached onto the plurality of nitride semiconductor layers 250.

The support substrate 280 may be a sapphire substrate, a GaN substrate, a glass substrate, a silicon carbide substrate, or a silicon substrate, a conductive substrate made of a metal material, a circuit board such as a PCB, or a ceramic including ceramic. It may be a substrate.

In this case, although not illustrated in FIG. 20, a bonding layer (not shown) is provided between the plurality of nitride semiconductor layers 250 and the support substrate 280 to support the plurality of nitride semiconductor layers 250 and the support substrate 280. It can also play a role of fastening.

Subsequently, a process of separating the growth substrate 210 and the nitride semiconductor layers 250 is performed.

The separation process may be performed by etching the sacrificial layer 220 by injecting an etching solution through the mesa line 270.

The etching solution is injected into the stripe pattern 212 through the mesa line 270, so that a predetermined region 224 of the sacrificial layer 220 on the stripe pattern 212 is first etched. In this case, the cross-section of the predetermined region 224 of the sacrificial layer 220 may be trapezoidal in shape. Therefore, when the insulating pattern 240 is formed, the trapezoidal etching region of the sacrificial layer 220 may be formed to have an appropriate open region.

In this case, the etching solution may be made of NaOH and H ₂ O ₂ , the etching solution may be made of NaOH: H ₂ O ₂ : ultrapure water is included in the ratio of 80: 80: 300 (unit cc). .

The etching process is performed at 60 degrees for 30 minutes to etch and separate the sacrificial layer 220. In this case, the sacrificial layer 220 is provided with the cavities 260, whereby the separation process can be easily etched by etching the sacrificial layer 220 by an etching solution.

The separation process can be modified. That is, the etching process is completed in a state in which the sacrificial layer 220 is not completely separated by a method of reducing the etching time of the etching process, and the process of applying mechanical stress to the sacrificial layer 220 is further performed. The separation process may be performed by separating the growth substrate 210.

Referring to FIG. 21, after removing the growth substrate 210 from the nitride semiconductor layer 250, a process of removing the insulating pattern 240 may be performed.

In this case, when the insulating pattern 240 is made of silicon oxide, the insulating pattern 240 may be removed by using a buffered oxide etchant (BOE).

The surface of the nitride semiconductor layer 150 is roughened by removing the insulating pattern 240, and roughened by an etching solution for etching the sacrificial layer 220 and a BOE for etching the insulating pattern 240. Can be formed.

After removing the insulating pattern 240, a step of dipping in a solution containing any one of HCl, NaOH or a mixture of H ₃ SO ₄ and H ₂ O ₂ to remove a metallic material, such as metallic Ga on the separated surface. You can also proceed further.

20 and 21 illustrate that the sacrificial layer 220 is etched with the etching solution, the growth substrate 210 is separated, and the insulating pattern 240 is removed by etching with BOE. However, the supporting substrate 210 is formed by etching the insulating pattern 240 through the stripe pattern 212 and the cavity 260 by injecting the BOE without injecting an etching solution into the mesa line 270. May be separated from the nitride semiconductor layer 250 and the process of removing the insulating pattern 240 may be performed.

As shown in FIG. 21, the third surface 256, which is the surface of the first nitride semiconductor layer 252, is exposed by etching the predetermined region 224 of the sacrificial layer 220 by the etching solution. It can be formed rough. This is because the surface of the first nitride semiconductor layer 252 is partially etched by the etching solution.

In addition, the fourth surface 258, which is the surface of the first nitride semiconductor layer 252 exposed by removing the insulating pattern 240, may have a roughness as shown in FIG. 21. This is because the fourth surface 258 is a surface exposed by the removal of the insulating pattern 240, and thus the surface is roughened by an etching solution for etching the insulating pattern 240.

In this case, the third surface 256 and the fourth surface 258 may have different roughness, because the third surface 256 and the fourth surface 258 are formed by different processes.

Referring to FIG. 22, the nitride semiconductor provided on the support substrate 280 by a method of separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present invention described with reference to FIGS. 14 to 21. The layers 250 may be used to fabricate a light emitting diode device.

That is, the nitride semiconductor layers 250 may be mesa-etched to expose a portion of the nitride semiconductor layers 250, for example, a portion of the first type semiconductor layer (not shown) of the second nitride semiconductor layer 254. Mesa etching process, a first electrode 292 and a second electrode on the nitride semiconductor layer 250 on a portion of the first type semiconductor layer (not shown) of the exposed second nitride semiconductor layer 254 The light emitting diode device may be manufactured by performing an electrode forming process of forming the 294 and a support substrate dicing process of dicing the support substrate 280 to manufacture individual light emitting diode devices.

In this case, in the light emitting diode device, the surfaces of the nitride semiconductor layers 250 are formed with unevenness 296 due to the separation of the growth substrate 210 or the removal of the insulating pattern 240. Thus, the top surface of the nitride semiconductor layers 250 on the support substrate 280 may have unevenness 296 and rough surfaces 256 and 258. For this reason, when light is extracted to the top surface of the nitride semiconductor layers 250, the light extraction efficiency may be increased.

Meanwhile, the separated growth substrate 210 may be reused after a cleaning process of removing a portion of the sacrificial layer 220 remaining on the surface thereof.

24 to 26 are perspective views and cross-sectional views illustrating another embodiment of a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another embodiment of the present invention.

24 is a cross-sectional view taken along the line AA ′ of FIG. 25, and FIG. 26 is a cross-sectional view taken along the line B-B ′ of FIG. 25.

Referring to FIG. 24, the nitride semiconductor provided on the support substrate 280 by a method of separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present invention described with reference to FIGS. 14 to 21. The layers 250 may be used to fabricate a light emitting diode device.

In other words, an interlayer insulating layer 242 is formed on the support substrate 280 including the nitride semiconductor layer 250.

In this case, the nitride semiconductor layer 250 may be provided on the support substrate 280 while being separated into a plurality by the mesa line 270.

The interlayer insulating layer 242 may include an opening 244. The opening 144 may be provided only in an area in which the electrode extension 298b to be described later will be formed.

The interlayer insulating layer 242 may be provided to protect the lower nitride semiconductor layer 250, in particular, the uppermost first nitride semiconductor layer 252. Of course, the interlayer insulating layer 242 may be omitted as necessary.

Referring to FIGS. 25 and 26, the upper electrode portion 298 is formed on the support substrate 280 on which the interlayer insulating layer 242 having the opening 244 is formed.

The upper electrode 298a of the upper electrode portion 298 is formed on the interlayer insulating layer 242, and the electrode extension part 298b is formed in the opening 244 of the interlayer insulating layer 242.

Therefore, the electrode extension part 298b is in direct contact with the first nitride semiconductor layer 252 and electrically connected thereto, and the upper electrode 298a is not in direct contact with the first nitride semiconductor layer 252. It may be electrically connected through the electrode extension 298b.

In this case, one or more electrode extensions 298b may be formed. That is, in the present exemplary embodiment, two electrode extensions 298b are illustrated, but only one may be provided, and three or more electrode extensions 298b may be provided.

Subsequently, a plurality of light emitting diode chips as illustrated in FIG. 25 may be manufactured by performing a support substrate separation process of separating the support substrate 280.

27 is a cross-sectional view illustrating a method of separating a growth substrate from a nitride semiconductor layer according to another embodiment of the present invention.

Referring to FIG. 27, a method of separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present invention is the growth substrate and the nitride semiconductor according to another embodiment of the present invention described with reference to FIGS. 14 to 21. Compared to the method of separating the layers, the stripe pattern 212 ′ is provided on one surface of the growth substrate 210, but the cross-sectional shape is different.

At this time, the cross-sectional shape of the stripe pattern 212 ′ is substantially V-shaped, but one of the inclined surfaces is less inclined, so the length of the inclined surfaces is long.

The stripe pattern 212 ′ may be formed by etching the growth substrate 210 by wet etching. That is, the stripe pattern 212 ′ may be formed according to the crystallographic characteristics of the growth substrate 210.

When the growth substrate 210 is a c-plane (0001) sapphire substrate, when the growth substrate 210 is wet etched to form the stripe pattern 212 ', the stripe pattern 212' is a sacrificial layer. The c-plane, that is, the (0001) plane, which is the surface on which 220 is grown, is not exposed, and other faces are exposed.

In addition, in the method of separating the growth substrate and the nitride semiconductor layer according to the present embodiment and another embodiment of the present invention described with reference to FIGS. 14 to 21, the inclined surfaces of the stripe pattern 212 ′ are not exposed to the c-plane. As a result, growth does not occur on the inclined surface of the stripe pattern 212 ′, and there is a difference that a growth prevention layer may not be provided inside the stripe pattern 212 ′.

Therefore, in the method of separating the growth substrate and the nitride semiconductor layer according to the present embodiment, except for the method of forming the stripe pattern 212 ′ on one surface of the growth substrate 210, the sacrificial layer is formed on the growth substrate 210. Since the process including growing the step 220 is the same as the method for separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present invention described with reference to FIGS. 14 to 21 will not be described in detail.

28 to 33 are cross-sectional views illustrating a method of separating a growth substrate from a nitride semiconductor layer according to another embodiment of the present invention.

34 is a cross-sectional view illustrating a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another exemplary embodiment of the present disclosure.

Referring to FIG. 28, in the method of separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present invention, first, the growth substrate 310 is prepared.

Subsequently, a stripe pattern 312 is formed on one surface of the growth substrate 310.

The stripe pattern 312 may be formed by etching one surface of the growth substrate 310 to a predetermined depth to form a groove including a bottom surface 312a and an inclined surface 312b.

The stripe pattern 312 may be formed by forming a mask pattern on one surface of the growth substrate 310 and performing dry etching.

Although not illustrated in FIG. 28, the stripe pattern 312 may be formed as the stripe pattern 212 ′ etched by the wet etching described with reference to FIG. 27.

In this case, since the stripe pattern 312 is the same as the stripe pattern 212 described above in another embodiment of the present invention, a detailed description thereof will be omitted.

Next, a growth suppression layer 314 is formed on the bottom surface 312a of the stripe pattern 312. Since the growth suppression layer 314 is the same as the growth suppression layer 214 described above in another embodiment of the present invention, a detailed description thereof will be omitted.

Subsequently, the sacrificial layer 320 is grown on the growth substrate 310 on which the stripe pattern 312 is formed.

When the sacrificial layer 320 is formed, the sacrificial layer formed on the growth suppression layer 314 by controlling the growth conditions of the sacrificial layer 320, that is, the flow rate, growth temperature, or growth pressure of the injected gases. Some surfaces 322 of 320 are formed to be uniform. This is because if the side surface 322 of the sacrificial layer 320 is not uniform while the sacrificial layer 320 is laterally grown, the etching causes the etching of the sacrificial layer 320 to be uneven. This is because the separation may not be easy.

Since the sacrificial layer 320 is the same as the sacrificial layer 220 described above in another embodiment of the present invention, a detailed description thereof will be omitted.

Subsequently, an insulating pattern 340 is formed on the sacrificial layer 320.

The insulating pattern 340 may serve to control the formation position or formation direction of the micropores 330 in forming the micropores 330 as described later.

The insulating pattern 340 may be formed to appropriately form a surface thereof so that the surface modification of the nitride semiconductor layer 352 formed thereon may be well formed.

The insulating pattern 340 may be formed of an insulating material such as silicon oxide or silicon nitride.

The insulating pattern 340 may have an open area in the form of a stripe or a mesh.

Referring to FIG. 29, a plurality of micropores 330 are formed in the sacrificial layer 320.

In this case, the micropores 330 may be formed to a predetermined depth from the surface of the sacrificial layer 320 exposed by the insulating pattern 340. That is, as shown in FIG. 29, the sacrificial layer 320 may be formed not only under the exposed region but also under the edge of the insulating pattern 340.

This is because the fine pores 330 are formed not only in a direction perpendicular to the surface of the sacrificial layer 320 but also in a direction not perpendicular to the surface of the sacrificial layer 320, that is, in an oblique direction.

The micropores 330 may have the same shape as the micropores 130 including the first micropores 132 and the second micropores 134 described with reference to FIGS. 2, 9, and 10.

Therefore, detailed description of forming the micropores 330 will be omitted.

Referring to FIG. 30, a plurality of nitride semiconductor layers 350 are formed on the sacrificial layer 320 on which the insulating pattern 340 is formed.

The plurality of nitride semiconductor layers 350 may be formed by re-growing the growth substrate 310 in a chamber of an epitaxial growth apparatus such as MOCVD.

That is, the plurality of nitride semiconductor layers 350 may be formed by growing from the surface of the sacrificial layer 320 exposed by the open region of the insulating pattern 340.

In this case, the fine pores 330 of the sacrificial layer 320 may be formed by extending into a plurality of cavities 360 when the plurality of nitride semiconductor layers 350 are grown.

The plurality of cavities 360 may be formed by combining a plurality of fine pores 330 into one, or may be formed by growing one fine pore 330.

At this time, when epitaxially growing the plurality of nitride semiconductor layers 350, the size, position and number of the cavity 360 may be controlled by controlling the growth temperature of the epitaxial growth or the type and flow rate of the injected gas. .

As shown in FIG. 30, the cavities 360 have a predetermined region of the sacrificial layer 320 exposed by the insulating pattern 340 and the sacrificial layer 320 below the edge of the insulating pattern 340. It may be disposed in a substantially 'U' shape over a certain area. This is because the micropores 330 are formed in an oblique direction as well as the direction perpendicular to the surface of one side of the sacrificial layer 320 is formed in a similar shape.

In FIG. 30, the plurality of nitride semiconductor layers 350 include the first nitride semiconductor layer 352 and the second nitride semiconductor layer 354, but may be a single layer or a plurality of three or more layers. It may consist of layers.

The plurality of nitride semiconductor layers 350 including the first nitride semiconductor layer 352 and the second nitride semiconductor layer 354 may include the first nitride semiconductor layer 252 and the first nitride semiconductor layer 252 described above in another embodiment of the present invention. Since the plurality of nitride semiconductor layers 250 including the two nitride semiconductor layers 254 are the same, detailed description thereof will be omitted.

Referring to FIG. 31, mesa etching is performed on at least the nitride semiconductor layer 350 to form a mesa line 370.

The mesa line 370 is to inject an etching solution for etching the sacrificial layer 320 and is preferably formed to be connected to at least the sacrificial layer 320.

In this embodiment, since the stripe pattern 312 is formed on one surface of the growth substrate 310, the mesa line 370 etches the nitride semiconductor layer 350 and the sacrificial layer 320. The cavity 360 and the stripe pattern 312 may be connected to each other.

When the stripe pattern 312 is not formed on the growth substrate 310 according to the present exemplary embodiment, the mesa line 370 may be provided to be connected to the cavities 360 of the sacrificial layer 320. have.

Since the mesa line 370 is the same as the mesa line 270 described above in another embodiment of the present invention, a detailed description thereof will be omitted.

Subsequently, the support substrate 380 is attached onto the plurality of nitride semiconductor layers 350.

The support substrate 380 may be a sapphire substrate, a GaN substrate, a glass substrate, a silicon carbide substrate, or a silicon substrate, a conductive substrate made of a metal material, a circuit board such as a PCB, or a ceramic including ceramic. It may be a substrate.

Although not illustrated in FIG. 31, a bonding layer (not shown) is provided between the plurality of nitride semiconductor layers 350 and the support substrate 380 to support the plurality of nitride semiconductor layers 350 and the support substrate 380. It can also play a role of fastening.

Referring to FIG. 32, a process of separating the growth substrate 310 and the nitride semiconductor layer 350 is performed.

The separation process may be performed by etching the sacrificial layer 320 by injecting an etching solution through the mesa line 370.

The etching solution is injected into the stripe pattern 312 through the mesa line 370, so that a predetermined region 324 of the sacrificial layer 320 positioned on the stripe pattern 312 is first etched. In this case, the cross-section of the predetermined region 324 of the sacrificial layer 320 to be etched may have a trapezoidal shape. Therefore, when the insulating pattern 340 is formed, it may be formed to have an appropriate open area in consideration of the trapezoidal etching area of the sacrificial layer 320.

The process of separating the growth substrate 310 by etching the sacrificial layer 320 using the etching solution is described in detail with reference to FIG. 20 in another embodiment of the present invention, and thus a detailed description thereof will be omitted.

Referring to FIG. 33, after removing the growth substrate 310 from the nitride semiconductor layer 350, a process of removing the insulating pattern 340 may be performed.

In this case, the process of removing the insulating pattern 340 and the modification of the removal of the sacrificial layer 320 and the removal of the insulating pattern 340 are described in detail with reference to FIG. 21 in another embodiment of the present invention. Detailed description will be omitted.

After removing the insulating pattern 340, a step of dipping in a solution containing any one of HCl, NaOH or a mixture of H ₃ SO ₄ and H ₂ O ₂ to remove a metallic material, such as metallic Ga on the separated surface. You can also proceed further.

The fifth surface 356, which is the surface of the first nitride semiconductor layer 352 exposed by etching the predetermined region 324 of the sacrificial layer 320 by the etching solution, has a roughness as shown in FIG. 32. It can be formed rough. This is because the fifth surface 356 is partially etched from the surface of the first nitride semiconductor layer 352 by the etching solution.

In addition, the sixth surface 358, which is the surface of the first nitride semiconductor layer 352 exposed by removing the insulating pattern 340, may have a roughness as shown in FIG. 33. This is because the sixth surface 358 is a surface exposed by removing the insulating pattern 340, and thus the surface is roughened by an etching solution or the like that etches the insulating pattern 340.

In this case, the fifth surface 356 and the sixth surface 358 may have different roughness, since the fifth surface 356 and the sixth surface 358 are formed by different processes.

Referring to FIG. 34, the nitride provided on the support substrate 380 by a method of separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present invention described with reference to FIGS. 28 to 33. The light emitting diode device may be manufactured using the semiconductor layers 350.

That is, the nitride semiconductor layers 350 are mesa-etched to expose a portion of the nitride semiconductor layers 350, for example, a portion of the first type semiconductor layer (not shown) of the second nitride semiconductor layer 354. Mesa etching process, a first electrode 392 and a second electrode on the nitride semiconductor layer 350 on a portion of the first type semiconductor layer (not shown) of the exposed second nitride semiconductor layer 354 The light emitting diode device may be manufactured by performing an electrode forming process of forming the 394 and a support substrate dicing process of dicing the support substrate 380 to manufacture individual light emitting diode devices.

In this case, in the light emitting diode device, the surfaces of the nitride semiconductor layers 3350 are formed with unevenness 396 due to the separation of the growth substrate 310 or the removal of the insulating pattern 340. Therefore, the surface of the nitride semiconductor layers 350 on the support substrate 380 includes the unevenness 396 and the rough surfaces 356 and 358. For this reason, when light is extracted to the top surface of the nitride semiconductor layers 350, the light extraction efficiency may be increased.

Meanwhile, the separated growth substrate 310 may be reused after the cleaning process of removing a portion of the sacrificial layer 320 remaining on the surface thereof.

35 to 37 are perspective views and cross-sectional views showing another embodiment of a light emitting diode device including a nitride semiconductor layer separated by a method of separating a growth substrate and a nitride semiconductor layer according to another embodiment of the present invention.

35 is a cross-sectional view taken along the line AA ′ of FIG. 36, and FIG. 37 is a cross-sectional view taken along the line B-B ′ of FIG. 36.

Referring to FIG. 35, the nitride provided on the support substrate 380 by a method of separating the growth substrate and the nitride semiconductor layer according to another embodiment of the present invention described with reference to FIGS. 28 to 33. The light emitting diode device may be manufactured using the semiconductor layers 350.

In other words, an interlayer insulating layer 342 is formed on the support substrate 380 including the nitride semiconductor layer 350.

In this case, the nitride semiconductor layer 350 may be provided on the support substrate 380 while being separated into a plurality by the mesa line 370.

The interlayer insulating layer 342 may include an opening 344. The opening 344 may be provided only in an area in which the electrode extension 298b described later will be formed.

The interlayer insulating layer 342 may be provided to protect the lower nitride semiconductor layer 350, particularly, the uppermost first nitride semiconductor layer 352. Of course, the interlayer insulating layer 342 may be omitted as necessary.

Referring to FIGS. 36 and 37, the upper electrode part 398 is formed on the support substrate 380 on which the interlayer insulating layer 342 having the opening 344 is formed.

An upper electrode 398a of the upper electrode part 398 is formed on the interlayer insulating film 342, and the electrode extension part 398b is formed in the opening 344 of the interlayer insulating film 342.

Accordingly, the electrode extension 398b is in direct contact with the first nitride semiconductor layer 352 and electrically connected thereto, and the upper electrode 398a does not directly contact the first nitride semiconductor layer 352. It may be electrically connected through the electrode extension 398b.

In this case, one or more electrode extensions 398b may be formed. That is, in the present embodiment, it is illustrated as having two electrode extensions 398b, but only one may be provided, and three or more electrode extensions 398b may be provided.

Subsequently, a plurality of light emitting diode chips as illustrated in FIG. 36 may be manufactured by performing a support substrate separation process of separating the support substrate 380.

The present invention has been described above with reference to the above embodiments, but the present invention is not limited thereto. Those skilled in the art will appreciate that modifications and variations can be made without departing from the spirit and scope of the present invention and that such modifications and variations also fall within the present invention.

110, 210, 310: growth substrate 120, 220, 320: sacrificial layer
130, 230, 330: a plurality of fine pores 140, 240, 340: insulation pattern
150, 250, 350: a plurality of nitride semiconductor layers 160, 260, 360: a plurality of cavities
270, 370: mesa lines 170, 280, 380: support substrate

Claims (20)

Preparing a growth substrate;
Growing a sacrificial layer on one surface of the growth substrate;
Forming a plurality of fine pores in the sacrificial layer;
Forming a plurality of cavities from the plurality of micropores; And
And separating the growth substrate using the plurality of cavities.
The method according to claim 1, before or after forming the plurality of micropores,
And forming an insulating pattern on the surface of the sacrificial layer.
The method of claim 1, wherein the forming of the plurality of cavities from the plurality of micropores comprises: growing a plurality of nitride semiconductor layers on the sacrificial layer, and forming a plurality of cavities from the plurality of micropores while the nitride semiconductor layers are grown. The method of separating the nitride semiconductor layer and the growth substrate is formed.
The method of claim 1, wherein preparing the growth substrate comprises forming a stripe pattern on one surface of the growth substrate.
The method of claim 4, wherein the stripe pattern is formed by etching one surface of the growth substrate by dry etching or wet etching.
The method of claim 5, wherein the forming of the stripe pattern comprises dry etching one surface of the growth substrate to form the stripe pattern on one surface of the growth substrate, and then forming a growth suppression layer on a bottom surface of the stripe pattern. A nitride semiconductor layer and a growth substrate separation method comprising the step of forming.
The method of claim 4, wherein when the growth substrate is a sapphire substrate, the stripe pattern is formed of the sapphire substrate.

Direction and in the 60-90 degree direction,
When the growth substrate is a GaN substrate, the stripe pattern is formed of the GaN substrate.

Direction and a nitride semiconductor layer and a growth substrate separation method formed in a 60 degree direction.
The method of claim 1, wherein the sacrificial layer comprises n-GaN.
The method of claim 8, wherein the sacrificial layer comprises at least two layers having n impurity concentrations different from each other.
The method of claim 1, wherein the plurality of micropores are formed by an electrochemical etching (ECE) process.
The method of claim 10, wherein the plurality of micropores are formed by applying at least two steps of voltage, and the first applied voltage is lower than the voltage applied later.
The method of claim 1, wherein separating the growth substrate using the plurality of cavities:
Forming nitride semiconductor layers on the sacrificial layer;
Attaching a support substrate on the nitride semiconductor layers; And
And separating the growth substrate and the nitride semiconductor layers by applying mechanical stress to the sacrificial layer.
The method of claim 1, wherein separating the growth substrate using the plurality of cavities:
Forming nitride semiconductor layers on the sacrificial layer;
Etching the nitride semiconductor layers and the sacrificial layer by mesa etching to form mesa lines connected to at least the cavities;
Attaching a support substrate on the nitride semiconductor layers; And
And injecting an etching solution into the mesa line to etch the sacrificial layer to separate the growth substrate and the nitride semiconductor layers.
The method of claim 13, wherein the growth substrate includes a stripe pattern on one surface thereof, and the mesa line is connected to the stripe pattern.
The method of claim 14, wherein the mesa line and the stripe pattern cross each other so that the direction of the mesa line and the stripe pattern are not parallel to each other.
The method of claim 12 or 13, after separating the growth substrate and nitride semiconductor layers,
Removing the insulating pattern; and separating the nitride semiconductor layer and the growth substrate.
A support substrate; And
It includes a plurality of semiconductor layers provided on the support substrate,
The top of the plurality of semiconductor layers has a light emitting diode device having an uneven and rough surface.
The light emitting diode device of claim 17, wherein the rough surface includes two surfaces having different roughnesses.
The light emitting diode device according to claim 18, wherein one of two surfaces having different roughness is a surface of the unevenness.
The light emitting diode device of claim 18, wherein one of two surfaces having different roughness is a surface formed by breaking of a layer including a cavity.

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