CN114497293A - Preparation stripping method of epitaxial layer and preparation method of semiconductor device - Google Patents

Preparation stripping method of epitaxial layer and preparation method of semiconductor device Download PDF

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CN114497293A
CN114497293A CN202111643318.8A CN202111643318A CN114497293A CN 114497293 A CN114497293 A CN 114497293A CN 202111643318 A CN202111643318 A CN 202111643318A CN 114497293 A CN114497293 A CN 114497293A
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growth process
layer
epitaxial layer
substrate
semiconductor device
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常娟雄
黄永
汪琼
陈财
刘晓磊
邵语嫣
程晨言
王宇轩
李梹激
许琦辉
王霄
杨旭豪
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Wuhu Research Institute of Xidian University
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Wuhu Research Institute of Xidian University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates

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  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses a preparation stripping method of an epitaxial layer and a preparation method of a semiconductor device, wherein the preparation stripping method of the epitaxial layer comprises the following steps: providing a substrate, and growing a sacrificial layer on the substrate by adopting a first growth process and a second growth process in sequence; the sacrificial layer comprises a hole part grown under a first growth process and a flat part grown under a second growth process; growing an epitaxial layer on the flat part; etching the sacrificial layer by using etching liquid, and stripping the epitaxial layer from the substrate; the etching liquid can enter the holes in the hole part for etching. By implementing the method, the epitaxial layer stripping efficiency in the method is ensured while the problem that laser stripping influences the quality of the epitaxial layer and the substrate is solved by adopting etching liquid (wet etching) to carry out epitaxial layer stripping.

Description

Preparation stripping method of epitaxial layer and preparation method of semiconductor device
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a preparation stripping method of an epitaxial layer and a preparation method of a semiconductor device.
Background
The third generation Semiconductor material, namely, the Wide Band Gap Semiconductor (WBGS) Semiconductor material is developed following the first generation silicon, germanium, the second generation gallium arsenide, indium phosphide and the like, and is developed and developed along with higher requirements and more severe conditions, so that the application under extreme conditions of high temperature, high frequency, high power, strong radiation, full wavelength and the like is realized.
Among the third generation semiconductor materials, gallium nitride (GaN) is crucial to the development of semiconductor devices, and has excellent properties such as wide band gap, direct band gap, high breakdown electric field, low dielectric constant, high electron saturation drift velocity, strong radiation resistance, and good chemical stability, and thus becomes a key semiconductor material for manufacturing new-generation microelectronic devices and integrated circuits following silicon, germanium, and gallium arsenide. The GaN-based LED, the GaN laser and the like are industrialized, and due to the characteristics of high brightness, low energy consumption, thin volume, long service life and the like, great convenience is brought to social production and life. The applicability of gallium nitride under extreme conditions makes it a key basic material for the continued development of microelectronics, power electronics, optoelectronics and other high and new technologies, as well as national defense industry, information industry, electromechanical industry, energy industry and other pillar industries after the 21 st century.
Commercial GaN is often grown epitaxially on sapphire or silicon substrates due to the high cost of silicon carbide and gallium nitride substrates and laser lift-off is commonly used to separate the substrate and epitaxial layers to obtain free, unsupported epitaxial gallium nitride films. When laser is stripped, laser irradiates the interface between the substrate and the epitaxial layer, the high energy of the laser is absorbed by the GaN crystal, so that the GaN crystal is rapidly heated and gasified, the instantaneously generated high temperature is difficult to be dissipated by the substrate with poor heat conductivity, and a large number of defects can be generated due to the large thermal mismatch between the substrate and the epitaxial layer, thereby influencing the crystal quality and even damaging the epitaxial film.
Disclosure of Invention
Therefore, the present invention is directed to a method for manufacturing an epitaxial layer and a method for manufacturing a semiconductor device, so as to overcome the shortcomings of the prior art.
To this end, according to a first aspect, the invention provides a method for preparing and stripping an epitaxial layer, comprising the following steps:
providing a substrate, and growing a sacrificial layer on the substrate by adopting a first growth process and a second growth process in sequence; the sacrificial layer comprises a hole part grown under a first growth process and a flat part grown under a second growth process;
growing an epitaxial layer on the flat part;
etching the sacrificial layer by using etching liquid, and stripping the epitaxial layer from the substrate; the etching liquid can enter the holes in the hole part for etching.
Further, the first growth process and the second growth process are both carried out in the chemical vapor deposition reaction chamber, the temperature in the first growth process is lower than that in the second growth process, and the pressure in the first growth process is higher than that in the second growth process.
Further, the growth of the epitaxial layer is carried out in a chemical vapor deposition reaction chamber.
Furthermore, the epitaxial layer is a GaN layer, and the sacrificial layer is an N-type doped GaN layer.
Further, the temperature in the first growth process is 500-900 ℃, and the pressure is 200-600 torr; the temperature in the second growth process is 900-1200 ℃, and the pressure is 40-200 torr.
According to a second aspect, the present invention provides a method of manufacturing a semiconductor device, comprising the steps of:
providing a substrate, and growing a sacrificial layer on the substrate by adopting a first growth process and a second growth process in sequence; the sacrificial layer comprises a hole part grown under a first growth process and a flat part grown under a second growth process;
growing an epitaxial layer on the flat part;
growing a semiconductor device functional layer on the epitaxial layer;
etching the sacrificial layer by using etching liquid, and stripping the epitaxial layer from the substrate; the etching liquid can enter the holes in the hole part for etching.
Further, the first growth process and the second growth process are both carried out in the chemical vapor deposition reaction chamber, the temperature in the first growth process is lower than that in the second growth process, and the pressure in the first growth process is higher than that in the second growth process.
Further, the preparation method of the semiconductor device further comprises the following steps: the epitaxial layer and the semiconductor device functional layer thereon are disposed on a target substrate.
Further, the semiconductor device layer includes a first semiconductor layer, a second semiconductor layer, a gate electrode, a source electrode and a drain electrode; a heterojunction is formed between the first semiconductor layer and the second semiconductor layer.
Further, the semiconductor device layer includes a light emitting layer and an electrode layer.
The technical scheme provided by the invention has the following advantages:
1. according to the preparation stripping method of the epitaxial layer, the hole part in the sacrificial layer is formed by adopting the first growth process, so that when the sacrificial layer is etched by using etching liquid subsequently to strip the epitaxial layer, the etching liquid can enter the hole part, the contact area of the etching liquid and the sacrificial layer is increased, the etching progress is improved, namely the stripping efficiency of the epitaxial layer is improved, the method can solve the problem that the quality of the epitaxial layer and a substrate is influenced by laser stripping by adopting the etching liquid (wet etching) to strip the epitaxial layer, and meanwhile, the stripping efficiency of the epitaxial layer in the method is ensured; and the leveling part in the sacrificial layer is formed by adopting the second growth process, so that a leveling substrate can be provided for the growth of the subsequent epitaxial layer, and the influence of holes in the sacrificial layer on the growth quality of the sacrificial layer can be prevented.
2. According to the preparation method of the semiconductor device, the sacrificial layer is grown on the substrate (initial substrate), so that the preparation of the high-quality epitaxial layer and the semiconductor device functional layer on the substrate (initial substrate) can be realized, the substrate can be stripped under the conditions of small stripping damage and high stripping efficiency of the epitaxial layer and the semiconductor device functional layer, the preparation of the substrate-free semiconductor device is realized, or the preparation for the subsequent transfer of the epitaxial layer and the semiconductor device to the target substrate is realized.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart illustrating steps of a method for manufacturing an epitaxial layer according to an embodiment of the present invention;
fig. 2 is a flowchart illustrating method steps of a method for manufacturing a semiconductor device according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, which are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Example 1
The embodiment provides a preparation and stripping method of an epitaxial layer, as shown in fig. 1, the method includes the following steps:
s101: providing a substrate, and growing a sacrificial layer on the substrate by sequentially adopting a first growth process and a second growth process.
In the present application, the sacrificial layer includes a hole portion grown by the first growth process and a flat portion grown by the second growth process.
In the present application, the substrate may be a silicon substrate or an SOI substrate, and may be a composite substrate in which a top layer structure formed by performing heat treatment, carbonization, or epitaxial growth on the top of the silicon substrate or the SOI substrate is silicon carbide, that is, it may also be a SiC-on-Si substrate or a SiC-on-SOI substrate or a SiC substrate.
Specifically, the growth of the hole portion and the leveling portion (i.e., the first growth process and the second growth process) may be set corresponding to the material of the sacrificial layer, for example, when the epitaxial layer is a GaN layer, in order to reduce thermal mismatch and lattice mismatch between the epitaxial layer and the substrate, the sacrificial layer may be set as an N-type doped GaN layer, at this time, both the first growth process and the second growth process may be set in a chemical vapor deposition reaction chamber, the temperature in the first growth process is lower than the temperature in the second growth process, and the pressure in the first growth process is higher than the pressure in the second growth process (i.e., the first growth process may be set as low-temperature high-pressure growth, and the second growth process is high-temperature low-pressure growth), for example, the temperature in the first growth process may be set to be 500-900 ℃ and the pressure may be set to be 200 torr; the temperature in the second growth process is 900-. Certainly, the sacrificial layer is configured as a P-type doped GaN layer, and both the first growth process and the second growth process need to be correspondingly configured, which is not limited herein.
Specifically, the sacrificial layer may be set to be a thinner structural layer, for example, the thickness of the sacrificial layer may be set to be 500nm to 2um, and at this time, the thickness of the epitaxial layer described below may be set to be 1um to 8 um.
In this application, the growth of the hole portion and the planarization portion of the sacrificial layer can be performed in the cvd reactor, and at this time, the temperature and pressure conditions of the cvd reactor corresponding to the growth of the hole portion and the planarization portion need to be set respectively. When the sacrificial layer is a doped structure layer, the chemical vapor deposition reaction chamber is required to be provided with a corresponding doping atmosphere, for example, when the sacrificial layer is an N-type doped GaN layer, the chemical vapor deposition reaction chamber can be provided to be introduced with a doping atmosphere containing silicon elements.
S102: and growing an epitaxial layer on the flat part.
In the present application, the specific material and the specific thickness of the epitaxial layer may be set according to the requirements in specific application scenarios. In particular, it may be a GaN layer, and it may also be grown in a chemical vapor deposition reaction chamber, thereby reducing the overall growth cost of the epitaxial layer in this embodiment.
S103: etching the sacrificial layer by using etching liquid, and stripping the epitaxial layer from the substrate; the etching liquid can enter the holes in the hole part for etching.
In this application, after the etching of the sacrificial layer, that is, the stripping of the epitaxial layer, is completed by using an etching solution, it is of course possible to further clean by using a BOE solution or a TMAH solution, which is not limited herein.
In addition, it should be noted that the method for etching the sacrificial layer in the present application is only limited to wet etching using an etching solution, but the specific type is not limited thereto, for example, it may be conventional wet etching (chemical etching), or may be electrochemical etching or etching with a confined etchant layer technology.
According to the preparation stripping method of the epitaxial layer, the hole part in the sacrificial layer is formed by adopting the first growth process, so that when the sacrificial layer is etched by using etching liquid subsequently to strip the epitaxial layer, the etching liquid can enter the hole part, the contact area of the etching liquid and the sacrificial layer is increased, the etching progress is improved, namely the stripping efficiency of the epitaxial layer is improved, the method can solve the problem that the quality of the epitaxial layer and a substrate is influenced by laser stripping by adopting the etching liquid (wet etching) to strip the epitaxial layer, and meanwhile, the epitaxial layer stripping efficiency in the method is ensured; and the leveling part in the sacrificial layer is formed by adopting the second growth process, so that a leveling substrate can be provided for the growth of the subsequent epitaxial layer, and the influence of holes in the sacrificial layer on the growth quality of the sacrificial layer is prevented.
Example 2
The present embodiment provides a method for manufacturing a semiconductor device, which includes the method for manufacturing and stripping the epitaxial layer in embodiment 1, and corresponding steps can be understood with reference to the content in embodiment 1, which is not described again in this embodiment; specifically, as shown in fig. 2, the method includes the steps of:
s201: providing a substrate, and growing a sacrificial layer on the substrate by sequentially adopting a first growth process and a second growth process.
In the present application, the sacrificial layer includes a hole portion grown by the first growth process and a flat portion grown by the second growth process.
In this application, the first growth process and the second growth process may both be performed in a chemical vapor deposition reaction chamber, the temperature in the first growth process is lower than the temperature in the second growth process, and the pressure in the first growth process is higher than the pressure in the second growth process (that is, the first growth process may be low-temperature high-pressure growth, and the second growth process may be high-temperature low-pressure growth).
S202: and growing an epitaxial layer on the flat part.
S203: and growing a functional layer of the semiconductor device on the epitaxial layer.
The semiconductor device in the present application may be any one of the existing semiconductor devices that can be prepared on the basis of an epitaxial layer, and the functional layer of the external conductor device in this step may be any one of the corresponding ones. Specifically, the semiconductor device in this application may be a field effect transistor (HEMT), and the semiconductor device layer grown in this step may be a first semiconductor layer, a second semiconductor layer, a gate electrode, a source electrode, and a drain electrode, and a heterojunction is formed between the first semiconductor layer and the second semiconductor layer, and of course, a gate dielectric layer, a cap layer, and the like may also be used; the semiconductor device in this application may also be a Light Emitting Device (LED), and the semiconductor device grown in this step may include a light emitting layer and an electrode layer, and may of course further include an electron blocking layer and the like.
S204: etching the sacrificial layer by using etching liquid, and stripping the epitaxial layer from the substrate; the etching liquid can enter the holes in the hole part for etching.
According to the preparation method of the conductor device, the sacrificial layer is grown on the substrate (initial substrate), so that the preparation of the high-quality epitaxial layer and the semiconductor device function layer on the substrate (initial substrate) can be realized, the substrate can be stripped under the conditions of small stripping damage and high stripping efficiency of the epitaxial layer and the semiconductor device function layer, the preparation of the substrate-free semiconductor device is realized, or the preparation for the transfer of the subsequent epitaxial layer and the semiconductor device to the target substrate is realized.
As an alternative implementation manner, as shown in fig. 2, after step S204, the method for manufacturing a semiconductor device in this embodiment may further include the following steps:
s205: the epitaxial layer and the semiconductor device functional layer thereon are disposed on a target substrate.
The target substrate may be a substrate that is thinner or lower in cost relative to the substrate, and the like, and is not limited herein.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are intended to be within the scope of the invention.

Claims (10)

1. The preparation and stripping method of the epitaxial layer is characterized by comprising the following steps:
providing a substrate, and growing a sacrificial layer on the substrate by adopting a first growth process and a second growth process in sequence; the sacrificial layer comprises a hole part grown under the first growth process and a flat part grown under the second growth process;
growing an epitaxial layer on the flat part;
etching the sacrificial layer by using etching liquid, and stripping the epitaxial layer from the substrate; the etching liquid can enter the holes in the hole part for etching.
2. The method for producing and peeling off an epitaxial layer according to claim 1, wherein the first growth process and the second growth process are both performed in a chemical vapor deposition reaction chamber, the temperature in the first growth process is lower than the temperature in the second growth process, and the pressure in the first growth process is higher than the pressure in the second growth process.
3. The method for producing and peeling off an epitaxial layer according to claim 2, wherein the growth of the epitaxial layer is performed in a chemical vapor deposition reaction chamber.
4. The method for producing and peeling off an epitaxial layer according to claim 2, wherein the epitaxial layer is a GaN layer, and the sacrificial layer is an N-type doped GaN layer.
5. The method as claimed in claim 4, wherein the temperature in the first growth process is 500-900 ℃ and the pressure is 200-600 torr; the temperature in the second growth process is 900-.
6. A method for manufacturing a semiconductor device, comprising the steps of:
providing a substrate, and growing a sacrificial layer on the substrate by adopting a first growth process and a second growth process in sequence; the sacrificial layer comprises a hole part grown under the first growth process and a flat part grown under the second growth process;
growing an epitaxial layer on the flat part;
growing a semiconductor device functional layer on the epitaxial layer;
etching the sacrificial layer by using etching liquid, and stripping the epitaxial layer from the substrate; the etching liquid can enter the holes in the hole part for etching.
7. The method for manufacturing a semiconductor device according to claim 6, wherein the first growth process and the second growth process are both performed in a chemical vapor deposition reaction chamber, wherein a temperature in the first growth process is lower than a temperature in the second growth process, and wherein a pressure in the first growth process is higher than a pressure in the second growth process.
8. The method for manufacturing a semiconductor device according to claim 6 or 7, further comprising the steps of:
and arranging the epitaxial layer and the semiconductor device functional layer on the epitaxial layer on a target substrate.
9. The method for manufacturing a semiconductor device according to claim 8, wherein the semiconductor device layer includes a first semiconductor layer, a second semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a heterojunction is formed between the first semiconductor layer and the second semiconductor layer.
10. The method for manufacturing a semiconductor device according to claim 8, wherein the semiconductor device layer comprises a light emitting layer and an electrode layer.
CN202111643318.8A 2021-12-29 2021-12-29 Preparation stripping method of epitaxial layer and preparation method of semiconductor device Pending CN114497293A (en)

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