KR20130083206A - Method of polishing the backsurface of wafer and wafer manufactured by the same - Google Patents
Method of polishing the backsurface of wafer and wafer manufactured by the same Download PDFInfo
- Publication number
- KR20130083206A KR20130083206A KR1020120003857A KR20120003857A KR20130083206A KR 20130083206 A KR20130083206 A KR 20130083206A KR 1020120003857 A KR1020120003857 A KR 1020120003857A KR 20120003857 A KR20120003857 A KR 20120003857A KR 20130083206 A KR20130083206 A KR 20130083206A
- Authority
- KR
- South Korea
- Prior art keywords
- wafer
- polishing
- finishing
- rough grinding
- rough
- Prior art date
Links
- 238000007517 polishing process Methods 0.000 title claims description 15
- 238000005498 polishing Methods 0.000 claims abstract description 136
- 238000000034 method Methods 0.000 claims abstract description 34
- 238000004140 cleaning Methods 0.000 claims description 7
- 230000001934 delay Effects 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 122
- 238000004519 manufacturing process Methods 0.000 description 6
- 229910003460 diamond Inorganic materials 0.000 description 5
- 239000010432 diamond Substances 0.000 description 5
- 238000003860 storage Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 239000002002 slurry Substances 0.000 description 3
- 239000010949 copper Substances 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02082—Cleaning product to be cleaned
- H01L21/0209—Cleaning of wafer backside
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Disclosed are a wafer backside polishing method and a wafer fabricated thereby. The disclosed wafer backside polishing method includes a wafer loading step of loading a wafer, a rough polishing step of sequentially performing a first rough polishing step and a second rough polishing step, a finishing polishing step of finishing a rough polishing wafer, and a first step A polishing step for polishing the finished polished wafer using a polishing head and a secondary polishing head, and a wafer unloading step for unloading the wafer, the first rough polishing step, the second rough polishing step, and the finishing polishing step And each of the polishing steps treats the wafer with the same number of copies per hour to prevent delays between the steps.
Description
The present invention relates to a wafer backside polishing method and a wafer fabricated thereby, and more particularly, to a wafer backside polishing method for processing a wafer thinly by polishing the backside of the wafer and a wafer produced thereby.
In general, in the wafer manufacturing process for forming a semiconductor integrated circuit on the active surface of the wafer, the wafer used in the manufacturing process to suppress the damage of the wafer generated during the movement or handling between the wafer manufacturing apparatus is used in the package manufacturing process The thickness is thicker than that of the wafer.
Therefore, after the wafer fabrication process, the back surface of the unnecessary wafer is polished before being provided to the semiconductor package fabrication process. As such, the volume of the semiconductor chip can be reduced through the wafer backside polishing process, and good heat dissipation characteristics can be ensured when packaged and used.
The wafer backside polishing process goes through rough griding, fine griding, polishing and cleaning steps in order. Through this polishing process, desired roughness of the back surface of the wafer can be obtained.
However, the overall processing time of the polishing process may take too long to reduce productivity. As such, in order to reduce the processing time of the polishing process, the polishing time should be reduced by reducing the rough grinding time or the thickness of the polishing. In the related art, since only the roughing amount of rough grinding was performed to increase the backside polishing process, the roughing process time is longer than other process times, and thus, the overall wafer backside polishing process time is long, resulting in a decrease in the productivity of the wafer.
The present invention is to solve the above problems, by reducing the machining time of rough grinding and polishing to eliminate the bottleneck between the polishing process steps to reduce the polishing time per wafer wafer and this method It provides a wafer manufactured by.
Wafer back grinding method according to an aspect of the present invention,
A wafer loading step of loading a wafer;
A rough grinding step of sequentially performing the first rough grinding step and the second rough grinding step of the wafer;
A finishing polishing step of finishing polishing the rough-polished wafer;
Polishing the finished wafer using a first polishing head and a second polishing head; And
A wafer unloading step of unloading the wafer;
Each of the first rough polishing step, the second rough polishing step, the finishing polishing step, and the polishing step prevents the time delay between the steps by treating the wafer with the same number of sheets per hour.
The first rough grinding step and the second rough grinding step are made under the same conditions, and the maximum damage depth, the processing amount and the processing time are the same.
In the finishing polishing step, the maximum damage depth of the wafer after finishing polishing is 3㎛ ~ 15㎛.
In the finishing polishing step, the descending speed of the finishing polishing machine for polishing the wafer is 0.3 μm / s to 1 μm / s.
In the polishing step, the primary polishing head or the secondary polishing head selectively polishes the wafer after the finishing polishing step.
In the polishing step, the maximum damage depth of the wafer after polishing is 500 nm.
The cleaning step may further include cleaning the wafer after the polishing step.
A wafer produced by the wafer backside polishing method.
Wafer back grinding method according to the invention
First, by roughing twice, the rough grinding process time can be prevented.
Second, by using two polishing heads to perform the polishing step, the process can be prevented from stalling.
Third, by equalizing the number of wafers processed per hour in rough grinding, finishing polishing, and polishing, bottlenecks between processes can be prevented, thereby reducing the work time per wafer.
1 is a plan view schematically showing a wafer backside polishing apparatus for performing a wafer backside polishing method according to the present invention.
FIG. 2 is a diagram illustrating a configuration of a wafer backside polishing apparatus for performing the polishing step shown in FIG. 1.
Figure 3 is a process chart according to the wafer back polishing method according to the present invention.
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments illustrated below are not intended to limit the scope of the invention, but rather to provide a thorough understanding of the invention to those skilled in the art. In the following drawings, like reference numerals refer to like elements, and the size of each element in the drawings may be exaggerated for clarity and convenience of explanation.
1 is a plan view schematically showing a wafer rear surface polishing apparatus for performing a wafer rear surface polishing method according to the present invention, and FIG. 2 is a view showing the configuration of a wafer rear surface polishing apparatus performing the polishing step shown in FIG. .
Referring to FIG. 1, a wafer
The
The chuck table is a portion that suctions the
The chuck table is provided adjacent to the standby table 121 and the standby table 121 at the standby position for fixing the
Polishing machine is provided on the upper side of the first rough table 122, the first
The first
Finishing
The polishing machine is composed of a separate configuration adjacent to the
Reference numeral 170 denotes a cleaner that cleans the polished wafer.
A method of polishing the back surface of the wafer using the wafer back
Figure 3 is a process chart according to the wafer backside polishing method according to the present invention.
1 and 3, the
At this time, the wafer is aligned in order to orient the
Next, the rough grinding step is performed. The rough grinding step is performed twice, and the first rough grinding
In the first rough grinding
Then, in the second rough grinding step (step 240), the first rough table 122 in which the first rough grinding
The maximum damage depth of the back side of the wafer, which has undergone the first rough grinding step (step 230) and the second rough grinding step (step 240), is 22 µm, the processing amount is 260 µm, and the processing time is the same. The number of treatments per hour (UPEH) is 22 to 30 sheets for 4 inch wafers and 14 to 15 sheets for 6 inch wafers.
According to the present invention, rough grinding is divided into two stages, so that the machining time is dispersed when polishing the same thickness as compared to when the wafer is polished in one step, thereby preventing the polishing process time from increasing. As a result, the number of sheets (UPEH) treated in each step of the first rough grinding step and the second rough grinding step is the same.
Next, the finishing step proceeds (250). After the second rough grinding step is completed, the secondary roughing table 123 on which the second rough grinding
After finishing the finishing step, the maximum damage depth (max damage depth) of the back surface of the
Next, the polishing
The present invention includes two polishing heads, and the wafers are attached to the
Thereafter, the
Meanwhile, although not shown in the drawing, a cleaning step may be performed between the polishing step and the wafer loading step. The cleaning step removes debris generated after the polishing step.
The above-described wafer back polishing method of the present invention and the wafer manufactured by the same have been described with reference to the embodiments shown in the drawings for clarity, but this is merely an example, and those skilled in the art may vary from this. It will be appreciated that variations and other equivalent embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the appended claims.
100 --- wafer
101 --- wafer supply cassette
102,103,104 ---
121 --- Standby table 122 --- 1st rough grinding table
123 --- 2nd rough grinding table 124 --- Finishing grinding table
131 --- 1st
133 --- Finishing Machine
141,142,143,144,145,146 --- wafer
151 ---
161--
Claims (8)
A rough grinding step of sequentially performing the first rough grinding step and the second rough grinding step of the wafer;
A finishing polishing step of finishing polishing the rough-polished wafer;
Polishing the finished wafer using a first polishing head and a second polishing head; And
A wafer unloading step of unloading the wafer;
And each of the first rough grinding step, the second rough grinding step, the finish grinding step, and the polishing step are treated with the same number of sheets per hour to prevent a delay between the steps.
The first rough grinding step and the second rough grinding step are made under the same conditions, the maximum damage depth, processing amount and processing time is the same.
In the finishing polishing step,
The maximum damage depth of the wafer after finishing polishing is 3㎛ ~ 15㎛ Wafer back polishing method.
In the finishing polishing step,
A method of polishing the back surface of the wafer, wherein the descending speed of the finish polishing machine is 0.3 μm / s to 1 μm / s.
In the polishing step,
The first polishing head or the second polishing head selectively polishes the wafer after the finishing polishing step.
In the polishing step,
The maximum damage depth of the wafer after polishing is 500nm wafer back polishing method.
And a cleaning step of cleaning the wafer after the polishing step.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020120003857A KR20130083206A (en) | 2012-01-12 | 2012-01-12 | Method of polishing the backsurface of wafer and wafer manufactured by the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020120003857A KR20130083206A (en) | 2012-01-12 | 2012-01-12 | Method of polishing the backsurface of wafer and wafer manufactured by the same |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20130083206A true KR20130083206A (en) | 2013-07-22 |
Family
ID=48994334
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020120003857A KR20130083206A (en) | 2012-01-12 | 2012-01-12 | Method of polishing the backsurface of wafer and wafer manufactured by the same |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR20130083206A (en) |
-
2012
- 2012-01-12 KR KR1020120003857A patent/KR20130083206A/en not_active Application Discontinuation
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