Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Thus, in some embodiments, well known process steps, well known device structures, and well-known techniques are not specifically described to avoid an undesirable interpretation of the present invention. Like reference numerals refer to like elements throughout.
In the description of the embodiment according to the present invention, when described as being located on an "on or under" of each element, the above (on) or (under) (on) or under) includes both elements in direct contact with each other or one or more other elements indirectly disposed between the two elements. In addition, when expressed as "on" or "under", it may include not only an upward direction but also a downward direction based on one element.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. It is noted that the terms "comprises" and / or "comprising" used in the specification are intended to be inclusive in a manner similar to the components, steps, operations, and / Or additions.
Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification may be used in a sense that can be commonly understood by those skilled in the art. Also, commonly used predefined terms are not ideally or excessively interpreted unless explicitly defined otherwise.
The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. Also, the size and area of each component do not entirely reflect actual size or area.
Although the terms first, second, etc. may be used to describe various elements, components, regions, layers and / or regions, such elements. Ingredients. Areas. Layers and / or regions should not be limited by this term.
In addition, the angle and direction mentioned in the process of describing the structure of the light emitting device in the embodiment are based on those described in the drawings. In the description of the structure of the light emitting device in the specification, reference points and positional relationship with respect to angles are not explicitly referred to, refer to the related drawings.
1 is a cross-sectional view showing the structure of a light emitting device 100 according to the embodiment.
Referring to FIG. 1, a light emitting device 100 according to an embodiment is disposed on a substrate 110 and a substrate 110, and has a first semiconductor layer 162 and a second semiconductor having irregularities 170 on an upper surface thereof. The light emitting structure 160 including the layer 166 and the active layer 164 disposed between the first semiconductor and the second semiconductor layer 166, and the pattern layer 180 disposed on the protruding portion of the unevenness 170. ).
The substrate 110 may be disposed under the first semiconductor layer 162. The substrate 110 may support the first semiconductor layer 162. The substrate 110 may receive heat from the first semiconductor layer 162. The substrate 110 may have a light transmissive property. The substrate 110 may have a light transmissive property when using a light transmissive material or formed below a predetermined thickness, but is not limited thereto. The refractive index of the substrate 110 may be smaller than the refractive index of the first semiconductor layer 162 for light extraction efficiency.
The substrate 110 may include a semiconductor material according to an embodiment, for example, silicon (Si), germanium (Ge), gallium arsenide (GaAs), zinc oxide (ZnO), silicon carbide (SiC), It may be implemented as a carrier wafer such as silicon germanium (SiGe), gallium nitride (GaN), gallium (III) oxide (Ga 2 O 3 ).
The substrate 110 may include a conductive material according to an embodiment. According to the embodiment, the metal may include, for example, gold (Au), nickel (Ni), tungsten (W), molybdenum (Mo), copper (Cu), aluminum (Al), tantalum (Ta), silver It may include any one selected from (Ag), platinum (Pt), and chromium (Cr), or may include two or more alloys, and may be formed by stacking two or more of the above materials. When the substrate 110 is formed of a metal, the thermal stability of the light emitting device may be improved by facilitating the emission of heat generated from the light emitting device.
The substrate 110 may include a patterned substrate (PSS) structure on an upper surface thereof to increase light extraction efficiency, but is not limited thereto. The substrate 110 may improve the thermal stability of the light emitting device 100 by facilitating the emission of heat generated from the light emitting device 100. The substrate 110 may include a layer in which a difference between the first semiconductor layer 162 and the lattice constant exists to alleviate the lattice constant difference between the first semiconductor layer 162 and the first semiconductor layer 162.
A wafer bonding layer 120 may be disposed on the substrate 110 to bond the substrate 110 and the conductive layer 130 to each other. The bonding layer 120 is, for example, from the group consisting of gold (Au), tin (Sn), indium (In), silver (Ag), nickel (Ni), niobium (Nb) and copper (Cu). Material selected or alloys thereof.
A diffusion layer 130 may be disposed on the bonding layer 120. The conductive layer 130 may be made of nickel (Ni), platinum (Pt), titanium (Ti), tungsten (W), vanadium (V), iron (Fe), molybdenum (Mo), and the like.
Conductive layer 130 may be formed using a sputter deposition method. In the sputtering deposition method, when ionized atoms are accelerated by an electric field and collide with the source material of the conductive layer 130, the atoms of the source material are ejected and deposited. The conductive layer 130 may be formed by an electrochemical metal deposition method, a bonding method using a eutectic metal, or the like according to an embodiment. The conductive layer 130 may be formed of a plurality of layers according to the embodiment.
The conductive layer 130 may minimize mechanical damage (breaking or peeling, etc.) that may occur in the manufacturing process of the light emitting device. The conductive layer 130 may prevent the metal material constituting the substrate 110 or the bonding layer 120 from being diffused into the light emitting structure 160.
The first electrode layer 140 may be disposed on the conductive layer 130, and the first electrode layer 140 may include at least one of an ohmic layer 146 and a reflective layer 142. can do. For example, the first electrode layer 140 may have a structure of an ohmic layer / reflective layer, but is not limited thereto. For example, the first electrode layer 140 may have a form in which the reflective layer 142 and the ohmic layer 146 are sequentially stacked, and the ohmic layer 146 when the reflective layer 142 is in ohmic contact with the first semiconductor layer 162. ) May be omitted.
The reflective layer 142 may be disposed under the ohmic layer 146, and may be a material having excellent reflection characteristics, for example, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf And it may be formed from a material consisting of a selective combination of these, or may be formed in a multi-layer using the light-transmitting conductive material, such as the metal material and IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO. The reflective layer 142 may be laminated with IZO / Ni, AZO / Ag, IZO / Ag / Ni, AZO / Ag / Ni, or the like. When the reflective layer 142 is formed of a material in ohmic contact with the first semiconductor layer 162, the ohmic layer 146 may not be separately formed, but is not limited thereto.
The ohmic layer 146 is in ohmic contact with a lower surface of the first semiconductor layer 162 and may be formed in a layer or a plurality of patterns. The ohmic layer 146 may be selectively used as a light transmitting electrode layer and a metal. For example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), and indium aluminum zinc oxide (IAZO) may be used. , Indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IrO x , RuO x , RuO x / ITO, Ni , Ag, Ni / IrO x / Au, and Ni / IrO x / Au / ITO may be used to implement a single layer or multiple layers. The ohmic layer 146 is for smoothly injecting a carrier into the first semiconductor layer 162 and is not necessarily formed.
The current limiting layer CBL may be positioned on the first electrode layer 140. The current limiting layer is light transmissive and may comprise a nonconductive or weakly conductive material. The current limiting layer may be composed of silicon dioxide (SiO 2 ), or aluminum oxide (Al 2 O 3 ) comprising silicon dioxide (SiO 2 ).
The light emitting structure 160 may be disposed on the first electrode layer 140. The light emitting structure 160 may include a first semiconductor layer 162, an active layer 164, and a second semiconductor layer 166, and may include an active layer between the first semiconductor layer 162 and the second semiconductor layer 166. 164 may be formed of an intervening configuration.
The first semiconductor layer 162 may be implemented as a p-type semiconductor layer doped with a p-type dopant. The first semiconductor layer 162 is a compound semiconductor of a group III-V group element doped with a p-type dopant, for example, gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), and indium gallium (InGaN). nitride), InN (Indium nitride), InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like. The p-type dopant doped in the first semiconductor layer 162 may be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), or barium (Ba).
The active layer 164 may be formed on the first semiconductor layer 162. The active layer 164 is formed of a single or multi quantum well structure, a quantum-wire structure, or a quantum dot using a compound semiconductor material of a group III-V group element. Dot) structure or the like.
Well active layer 164 has a composition formula in this case formed of a quantum well structure, for example, In x Al y Ga 1 -x- y N (0≤x≤1, 0 ≤y≤1, 0≤x + y≤1) It may have a single or quantum well structure having a layer and a barrier layer having a compositional formula of In a Al b Ga 1 -a- b N ( 0≤a≤1, 0≤b≤1, 0≤a + b≤1). However, the present invention is not limited thereto and according to another embodiment, InGaN / GaN, InGaN / InGaN, AlGaN / GaN, InAlGaN / GaN, InAlGaN / AlGaN, InAlGaN / InAlGaN, GaAs, / AlGaAs (InGaAs), GaP / AlGaP (InGaP), etc. It may be formed of any one or more of the laminated structure of. The well layer may be formed of a material having a band gap lower than the band gap of the barrier layer.
A conductive clad layer (not shown) may be formed on or under the active layer 164. The conductive clad layer (not shown) may be formed of an AlGaN-based semiconductor and may have a band gap larger than that of the active layer 164.
The second semiconductor layer 166 may be formed on the active layer 164. The second semiconductor layer 166 may be implemented as an n-type semiconductor layer, and the n-type semiconductor layer may be a compound semiconductor of a Group III-V group element doped with an n-type dopant, for example, gallium nitride (GaN) or AlN. (Aluminum nitride), Aluminum gallium nitride (AlGaN), Indium gallium nitride (InGaN), Indium nitride (InN), InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like. The n-type dopant doped in the second semiconductor layer 166 may be, for example, silicon (Si), germanium (Ge), tin (Sn), selenium (Se), tellurium (Te), or the like.
The light emitting structure may include a third semiconductor layer (not shown) having a polarity opposite to that of the second semiconductor layer 166 on the second semiconductor layer 166. In addition, the first semiconductor layer 162 may be an n-type semiconductor layer, and the second semiconductor layer 166 may be implemented as a p-type semiconductor layer. Accordingly, the light emitting structure layer may include at least one of an N-P junction, a P-N junction, an N-P-N junction, and a P-N-P junction structure.
The second electrode layer 190 may be formed on the second semiconductor layer 166 and may be electrically connected to the second semiconductor layer 166. The second electrode layer 190 may include at least one pad (not shown) or / and a predetermined shape. It may include an electrode having a pattern, but is not limited thereto. The second electrode layer 190 may be disposed in the center region, the outer region, or the corner region of the upper surface of the second semiconductor layer 166, but is not limited thereto.
The second electrode layer 190 may be connected to a pad (not shown) and at least one branch electrode extending in at least one direction by being connected to the pad (not shown). That is, the second electrode layer 190 may be disposed by forming a pattern on the second semiconductor layer 166, thereby improving the light efficiency by uniformly supplying current to the entire second semiconductor layer 166. You can. The second electrode layer 190 may be disposed in a region other than the second semiconductor layer 166, but is not limited thereto.
The second electrode layer 190 is a conductive material, for example, indium (In), tobalt (Co), silicon (Si), germanium (Ge), gold (Au), palladium (Pd), platinum (Pt), ruthenium (Ru), rhenium (Re), magnesium (Mg), zinc (Zn), hafnium (Hf), tantalum (Ta), rhodium (Rh), iridium (Ir), tungsten (W), titanium (Ti), silver (Ag), chromium (Cr), molybdenum (Mo), niobium (Nb), aluminum (Al), nickel (Ni), copper (Cu), and titanium tungsten alloy (WTi) It can be formed in a single layer or multiple layers.
Meanwhile, the second electrode layer 190 may be disposed on the flat upper surface of the second semiconductor layer 166 or may be disposed on the uneven unevenness 170, but is not limited thereto.
The second semiconductor layer 166 may have irregularities 170 formed on a portion of the surface or the entire region of the upper surface of the second semiconductor layer 166. The unevenness 170 may be formed by etching the upper surface of the light emitting structure 160, for example, at least one region of the upper surface of the second semiconductor layer 166. The etching process may be a dry etching process. As the etching process is performed, an uneven surface 170 may be formed on the top surface of the second semiconductor layer 166 to form a light extraction structure. The unevenness 170 may be irregularly formed in a random size, but is not limited thereto. The uneven surface 170 is an uneven upper surface, and may include at least one of a texture pattern, a uneven pattern 170, and an uneven pattern, but is not limited thereto.
Concave-convex 170 may be formed to have a variety of shapes, such as a cylinder, a polygonal pillar, a cone, a polygonal pyramid, a truncated cone, a polygonal truncated cone, etc., but may not include a horn shape.
The unevenness 170 may be formed by dry etching. Dry etching may be one of ion etching and reaction etching. Ion etching may be a sputtering phenomenon in which atoms of the resurfacing portion are torn off when high energy ions collide with the material surface. The reaction etching may be performed by using only a chemical reaction of a reactive gas or by simultaneously forming a plasma on the reactive gas and simultaneously using a chemical reaction and sputtering. In the case of dry etching, equipment such as Reactive Ion Etching (RIE) or Inductively Coupled Plasma (ICP) may be used.
The unevenness 170 may be formed by dry etching and may be uniformly distributed on the upper surface of the second semiconductor layer 166. As the unevenness 170 is uniformly formed on the upper surface of the second semiconductor layer 166, light generated in the active layer 164 is totally reflected from the upper surface of the second semiconductor layer 166 to be reabsorbed in the light emitting structure 160. Since it can be prevented or scattered, it can contribute to the improvement of the light extraction efficiency of the light emitting device. In addition, since the difference in the degree of etching between the center and the edge on the wafer can be reduced, the process yield can be significantly improved.
The pattern layer 180 may be disposed on the protruding portion of the unevenness 170. The pattern layer 180 may be formed by heat treatment of the film layer A, and thus may be disposed on the upper surface of the second semiconductor layer 166 in a non-periodic pattern. The pattern layer 180 may prevent the top surface of the second semiconductor layer 166 from being etched during the dry etching process. After the dry etching process, the upper surface of the second semiconductor layer 166 on which the pattern layer 180 is not disposed may be etched and recessed. The pattern layer 180 may also be partially etched in the dry etching process, but is not limited thereto.
The pattern layer 180 may be formed of one material of gold (Ag) or silver (Au). The pattern layer 180 may be formed with a period smaller than the wavelength of light generated from the active layer 164. For example, when light generated in the active layer 164 is a red region of 620 to 700 nm, the period of the pattern of the pattern layer 180 may be 620 nm or less. In addition, if the light generated in the active layer 164 is a blue region of 450 to 480 nm, the pattern period of the pattern layer 180 may be 450 nm or less.
The pattern layer 180 may have a pattern formed at a period smaller than a wavelength of light generated in the active layer 164 to determine a period of the unevenness 170 formed on the second semiconductor layer 166. The light extraction efficiency of the light emitting device 100 may be maximized by adjusting the period of the unevenness 170.
The pattern layer 180 may be formed of gold (Au) or silver (Ag) to cause surface plasmon resonance (SPR). An optical electric field may be strongly formed between adjacent patterns by Surface Plasmon Resonance (SPR). Accordingly, the optical confinement factor may be improved and the quantum efficiency of the active layer 164 may be improved. Quantum efficiency is proportional to the light amplification factor. As the optical electric field of the active layer 164 becomes larger than the surroundings, the optical confinement factor becomes large and the light amplification factor becomes large.
The optical electric field of the active layer 164 is strongly formed by Surface Plasmon Resonance (SPR) in which the surface plasmon generated in the metal layer is excited by the light generated in the active layer 164. Can be.
That is, the surface plasmon resonance (SPR) causes the pattern layer 180 to have a negative effective dielectric constant having a large absolute value, thereby forming a strong photoelectric field in the active layer 164. have. Therefore, the light efficiency of the light emitting device 100 may be improved by the pattern layer 180.
The pattern layer 180 may have a thickness of 50 to 100 mm 3. When the pattern layer 180 is 50 Å or less in thickness, the pattern layer 180 may be too thin to be etched during the dry etching process to reduce the light efficiency improvement effect. When the pattern layer 180 is 100 Å or more, pattern formation may be difficult during heat treatment.
2 to 5 are cross-sectional views illustrating a method of manufacturing a light emitting device.
Referring to FIG. 2, a second electrode layer 190 may be disposed on the second semiconductor layer 166.
Referring to FIG. 3, a film layer A may be disposed on an upper surface of the second semiconductor layer 166 and an upper surface of the second electrode layer 190.
The film layer (A) surface may be formed of a material that can cause plasmon resonance. For example, the film layer A may be formed of one of Au or Ag.
Referring to FIG. 4, the pattern layer 180 may be formed by heat treating the film layer A. FIG. When the film layer A is heat-treated, an aperiodic pattern (SWS: Sub-Wavelength Structure) may be formed to form the pattern layer 180.
The film layer (A) may have a thickness of 50 to 100 mm 3. When the film layer (A) is 50 Å or less in thickness, the film layer is too thin to be etched during the dry etching process, so that the formation of the pattern layer 180 is weak, so that the light efficiency improvement effect may be reduced. Formation of the 180 may be difficult, and thus, light extraction efficiency may be reduced by covering the upper portion of the second semiconductor layer 166.
Referring to FIG. 5, the photosensitive layer a may be disposed on an upper surface of the second electrode layer 190.
The photosensitive layer a may be formed of a photoresist.
The photosensitive resin may be a photosensitive polymer that reacts when light is received in a specific wavelength range. The photosensitive resin may break or more strongly bond the polymer facts of the exposed portion when one area is exposed. The photosensitive resin which breaks the polymer bond chain of the exposed part is called positive type, and the photosensitive resin which bond bond bonds strongly is called negative type.
The photosensitive layer a may be coated on the second electrode layer 190 and dried. The photosensitive layer (a) may be a negative photosensitive resin that is difficult to etch when exposed to light. The photosensitive layer (a) may be formed by mixing a synthetic rubber and a photosensitive agent, but is not limited thereto.
The photosensitive layer a may prevent the upper surface of the second electrode layer 190 from being etched. The photosensitive layer (a) may prevent the gas from the inductively coupled plasma (ICP) equipment during the etching process from causing plasma damage on the upper surface of the second electrode layer 190. When plasma damage is applied to the upper surface of the second electrode layer 190 by using the photosensitive layer (a), the upper surface may be hardened, and the wire bonding process may be prevented from becoming difficult.
Referring to FIG. 6, the unevenness 170 may be formed by etching the second semiconductor layer 166.
The unevenness 170 may be formed on the upper surface of the second semiconductor layer 166 by dry etching. The region where the pattern layer 180 is formed may not be etched from the upper surface of the second semiconductor layer 166. In the second semiconductor layer 166, one region of the upper surface on which the pattern layer 180 is not formed may be etched to form the unevenness 170. The second semiconductor layer 166 may be etched so that the light emitting device 100 may have a shape in which the pattern layer 180 is disposed on the protruding portion of the unevenness 170.
The unevenness 170 may be formed by dry etching. Dry etching may be one of ion etching and reaction etching. Ion etching may be a sputtering phenomenon in which atoms of the resurfacing portion are torn off when high energy ions collide with the material surface. The reaction etching may be performed by using only a chemical reaction of a reactive gas or by simultaneously forming a plasma on the reactive gas and simultaneously using a chemical reaction and sputtering. In the case of dry etching, equipment such as Reactive Ion Etching (RIE) or Inductively Coupled Plasma (ICP) may be used.
After forming the unevenness 170, a process of removing a photosensitive layer (not shown) disposed on the second electrode layer 190 may be included. The photosensitive layer (not shown) may be removed by dissolving in a solvent. When the photosensitive layer (not shown) is removed, a process such as wire bonding may be performed on the second electrode layer 190.
7A is a perspective view illustrating a light emitting device package 300 according to an embodiment of the present invention, and FIG. 7B is a cross-sectional view illustrating a cross section of the light emitting device package 300 according to another embodiment.
7A and 7B, the light emitting device package 300 according to the embodiment includes a body 310 having a cavity formed therein, and first and second electrodes 340 and 350 mounted on the body 310. The light emitting device 320 electrically connected to the two electrodes and the encapsulant 330 formed in the cavity may be included, and the encapsulant 330 may include a phosphor (not shown).
The body 310 may be made of a resin material such as polyphthalamide (PPA), silicon (Si), aluminum (Al), aluminum nitride (AlN), photo sensitive glass (PSG), polyamide 9T ), new geo-isotactic polystyrene (SPS), metal materials, sapphire (Al 2 O 3), beryllium oxide (BeO), is a printed circuit board (PCB, printed circuit board), it may be formed of at least one of ceramic. The body 310 may be formed by injection molding, etching, or the like, but is not limited thereto.
The inner surface of the body 310 may be formed with an inclined surface. The reflection angle of the light emitted from the light emitting device 320 can be changed according to the angle of the inclined surface, and thus the directivity angle of the light emitted to the outside can be adjusted.
The shape of the cavity formed in the body 310 as viewed from above may be circular, rectangular, polygonal, elliptical, or the like, and in particular, may have a curved shape, but is not limited thereto.
The encapsulant 330 may be filled in the cavity and may include a phosphor (not shown). The encapsulant 330 may be formed of transparent silicone, epoxy, and other resin materials. The encapsulant 330 may be formed in such a manner that the encapsulant 330 is filled in the cavity and then cured by ultraviolet rays or heat.
The phosphor (not shown) may be selected according to the wavelength of the light emitted from the light emitting device 320 to allow the light emitting device package 300 to realize white light.
The fluorescent material (not shown) included in the encapsulant 330 may be a blue light emitting phosphor, a blue light emitting fluorescent material, a green light emitting fluorescent material, a yellow green light emitting fluorescent material, a yellow light emitting fluorescent material, Fluorescent material, orange light-emitting fluorescent material, and red light-emitting fluorescent material may be applied.
The phosphor (not shown) may be excited by the light having the first light emitted from the light emitting device 320 to generate the second light. For example, when the light emitting element 320 is a blue light emitting diode and the phosphor (not shown) is a yellow phosphor, the yellow phosphor may be excited by blue light to emit yellow light, and blue light emitted from the blue light emitting diode As the yellow light generated by excitation by blue light is mixed, the light emitting device package 300 can provide white light.
When the light emitting device 320 is a green light emitting diode, a magenta phosphor or a blue and red phosphor (not shown) is mixed. When the light emitting device 320 is a red light emitting diode, a cyan phosphor or a blue and green phosphor is mixed. For example,
The phosphor (not shown) may be a known one such as YAG, TAG, sulfide, silicate, aluminate, nitride, carbide, nitridosilicate, borate, fluoride, or phosphate.
The first electrode 340 and the second electrode 350 may be mounted on the body 310. The first electrode 340 and the second electrode 350 may be electrically connected to the light emitting device 320 to supply power to the light emitting device 320.
The first electrode 340 and the second electrode 350 are electrically separated from each other and reflect light generated from the light emitting device 320 to increase light efficiency. The first electrode 340 and the second electrode 350 may discharge heat generated from the light emitting device 320 to the outside.
The light emitting device 320 and the first electrode 340 and the second electrode 350 may be formed by wire bonding or the like, ) Method, a flip chip method, or a die bonding method.
The first electrode 340 and the second electrode 350 may be formed of a metal material such as titanium (Ti), copper (Cu), nickel (Ni), gold (Au), chromium (Cr), tantalum ), Platinum (Pt), tin (Sn), silver (Ag), phosphorous (P), aluminum (Al), indium (In), palladium (Pd), cobalt ), Hafnium (Hf), ruthenium (Ru), and iron (Fe). The first electrode 340 and the second electrode 350 may have a single-layer structure or a multi-layer structure, but the present invention is not limited thereto.
The light emitting device 320 is mounted on the first electrode 340 and may be a light emitting device that emits light such as red, green, blue, or white, or a UV (Ultra Violet) However, the present invention is not limited thereto. One or more light emitting devices 320 may be mounted.
The light emitting device 320 is applicable to both a horizontal type whose electrical terminals are all formed on the upper surface, a vertical type formed on the upper and lower surfaces, or a flip chip.
The light emitting device package 300 may include a light emitting device.
The light emitting device 320 may have irregularities (not shown) formed on an upper surface of the second semiconductor layer (not shown), and a pattern layer (not shown) may be disposed on the protruding portion of the irregularities (not shown). have. The unevenness (not shown) may reduce the total reflection of light generated in the active layer (not shown), and the pattern layer (not shown) may maximize the light extraction efficiency by using surface plasmon resonance.
Including the light emitting device 320 can maximize the reliability and the amount of light extraction of the light emitting device package 300.
A light guide plate, a prism sheet, a diffusion sheet, and the like, which are optical members, may be disposed on a light path of the light emitting device package 300.
The light emitting device package 300, the substrate, and the optical member may function as a light unit. Another embodiment may be implemented as a display device, an indicating device, a lighting system including a light emitting device (not shown) or a light emitting device package 300, for example, the lighting system may include a lamp, a streetlight .
FIG. 8A is a perspective view showing an illumination system 400 including a light emitting device according to an embodiment, and FIG. 8B is a cross-sectional view showing a D-D 'cross-section of the illumination system of FIG. 8A.
8B is a cross-sectional view of the illumination system 400 of FIG. 8A cut in the longitudinal direction Z and the height direction X and viewed in the horizontal direction Y. FIG.
8A and 8B, the illumination system 400 may include a body 410, a cover 430 coupled to the body 410, and a finishing cap 450 positioned at opposite ends of the body 410 have.
The lower surface of the body 410 is fastened to the light emitting device module 443, the body 410 is conductive and so that the heat generated from the light emitting device package 444 can be discharged to the outside through the upper surface of the body 410 The heat dissipation effect may be formed of an excellent metal material, but is not limited thereto.
The light emitting device package 444 may include a light emitting device.
In the light emitting device (not shown), an unevenness (not shown) may be formed on an upper surface of the second semiconductor layer (not shown), and a pattern layer (not shown) may be disposed on the protruding portion of the unevenness (not shown). Can be. The unevenness (not shown) may reduce the total reflection of light generated in the active layer (not shown), and the pattern layer (not shown) may maximize the light extraction efficiency by using surface plasmon resonance.
Including the light emitting device (not shown), the reliability and light extraction amount of the light emitting device package 444 and the lighting system 400 may be maximized.
The light emitting device package 444 may be mounted on the substrate 442 in multiple colors and in multiple rows to form a module. The light emitting device package 444 may be mounted at the same interval or may be mounted at various separation distances as necessary to adjust brightness. As the substrate 442, a metal core PCB (MCPCB) or a PCB made of FR4 may be used.
The cover 430 may be formed in a circular shape to surround the lower surface of the body 410, but is not limited thereto.
The cover 430 may protect the light emitting device module 443 from the foreign matters. The cover 430 may include diffusing particles to prevent glare of light generated from the light emitting device package 444 and to uniformly emit light to the outside, and may also include at least one of an inner surface and an outer surface of the cover 430. A prism pattern or the like may be formed on the surface. In addition, a phosphor may be applied to at least one of an inner surface and an outer surface of the cover 430.
Since the light generated from the light emitting device package 444 is emitted to the outside through the cover 430, the cover 430 should be excellent in light transmittance, and sufficient heat resistance to withstand the heat generated from the light emitting device package 444. It should be provided, the cover 430 is formed of a material containing polyethylene terephthalate (PET), polycarbonate (PC), polymethyl methacrylate (PMMA), etc. Can be.
Closing cap 450 is located at both ends of the body 410 may be used for sealing the power supply (not shown). Power cap 452 is formed in the closing cap 450, the lighting system 400 according to the embodiment can be used immediately without a separate device to the terminal from which the existing fluorescent lamps are removed.
9 is an exploded perspective view of a liquid crystal display device including a light emitting device according to an embodiment.
9, the liquid crystal display 500 may include a liquid crystal display panel 510 and a backlight unit 570 for providing light to the liquid crystal display panel 510 in an edge-light manner.
The liquid crystal display panel 510 may display an image by using light provided from the backlight unit 570. The liquid crystal display panel 510 may include a color filter substrate 512 and a thin film transistor substrate 514 facing each other with a liquid crystal interposed therebetween.
The color filter substrate 512 may implement colors of an image displayed through the liquid crystal display panel 510.
The thin film transistor substrate 514 is electrically connected to the printed circuit board 518 on which a plurality of circuit components are mounted through the driving film 517. The thin film transistor substrate 514 may apply a driving voltage provided from the printed circuit board 518 to the liquid crystal in response to a driving signal provided from the printed circuit board 518.
The thin film transistor substrate 514 may include a thin film transistor and a pixel electrode formed of a thin film on another substrate of a transparent material such as glass or plastic.
The backlight unit 570 may convert the light provided from the light emitting device module 520, the light emitting device module 520 into a surface light source, and provide the light guide plate 530 to the liquid crystal display panel 510. Reflective sheet for reflecting the light emitted from the rear of the light guide plate 530 and the plurality of films 550, 560, 564 to uniform the luminance distribution of the light provided from the 530 and improve the vertical incidence ( 540.
The light emitting device module 520 may include a printed circuit board 522 such that a plurality of light emitting device packages 524 and a plurality of light emitting device packages 524 are mounted to form a module.
The light emitting device package 524 may include a light emitting device.
In the light emitting device (not shown), an unevenness (not shown) may be formed on an upper surface of the second semiconductor layer (not shown), and a pattern layer (not shown) may be disposed on the protruding portion of the unevenness (not shown). Can be. The unevenness (not shown) may reduce the total reflection of light generated in the active layer (not shown), and the pattern layer (not shown) may maximize the light extraction efficiency by using surface plasmon resonance.
Including the light emitting device (not shown), the reliability and light extraction amount of the light emitting device package 524 and the backlight unit 570 may be maximized.
The backlight unit 570 includes a diffusion film 566 for diffusing light incident from the light guide plate 530 toward the liquid crystal display panel 510 and a prism film 550 for enhancing vertical incidence by condensing the diffused light And may include a protective film 564 for protecting the prism film 550.
10 is an exploded perspective view of a liquid crystal display device including a light emitting device according to an embodiment. However, the parts shown and described in Fig. 9 are not repeatedly described in detail.
10 illustrates a liquid crystal display 600 of a direct type according to an embodiment. The liquid crystal display 600 may include a liquid crystal display panel 610 and a backlight unit 670 for providing light to the liquid crystal display panel 610. The liquid crystal display panel 610 is the same as that described with reference to FIG. 8, and thus a detailed description thereof will be omitted.
The backlight unit 670 may include a plurality of light emitting device modules 623, a reflective sheet 624, a lower chassis 630 in which the light emitting device modules 623 and the reflective sheet 624 are accommodated, and an upper portion of the light emitting device module 623. It may include a diffusion plate 640 and a plurality of optical film 660 disposed in the.
The light emitting device module 623 may include a printed circuit board 621 such that a plurality of light emitting device packages 622 and a plurality of light emitting device packages 622 may be mounted to form a module.
The light emitting device package 622 may include a light emitting device (not shown).
In the light emitting device (not shown), an unevenness (not shown) may be formed on an upper surface of the second semiconductor layer (not shown), and a pattern layer (not shown) may be disposed on the protruding portion of the unevenness (not shown). Can be. The unevenness (not shown) may reduce the total reflection of light generated in the active layer (not shown), and the pattern layer (not shown) may maximize the light extraction efficiency by using surface plasmon resonance.
Including the light emitting device (not shown), the reliability and light extraction amount of the light emitting device package 622 and the backlight unit 670 may be maximized.
The reflective sheet 624 reflects the light generated from the light emitting device package 622 in the direction in which the liquid crystal display panel 610 is positioned to improve light utilization efficiency.
Light generated by the light emitting device module 623 is incident on the diffusion plate 640, and the optical film 660 is disposed on the diffusion plate 640. The optical film 660 includes a diffusion film 666, a prism film 650, and a protective film 664.
The configuration and the method of the embodiments described above are not limitedly applied, but the embodiments may be modified so that all or some of the embodiments are selectively combined so that various modifications can be made. .
Although various embodiments have been illustrated and described above, the invention is not limited to the specific embodiments described above, and does not depart from the gist of the invention as claimed in the claims. Various modifications can be made by the person having the above, and these modifications should not be individually understood from the technical spirit or the prospect of the present invention.
