KR20130029643A - Apparatus and method for decoding manchester code - Google Patents

Apparatus and method for decoding manchester code Download PDF

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Publication number
KR20130029643A
KR20130029643A KR1020110093035A KR20110093035A KR20130029643A KR 20130029643 A KR20130029643 A KR 20130029643A KR 1020110093035 A KR1020110093035 A KR 1020110093035A KR 20110093035 A KR20110093035 A KR 20110093035A KR 20130029643 A KR20130029643 A KR 20130029643A
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state
low
short
long
bit
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KR1020110093035A
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Korean (ko)
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최택진
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현대모비스 주식회사
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Publication of KR20130029643A publication Critical patent/KR20130029643A/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/06—Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell
    • H03M5/12—Biphase level code, e.g. split phase code, Manchester code; Biphase space or mark code, e.g. double frequency code

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE: A manchester code decoding device and a method thereof are provided to easily implement logic and software by using a state transition machine and to reduce a system load. CONSTITUTION: A manchester code decoding device includes a storage unit(210), an input capture resource(220), a pulse classifier(230), a state transition machine(240), and a combining unit(250). The storage unit stores a preset reference time. When the input capture resource receives a manchester-coded signal, the input capture resource confirms time used from a previous level change of the signal to the next level change. A pulse classifier confirms a level change from high to low or from low to high and confirms whether the used time is more than reference time or not. The pulse classifier determines a pulse kind of the signal as a short low, a short high, a long low, or a long high. The state transition machine transits a state every time the pulse kind is changed and outputs a predefined bit, outputs a bit error, or performs only state transition according to the change of the pulse kind. [Reference numerals] (210) Storage unit; (220) Input capture resource; (230) Pulse classifier; (240) State transition machine; (250) Combining unit; (AA) Signal encoded into manchester codes

Description

Apparatus and Method for Decoding Manchester Code}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding method, and more particularly, to a Manchester code decoding apparatus and method capable of decoding information data encoded with the Manchester code.

In general, in data communication, source data must be processed and transmitted in a form suitable for a channel to be transmitted, that is, a media required for communication. Such a process is referred to as channel coding. do.

The most commonly used channel coding scheme in wireless communication in which data is transmitted using radio waves in free-space is a Manchester code.

The Manchester code encodes source data as shown in FIG. 1A, and in some cases, bit definitions of '0' and '1' may be interchanged.

For example, encoding '10100011' with the Manchester code is as shown in the waveform of FIG. 1B.

The encoded Manchester code is represented by the level of the result of sampling the encoded signal in synchronization with the rising edge or falling edge of the same base clock as that used for encoding, as shown in FIG. 1C. The bit is decoded upon determining it.

However, if the clock used at the receiving side is not synchronized with the clock used at the transmitting side, an error (see x display in FIG. 1D) may occur as shown in FIG. 1D.

Specifically, when the error of the clock used for encoding by the transmitting side and the clock used for decoding by the receiving side is 1%, a difference occurs by 1 bit in 100 bits Bit, thereby causing an error in data decoding.

Moreover, the error actually occurs well before the 100 bits because of the edge position, and as the bit continues the error in the clock accumulates.

In order to prevent such accumulation of errors in the clock, complicated additional processing such as resynchronization of the clock is required.

The present invention has been made in the technical background as described above, by detecting the signal encoded by the Manchester code by the state transition unit, and detects the information data from the encoded signal by outputting a predetermined bit for each type of the detected state transition It is an object of the present invention to provide an apparatus and method for decoding Manchester code that can be decoded.

Manchester code decoding apparatus according to an aspect of the present invention, the storage unit for storing a predetermined reference time; An input capture resource for checking a level change of the signal and a time taken from the previous level change to the next level change when receiving a signal encoded with a Manchester code; It is determined whether the level change from high to low or the level change from low to high and whether the time required is less than or equal to the reference time to shorten the pulse type of the signal. ), A pulse classification unit for determining a short high, long low, or long high; And a state transition each time the pulse type is changed, and a state in which a predetermined bit is output, a bit error is output, or only a state transition is made depending on which type the pulse type changes from previously to what kind. And a state machine.

According to another aspect of the present invention, a Manchester code decoding method using a Manchester code decoding apparatus including an input capture resource, a pulse classifying unit, and a state transition machine includes receiving an input signal encoded by the Manchester code. Ascertaining the time taken by the capture resource from the level change of the signal and from the previous level change to the next level change; Whether the pulse classification unit is the level change from the high to the low or the level change from the low to the high, and whether the time required is less than or equal to a predetermined reference time, the pulse type of the signal is set to a short low ( Determining a short low, short high, long low, or long high; And the state transition machine makes a state transition every time the change in the pulse type occurs, and outputs a predefined bit '0' or '1' depending on which type the pulse type changes from previously to what kind, or Outputting a 'bit error' or translating the state without outputting the bit.

According to the present invention, the system load can be reduced by determining the pulse type by using input capture resources of the microcontroller, and logic and software can be easily implemented by using a relatively simple state transition machine.

1A is a diagram illustrating a signal in which '0' and '1' are encoded with a Manchester code.
1B is a diagram illustrating a signal obtained by encoding '10100011' with a Manchester code.
1C illustrates normal decoding of a signal encoded with a conventional Manchester code.
1D is a diagram showing encoding errors of a signal encoded with a conventional Manchester code.
2 is a block diagram showing a Manchester code decoding apparatus according to an embodiment of the present invention.
3 illustrates a state transition machine in accordance with an embodiment of the present invention.
4 illustrates a signal coded with Manchester code and decoded information data according to an embodiment of the present invention.
5 is a state transition diagram illustrating a Manchester code decoding method according to an embodiment of the present invention.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. As used herein, the terms " comprises, " and / or "comprising" refer to the presence or absence of one or more other components, steps, operations, and / Or additions.

Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. 2 is a block diagram illustrating a Manchester code decoding apparatus according to an embodiment of the present invention.

As shown in FIG. 2, the Manchester code decoding apparatus 20 according to an embodiment of the present invention may include a storage 210, an input capture resource 220, a pulse classifier 230, and a state transition machine. 240) and a combination unit 250.

The storage unit 210 stores a reference time for determining whether it is a short low or short high or a long low or long high. At this time, the reference time is preferably determined to be equal to or less than the reference clock of the transmitting side that transmitted the signal encoded with the Manchester code.

The input capture resource 220 is initially at a high level or a low level. When a level change occurs as a signal encoded with a Manchester code is input, the type of the level change (high-> low or low-> high) Check the time taken from the level change to the next level change. Herein, the input capture resource 220 may be an input capture resource of a micro-controller.

The pulse classifying unit 230 determines a short low when descending to a low level from an initial high level and a short high when rising to a high level from an initial low level.

When the pulse classification unit 230 checks the level change from "low-> high-> low", the time required to change the level from "high-> low" to "high-> low" is less than the reference time. If it is, the pulse type is determined to be short high. If the pulse type is longer than the reference time, the pulse type is determined to be high.

When the coded signal is level-changed from "high-> low-> high", the pulse classifying unit 230 changes the level from "high-> low" to "low-> high" based on the time required for level change. If it is less than the time, the pulse type is determined as short low, and if it is more than the reference time, the pulse type is determined as long high.

The state transition machine 240 checks the pulse type and, when a change occurs in the pulse type, outputs a predetermined bit according to which state transition and changes from what kind, or only outputs a separate bit. Or output a bit error.

Meanwhile, the storage unit 210, the input capture resource 220, the pulse classifier 230, and the state transition machine 240 of FIG. 2 are read only memory (ROM), input capture resource, and core included in the microcontroller, respectively. And a state transition machine.

Hereinafter, a method of decoding a Manchester code of a state transition machine according to an embodiment of the present invention will be described with reference to FIG. 3. 3 is a diagram illustrating a state transition machine according to an embodiment of the present invention.

As shown in FIG. 3, the state transition machine 240 according to the embodiment of the present invention includes a first and a second short low states (SHORT LOW1, SHORT LOW2, hereinafter, omitting an identification code), and a first and second short. High state (SHORT HIGH1, SHORT HIGH 2, hereinafter, identifying code omitted), long high state (LONG HIGH, hereinafter, identifying code omitted) and long low state (LONG LOW, hereinafter, identifying code omitted).

The state transition machine 240 starts the state transition from the first short low state when the input signal starts at the high level (Start from High), and starts the first state from the first short low state. The state transition starts from the short high state.

When the state transition machine 240 receives the short high in the first short low state, the state transition machine 240 transitions to the second short high state and outputs bit '1', and in response to the long high input, the state transition machine 240 transitions to the long high state and bit '1'. Output '

When the state transition machine 240 receives the short low in the long high state, the state transition machine 240 transitions to the second short low state and outputs bit '0', and when the long high is input, the state transition machine 240 transitions to the long high state and the bit '0' Outputs

The state transition machine 240 does not output a bit when a short high is input in the second short low state, and outputs a 'bit error' when the long high is input.

The state transition machine 240 transitions to the second short low state when the short low is input in the first short high state, outputs a bit '0', and transitions to the long low state when the long low is received. Output '0'.

When the state transition machine 240 receives the short high in the long low state, the state transition machine transitions to the second short high state, outputs bit '1', and receives the long high, transitions to the long high state, and receives the bit ' Output 1 '.

When the state transition machine 240 receives the short low in the second short high state, the state transition machine 240 only transitions to the first short low state and does not output a bit. When the long transition is received, the state transition machine 240 transitions to the long low state, Error '

The combiner 250 sequentially combines the bits output from the state transition machine 240 to restore the information data before encoding.

Hereinafter, a method of decoding a Manchester code according to an embodiment of the present invention by a state transition machine will be described with reference to FIGS. 4 and 5.

4 is a diagram illustrating a signal encoded with a Manchester code and decoded information data according to an embodiment of the present invention, and FIG. 5 is a state transition diagram illustrating a Manchester code decoding method according to an embodiment of the present invention.

4 and 5, the state transition machine 240 starts at the default high level, and the pulse type is (1) short low (SLo), (2) long high (LHi), (3) long low (LLo). , (4) Long High (LHi), (5) Short Low (SLo), (6) Short High (SHi), (7) Short Low (SLo), (8) Short High (SHi), (9) Long It is assumed that it is input in order of low LLO, (10) short high (SHi), (11) short low (SLo), and (12) short high (SHi).

Referring to FIG. 5, the state transition machine 240 starts at a default high level, and (1) when a short low is input, the state transition machine 240 transitions to a first short low state and does not output a bit.

When the state transition machine 240 receives the (2) long high in the first short low state, the state transition machine 240 transitions to the long high state and outputs bit '1'.

When the state transition machine 240 receives the long low state (3) in the long high state, the state transition machine 240 transitions to the long low state and outputs a bit '0'.

When the state transition machine 240 receives (4) long high in the long low state, the state transition machine 240 transitions to the long high state and outputs bit '1'.

When the state transition machine 240 receives the input (5) short low in the long high state, the state transition machine 240 transitions to the second short low state and outputs bit '0'.

When the state transition machine 240 receives (6) shot high in the second short low state, the state transition machine 240 transitions to the first short high state and does not output a bit.

When the state transition machine 240 receives the input (7) shot low in the first short high state, the state transition machine 240 transitions to the second short low state, and outputs bit '0'.

When the state transition machine 240 receives the input (8) short high in the second short low state, the state transition machine 240 transitions to the first short high state and does not output a bit.

When the state transition machine 240 receives the (9) long low in the first short high state, the state transition machine 240 transitions to the long low state and outputs a bit '0'.

When the state transition machine 240 receives the input of (10) short high in the long low state, the state transition machine 240 transitions to the second short high state and outputs a bit '1'.

When the state transition machine 240 receives the input (11) shot low in the second short high state, the state transition machine 240 transitions to the first short low state and does not output a bit.

When the state transition machine 240 receives (12) shot high in the first short low state, the state transition machine 240 transitions to the second short low state and outputs bit '1'.

As shown in the lower bits of FIG. 4, since the bits output by the state transition machine 240 are sequentially '10100011', the state transition machine 240 knows that the information data encoded by the Manchester code is correctly decoded through the state transition. Can be.

As such, the present invention can reduce the system load by determining the pulse type by utilizing the input capture resource of the microcontroller, and can easily implement logic and software by using a relatively simple state transition machine.

While the present invention has been described in detail with reference to the accompanying drawings, it is to be understood that the invention is not limited to the above-described embodiments. Those skilled in the art will appreciate that various modifications, Of course, this is possible. Accordingly, the scope of protection of the present invention should not be limited to the above-described embodiments, but should be determined by the description of the following claims.

Claims (10)

A storage unit which stores a preset reference time;
An input capture resource for checking a level change of the signal and a time taken from the previous level change to the next level change when receiving a signal encoded with a Manchester code;
It is determined whether the level change from high to low or the level change from low to high and whether the time required is less than the reference time or longer to shorten the pulse type of the signal. ), A pulse classification unit for determining a short high, long low, or long high; And
A state transition is made each time the pulse type is changed, and a state transition that outputs a predetermined bit, outputs a bit error, or only changes the state depending on which type the pulse type changes from previously to what kind. State Machine
Manchester code decoding apparatus comprising a. The method of claim 1, wherein the pulse classification unit,
When the signal is changed in level from "high->low->high", it changes from "high->low" to "low->high". If the time required is less than the reference time, the short low is determined. If the time required is more than the reference time is determined as the long low,
When the signal level is changed from "low->high->low", it changes from "low->high" to "high->low". If the time required is less than the reference time, the short high is determined. And determining the long high if the time required is equal to or greater than the reference time. The method of claim 1, wherein the state transition machine,
First and second short low states, first and second short high states, long high states, and long low states,
Initially at a high level, the first transition to the first short low state when the input of the short low, the transition to the first short high state when the first input of the short high,
In the first short low state, when the short high is input, the second state is transitioned to the short high state and outputs a bit '1', and when the long high is received, the state transitions to the long high state and bit '1' is received. Output,
In the long high state, when the short low is received, the second state is transitioned to the short low state and outputs a bit '0', and when the long high is received, the transition to the long high state is output and the bit '0' is outputted. and.
In the second short low state, a bit is not output when the short high is input, and a bit error is output when the long high is received.
In the first short high state, when the short low is received, the transition to the second short low state is output, bit '0' is output, and when the long low is received, the transition is made to the long low state and bit '0'. ',
In the long low state, when the short high is input, the state transitions to the second short high state, outputs a bit '1', and when the long high is received, the state transitions to the long high state, and the bit '1' Outputs
In the second short high state, when the short low is received, the device transitions to the first short low state but does not output a bit. When the long low is received, the short low state is changed to the long low state, and a bit error occurs. The Manchester code decoding apparatus that outputs. The method of claim 1,
Combination unit for sequentially combining the bits output from the state transition machine to restore the information data before being encoded into the Manchester code
Manchester code decoding apparatus further comprising. The method of claim 1, wherein the reference time is,
And a Manchester code decoding apparatus which is equal to or less than a base clock of a transmitting side that has transmitted the signal encoded by the Manchester code. A Manchester code decoding method by a Manchester code decoding apparatus including an input capture resource, a pulse classification unit, and a state transition machine,
When the signal encoded with a Manchester code is received, checking an input capture resource for the level change of the signal and the time taken from the previous level change to the next level change;
Whether the pulse classifier is the level change from high to low or the level change from low to high and whether the time required is less than or equal to a preset reference time Determining a type as short low, short high, long low, or long high; And
The state transition machine makes a state transition every time the pulse type changes, and outputs a predefined bit '0' or '1' depending on which type the pulse type changes from previously to what kind, or ' Output a 'bit error', or transition state without outputting a bit
Manchester code decoding method comprising a. The method according to claim 6,
Restoring information data before being encoded into the Manchester code by sequentially combining the bits output from the state transition machine.
Manchester code decoding method further comprising. The method of claim 6, wherein the determining step,
When the signal is level changed from "high->low->high", the level is changed from "high->low" to "low->high", and if the time required is less than the reference time, the short low Determining as long and determining the long low if the time required is equal to or greater than the reference time; And
When the signal is level changed from "low->high->low", the level is changed from "low->high" to "high->low", and the short high if the time required is less than the reference time. And determining the long high if the time required is equal to or greater than the reference time.
Manchester code decoding method comprising a. The method according to claim 6,
The transitioning of the state may include transitioning from one of the first and second short low states, the first and second short high states, the long high state, and the long low state to the other state,
Initially at a high level, transitioning to the first short low state upon first receiving the short low and transitioning to the first short high state upon first receiving the short high;
In the first short low state, when the short high is input, the second state is transitioned to the short high state and outputs a bit '1', and when the long high is received, the state transitions to the long high state and bit '1' is received. Outputting;
In the long high state, when the short low is received, the second state is transitioned to the short low state and outputs a bit '0', and when the long high is received, the transition to the long high state is output and the bit '0' is outputted. Making;
In the second short low state, not receiving a bit when the short high is input, and outputting a 'bit error' when the long high is received;
In the first short high state, when the short low is received, the transition to the second short low state is output, bit '0' is output, and when the long low is received, the transition is made to the long low state and bit '0'. Outputting ';
In the long low state, when the short high is input, the state transitions to the second short high state, outputs a bit '1', and when the long high is received, the state transitions to the long high state, and the bit '1'Outputting; And
In the second short high state, when the short low is received, the device transitions to the first short low state but does not output a bit. When the long low is received, the short low state is changed to the long low state, and a bit error occurs. Step to output
Manchester code decoding method comprising a. The method of claim 6, wherein the reference time is,
The Manchester code decoding method which is less than or equal to the synchronous clock of the transmitting side which transmitted the signal encoded with the said Manchester code.
KR1020110093035A 2011-09-15 2011-09-15 Apparatus and method for decoding manchester code KR20130029643A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114337677A (en) * 2021-12-21 2022-04-12 中国电子科技集团公司第五十八研究所 Single-port Manchester decoding system and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114337677A (en) * 2021-12-21 2022-04-12 中国电子科技集团公司第五十八研究所 Single-port Manchester decoding system and method
CN114337677B (en) * 2021-12-21 2023-11-03 中国电子科技集团公司第五十八研究所 Single-port Manchester decoding system and method

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