KR20050076088A - Audio decoding system and audio format detecting method - Google Patents

Abstract

The present invention relates to an apparatus and method for determining whether an SPDIF input format is PCM or bitstream in an audio decoder. In particular, it is possible to determine whether the audio data input by itself in the audio decoder is a PCM or a bitstream and to decode the audio data according to the determination result, so that the audio data that may occur when the input audio data is converted from the SPDIF PCM to the SPDIF bitstream Malfunction of the decoder can be minimized. In addition, by detecting the format conversion of the audio data input by the audio decoder itself, it is possible to reduce the burden on the CPU to suppress expensive CPU usage, thereby reducing the price of the audio decoding system.

Description

Audio decoding system and audio format detecting method

The present invention relates to an audio decoding system, and more particularly, to an audio format detection method for determining whether an SPDIF input format is a PCM or a bitstream in an audio decoder.

In general, audio data is transmitted using three pins: real audio data, sampling clock, and left-right clock.

The Sony / Philips Digital Interface (SPDIF) is a general name of IEC60958 / 61937 and is an audio data transmission format jointly developed by SONY / PHILIPS. In other words, it is a digital signal of Sony's and Philips' standard ad hoc standards and is mainly used for digital transmission between products sold to consumers.

In addition, the SPDIF format uses a bi-phase mark technique that includes a sampling clock and a left-right clock in data and transmits it to one pin. Therefore, the advantage of the pin is much simpler than the conventional method.

In addition, the I ² S signal is a difficult signal to handle because the loss of the signal is prone to occur when the length of the wire is synchronous, and the multiple lines are used. In the case of the SPDIF signal, the data and the clock are controlled through one line. Because they transmit all of them, accurate transmission is possible even with slight attenuation during transmission.

These SPDIF signals are widely used in sound cards, including CDP, MD, Digital Compact Cassette (DDC), Digital Audio Tape (DAT), DAC, and A / V amplifiers.

Because of these advantages, SPDIF has become so widely used that it has become the basic spec for audio decoding systems.

FIG. 1 is a block diagram illustrating a general audio decoding system. When a commercially available SPDIF receiver 101 decodes an external bi-phase marked SPDIF data, the information in the SPDIF header or channel status data is decoded. Output to the audio decoding control unit 102. In addition, the SPDIF receiver 101 restores the left-right clock and the sampling clock from the bi-phase marked SPDIF data and outputs the decoded SPDIF data to the audio decoder 103 together with the decoded SPDIF data.

The audio decoding control unit 102 outputs decoding information about data to be currently decoded to the audio decoder 103.

The audio decoder 103 decodes the input SPDIF data by using the decoding information of the audio decoding control unit 102, the left-right clock, and the sampling clock.

That is, the audio decoding control unit 102 outputs, from the header or channel state data information, to the audio decoder 103 whether the externally input SPDIF data type is PCM, bitstream, consumer mode or professional mode, and the like. The decoder 103 decodes SPDIF data based on this information.

The SPDIF data input to the audio decoding system may be a PCM type, a bitstream type, or may be converted from a PCM to a bitstream or a bitstream to a PCM during input.

2A and 2B show audio bitstream frame format structures of left and right channels of SPDIF when audio data coding uses an AC3 encoding algorithm.

That is, when the SPDIF input is an audio bitstream, four bytes of syncwords are inserted every 1536 samples as shown in FIGS. 2A and 2B. In the left channel, the sync word has a value of 0000F872 as shown in FIG. 2A, and in the right channel, the sync word has a value of 00004E1F as shown in FIG. 2B. In contrast, if the SPDIF input is PCM, only audio samples will continue to come in without sync words.

The following describes the audio decoding process when the input SPDIF data is converted from the PCM to the bitstream.

That is, the audio decoding control unit 102 outputs the changed information to the audio decoder 103 when the input SPDIF data type is changed from PCM to bitstream.

The audio decoder 103 decodes the data input through the SPDIF receiver 101 as a PCM, and recognizes the SPDIF data as a bitstream when the audio decoding controller 102 gives the information that the SPDIF data is a bitstream. And decode accordingly.

However, if the audio decoding control unit 102 outputs this information to the audio decoder 103 after a significant delay, during the delay period, the audio decoder 103 has no choice but to malfunction due to wrong information. Cause an error at the audio output.

That is, when the input data is converted from the PCM to the bitstream, the audio decoder 103 regards the input data type as PCM and decodes the input data format until the audio decoding control unit 102 informs the input data format conversion information. . Therefore, the wrong output will go out during that period, and in the worst case, the wrong output may go through the speaker as noise.

In order to prevent this, the audio decoding control unit 102 should update the input data format conversion information as soon as possible, in real time, and transmit the information to the audio decoder.

However, this means that the load of the audio decoding controller 102, that is, the CPU on the system becomes large, and eventually, there is a disadvantage that an expensive CPU must be used.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to determine a data format input from an audio decoder by itself, thereby causing a malfunction that may occur when the SPDIF data format is converted without using an expensive CPU. It is to provide an audio decoding system that prevents.

An audio decoding system according to the present invention for achieving the above object, SPDIF receiving unit for recovering the left-right clock and the sampling clock from the input SPDIF audio data and outputs it with the actual SPDIF audio data; And an audio decoder for determining whether the audio data format is switched from the actual SPDIF audio data output from the SPDIF receiving unit, and decoding the actual SPDIF audio data using the determination result, the left-right clock, and a sampling clock. It is characterized by.

The audio decoder includes a left channel data buffer for storing SPDIF audio data of an input left channel, a left channel sync detection unit for detecting a left word sync word from SPDIF audio data of an input left channel, and an SPDIF of an input right channel A right channel data buffer for storing audio data, a right channel sync detector for detecting a right word sync word from SPDIF audio data of the right channel input, and a left and right channel sync word for the left channel sync detector A bitstream discriminating unit for discriminating an input SPDIF audio data format into a bitstream when a sync word of a channel is detected at the same time; Decoding section for decoding audio data And it is characterized in that configuration.

The left channel synchronization detector includes a left register for temporarily storing SPDIF audio data of a left channel which is serially input, a delay for delaying an output of the left register for a predetermined period, and a lower synchronization of the left channel from an output of the left register. A sync byte check unit for detecting a byte, and if a low sync byte of a left channel is detected by the sync byte check unit, it is checked whether the output of the delay unit is zero. It is characterized by consisting of a zero check unit.

The right channel synchronization detector includes a right register for temporarily storing SPDIF audio data of a right channel input serially, a delayer for delaying an output of the right register for a predetermined period, and a lower synchronization of the right channel from an output of the right register. A sync byte check unit for detecting a byte, and if the lower sync byte of the right channel is detected by the sync byte check unit, it is determined whether the output of the delay unit is zero. It is characterized by consisting of a zero check unit.

In the audio data format detection method of an audio decoding system including an audio decoder according to the present invention, the audio decoder is

(a) detecting a sync word of a left channel from input SPDIF audio data of a left channel;

(b) detecting a sync word of a right channel from input SPDIF audio data of the right channel;

(c) determining the input SPDIF audio data format as a bitstream when the sync words of the left and right channels are simultaneously detected in steps (a) and (b); And

and (d) decoding the input SPDIF audio data according to the bitstream format when it is determined as the bitstream in the step.

In step (c), if the sync word of the left-right channel is detected simultaneously in the steps (a) and (b), wait for one audio frame period and then again in the steps (a) and (b), The process of determining whether the synchronization word is detected simultaneously is repeated a predetermined number of times, and then the detection results are combined to determine whether the final input SPDIF audio data format is converted into a bitstream.

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments taken in conjunction with the accompanying drawings.

Hereinafter, with reference to the accompanying drawings illustrating the configuration and operation of the embodiment of the present invention, the configuration and operation of the present invention shown in the drawings and described by it will be described as at least one embodiment, By the technical spirit of the present invention described above and its core configuration and operation is not limited.

FIG. 3 is a block diagram illustrating an embodiment of an audio data format detection unit included in the audio decoder 103. It is assumed that SPDIF data input to the audio decoder is coded through an AC-3 encoding algorithm. In other words, the audio decoder decodes the input SPDIF audio data using the AC-3 decoding algorithm.

Referring to FIG. 3, the left channel sync detector 310, the left channel data buffer 320, the right channel sync detector 330, the right channel data buffer 340, the bitstream discriminator 350, and the decoder 360 are described. It is composed of

The left channel sync detector 310 stores SPDIF audio data of a left channel serially input in the left channel data buffer 320 and simultaneously detects a sync word of the left channel from the input data and outputs the bitstream discriminator. Output to 350. The right channel sync detector 330 stores SPDIF audio data of a right channel input serially in the right channel data buffer 340, and simultaneously detects a sync word of the right channel from the input data and outputs the bitstream discriminator. Output to 350.

The left channel data buffer 320 temporarily stores the SPDIF audio data of the left channel and outputs it to the decoding unit 360. The right channel data buffer 340 temporarily stores the SPDIF audio data of the right channel and then decodes it. Output to the unit 360.

The bitstream determination unit 350 determines whether the audio data format currently input is a bitstream from the outputs of the left-right channel synchronization detection units 310 and 330 and outputs the determination result to the decoding unit 360.

The decoding unit 360 is output from the left-right channel data buffers 320 and 340 using the left-right clock and sampling clock output from the SPDIF receiving unit 101 and the result of the bitstream determination unit 350. Decode the actual SPDIF left-right data with the AC3 decoding algorithm.

In the present invention configured as described above, the left register 311 of the left channel sync detector 310 stores SPDIF audio data of the left channel serially and outputs them to the delay unit 312 and the sync byte checker 313. .

The delayer 312 is a delayer for delaying data input for two bytes, and the delayed data is stored in the left channel data buffer 320. At the same time, the delayed data is output to the zero confirmation unit 314.

The sync byte checker 313 detects the left lower sync byte, that is, F872 from the output data of the left register 311, and outputs a signal to the zero checker 314 to indicate when F872 is detected.

The zero check unit 314 checks whether the output of the delay unit 312 is 0 when F872 is detected by the sync byte check unit 313.

That is, since the sync word of the left channel is 0000F872, F872 is detected by the sync byte checker 313, and if 0000 is output from the delay unit 312, the zero checker 314 determines that the left sync word 0000F872 is detected. The signal corresponding thereto is output to the bitstream determination unit 350.

At this time, even if F872 is detected by the sync byte detector 313, the zero check unit 314 determines that the left sync word is not the left sync word unless 0000 is output from the zero check unit 312.

Similarly, the right register 331 of the right channel sync detector 330 stores SPDIF audio data of the right channel input serially and outputs the SPDIF audio data to the delay unit 332 and the sync byte checker 333.

The delayer 332 is a delayer for delaying data input for two bytes, and the delayed data is stored in the right channel data buffer 340. At the same time, the delayed data is output to the zero confirmation unit 334.

The sync byte checker 333 detects the right upper sync byte, that is, 4E1F, from the output data of the right register 331, and outputs a signal indicating the signal to the zero checker 334 when 4E1F is detected.

The zero check unit 334 checks whether the output of the delay unit 332 is 0 when 4E1F is detected by the sync byte check unit 333.

That is, since the sync word of the right channel is 00004E1F, 4E1F is detected by the sync byte checker 333, and if 0000 is output from the delay unit 332, the zero check unit 334 determines that the right sync word is detected. The signal corresponding thereto is output to the bitstream determination unit 350.

At this time, even if 4E1F is detected by the sync byte detector 333, the zero check unit 334 determines that the right sync word is not the right sync word if 0000 is not output.

When the left channel sync word is detected by the left channel sync detector 310, and the right channel sync word is detected by the right channel sync detector 330, the bit stream determination unit 350 performs a bit stream. Is determined. The determination result of the bitstream determination unit 350 is output to the decoding unit 360.

In this case, the bitstream determination unit 350 may notify the decoding unit 360 of the presence or absence of a bitstream detection using a warning bit. For example, while resetting the warning bit value output to the decoder 360 to 0, the left channel sync word is detected by the left channel sync detector 310, and the right channel sync is detected by the right channel sync detector 330. If a word is detected, the warning bit is set to one. When the warning bit is changed from 0 to 1, the decoding unit 360 determines that the audio data format has been converted from the PCM to the bitstream, and immediately decodes the audio data that is appropriately adapted to the bitstream format.

That is, the decoding unit 360 uses the left-right clock and sampling clock output from the SPDIF receiving unit 101 and the warning bits of the bitstream determination unit 350 to transmit the left-right channel data buffers 320 and 340. Decode the left-right channel audio data output by the AC3 decoding algorithm.

In this case, in order to increase the reliability of bitstream discrimination, the warning bit may be composed of a plurality of bits.

For example, suppose that the warning bit is composed of 2 bits, and the decoding unit 350 determines that the audio data format has been converted into a bitstream only when the warning bits of both bits are 1. In this case, when the left channel sync word is detected by the left channel sync detector 310, and the right channel sync word is detected by the right channel sync detector 330, the bitstream determiner 350 sets the lower warning bit to 1. Then, after one frame period, when the left channel sync word is detected by the left channel sync detector 310 and the right channel sync word is detected by the right channel sync detector 330, the upper warning bit is set to one. This is because the sync word is inserted regularly every frame.

In this case, the number of warning bits may be used according to each application. That is, the simpler the structure of the audio data format detection unit is, the faster it is possible to detect a change in the input data format. However, when the actual audio data and the sync word are coincidentally, the probability of detecting a non-conversion as a switch increases. Thus, the higher the number of warning bits, the slower the detection of switching of the input audio data format, but the lower the probability of detection error.

4 is a flowchart illustrating an audio format conversion detection process of the present invention, and shows an example in which a warning bit is 2 bits.

First, the standby clock is set by the number of samples per frame according to the decoding system of the audio data (step 401).

In the case of AC-3, since one audio frame is composed of 1536 samples as shown in FIG. 2, the clock set at this time is 1536. In this case, the standby clock set in step 301 becomes 1536 clock. This is because the sync word is regularly inserted every frame as shown in FIG. That is, if the sync word is detected again one frame after the sync word is detected, it is determined that the input audio data format is a bitstream.

After setting the standby clock in step 401, the warning bit is reset (step 402), and the SPDIF audio data inputted through the serial is searched.

That is, if the left channel sync detector 310 detects the SPDIF audio bitstream left sync word 0000F872 (step 403) and at the same time the right channel sync detector 330 detects the SPDIF audio bitstream right sync word 00004E1F (step 404). In step 405, the lower warning bit is set to 1 while waiting for the number of waiting clocks set in step 401.

After the waiting clock number has passed, the left channel sync detector 310 detects the SPDIF audio bitstream left sync word 0000F872 (step 406), and simultaneously the right channel sync detector 330 detects the SPDIF audio bitstream right sync word 00004E1F. Check if it is detected (step 407). If it is determined that the left-right sync word has been detected in this step, the upper warning bit is set to 1 (step 408).

The decoder 360 decodes the left-right channel audio data output from the left-right channel data buffers 320 and 340 using an AC3 decoding algorithm by using a left-right clock and a sampling clock output from the SPDIF receiver 101. When the warning bits (1: 0) output from the bitstream determination unit 350 are all 1s, the audio data format is converted into a bitstream and the audio data input is decoded accordingly.

In other words, when the warning bits (1: 0) are all 1s, one audio frame data is input after one sync word input, and the sync word is input again. In this case, the input audio data format is changed from PCM to bitstream. To consider.

In this case, if the audio decoder detects a change in the audio data format before the audio decoder converts the audio data format from the audio decoder to the audio decoder, the audio decoder output endures only a malfunction of two audio frames. Noise can be minimized.

As described above, according to the audio decoding system and the audio data format detecting unit according to the present invention, by determining whether the audio data inputted within the audio decoder itself is a PCM or a bitstream, and decoding the audio data input according to the determination result, The malfunction of the audio decoder that may occur when the input audio data is converted from the SPDIF PCM to the SPDIF bitstream can be minimized.

In addition, by detecting the format conversion of the audio data input by the audio decoder itself, it is possible to reduce the burden on the CPU to suppress expensive CPU usage, thereby reducing the price of the audio decoding system.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

1 is a block diagram of a general audio decoding system

2A and 2B show examples of left-right audio data frames for AC3.

3 is a detailed block diagram of an audio decoder in an audio decoding system according to the present invention.

4 is a flowchart illustrating an example of an audio format detection method in an audio decoder according to the present invention.

Explanation of symbols for main parts of the drawings

310: left channel sync word detector 311: left register

312,332: Delay 313,333: Synchronization byte check unit

314,334: zero check unit 320: left channel data buffer

330: right channel sync word detector

340: right channel data buffer 350: bitstream determination unit

360: decoding unit

Claims (11)

An audio decoding system for receiving and decoding SPDIF audio data, An SPDIF receiver for restoring the left-right clock and the sampling clock from the input SPDIF audio data and outputting the same along with the actual SPDIF audio data; And an audio decoder for determining whether the audio data format is switched from the actual SPDIF audio data output from the SPDIF receiving unit, and decoding the actual SPDIF audio data by using the determination result, the left-right clock, and a sampling clock. Audio decoding system, characterized in that. The method of claim 1, wherein the audio decoder A left channel data buffer for storing SPDIF audio data of an input left channel; A left channel sync detector for detecting a sync word of the left channel from the input SPDIF audio data of the left channel; A right channel data buffer for storing SPDIF audio data of an input right channel; A right channel sync detector for detecting a sync word of the right channel from the input SPDIF audio data of the right channel; A bitstream discriminating unit for discriminating an input SPDIF audio data format as a bitstream when the left-right channel sync detecting unit detects a sync word of a left channel and a sync word of a right channel at the same time; And a decoding unit for decoding the left-right channel SPDIF audio data output from the left-right channel data buffer according to a determination result of the bitstream determination unit. The method of claim 2, wherein the left channel sync detection unit Left register for temporarily storing SPDIF audio data of the left channel inputted serially; A delay unit for delaying an output of the left register for a preset period of time; A synchronization byte confirmation unit for detecting a lower synchronization byte of the left channel from the output of the left register; When the lower sync byte of the left channel is detected by the sync byte confirming unit, it is determined that the output of the delay unit is zero. Decoding system. The method of claim 3, wherein And a delay period of the delay unit is set by an upper sync byte size of a left channel. The method of claim 3, wherein The sync word of the left channel has a pattern value of 0000F872 for AC3 encoding. The method of claim 2, wherein the right channel sync detection unit A right register for temporarily storing SPDIF audio data of a right channel inputted serially; A delayer for delaying the output of the right register for a preset period of time; A synchronization byte confirmation unit for detecting a lower synchronization byte of the right channel from the output of the right register; When the lower sync byte of the right channel is detected by the sync byte confirming unit, it is determined that the output of the delay unit is zero. Decoding system. The method of claim 6, And a delay period of the delay unit is set by an upper sync byte size of a right channel. The method of claim 6, The sync word of the right channel has a pattern value of 00004E1F for AC3 encoding. The method of claim 2, wherein the bitstream determination unit And a left-right sync word detected by the left-right channel sync detector at the same time to determine the input SPDIF audio data format as a bitstream and output the result to the decoder. An audio data format detection method of an audio decoding system comprising an audio decoder for decoding SPDIF audio data using a left-right clock and a sampling clock. The audio decoder is (a) detecting a sync word of a left channel from input SPDIF audio data of a left channel; (b) detecting a sync word of a right channel from input SPDIF audio data of the right channel; (c) determining the input SPDIF audio data format as a bitstream when the sync words of the left and right channels are simultaneously detected in steps (a) and (b); And and (d) decoding the input SPDIF audio data according to the bitstream format when it is determined as the bitstream in the step. The method of claim 10, wherein step (c) If the sync words of the left and right channels are detected simultaneously in the above steps (a) and (b), wait for one audio frame period and then again if the sync words of the left and right channels are detected simultaneously in the steps (a) and (b). And repeating the process of determining a predetermined number of times and combining the detection results at this time to determine whether the final input SPDIF audio data format has been converted to a bitstream.