KR20130028291A - Light emitting device, and light emitting device package - Google Patents

Light emitting device, and light emitting device package Download PDF

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Publication number
KR20130028291A
KR20130028291A KR1020110091733A KR20110091733A KR20130028291A KR 20130028291 A KR20130028291 A KR 20130028291A KR 1020110091733 A KR1020110091733 A KR 1020110091733A KR 20110091733 A KR20110091733 A KR 20110091733A KR 20130028291 A KR20130028291 A KR 20130028291A
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South Korea
Prior art keywords
light emitting
layer
emitting device
semiconductor layer
barrier layers
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KR1020110091733A
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Korean (ko)
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이선균
심상균
나종호
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엘지이노텍 주식회사
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Priority to KR1020110091733A priority Critical patent/KR20130028291A/en
Publication of KR20130028291A publication Critical patent/KR20130028291A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE: A light emitting device and a light emitting device package including the same are provided to improve hole injection efficiency by spreading a fluorescent substance on a light emitting chip. CONSTITUTION: A second conductive semiconductor layer(123) is formed on a first conductive semiconductor layer(117). An active layer(119) is arranged between the first conductive semiconductor layer and the second conductive semiconductor layer. The active layer includes well layers(W1-W3) and barriers(B1-B4).

Description

LIGHT EMITTING DEVICE, AND LIGHT EMITTING DEVICE PACKAGE}

Embodiments relate to a light emitting device and a light emitting device package.

A light emitting diode (LED) is a light emitting element that converts current into light. Recently, light emitting diodes have been increasingly used as a light source for displays, a light source for automobiles, and a light source for illumination because the luminance gradually increases.

In recent years, high output light emitting chips capable of realizing full color by generating short wavelength light such as blue or green have been developed. By applying a phosphor that absorbs a part of the light output from the light emitting chip and outputs a wavelength different from the wavelength of the light, the light emitting diodes of various colors can be combined and a light emitting diode emitting white light can be realized Do.

The light emitting diode is disclosed in Korean Application No. 10-2007-0129798 to improve the hole injection efficiency into the active layer.

The embodiment provides a light emitting device in which the luminous efficiency is increased.

In an embodiment, a first conductive semiconductor layer, a second conductive semiconductor layer on the first conductive semiconductor layer, and a plurality of well layers are disposed between the first conductive semiconductor layer and the second conductive semiconductor layer. And an active layer in which a plurality of barrier layers are alternately disposed, and the plurality of barrier layers have an inflection point of an energy band gap in a central region.

The light emitting device of the embodiment increases the amount of light emitted by improving the internal quantum efficiency of the active layer. That is, in the embodiment, the holes injected into the active layer can be dispersed in different quantum well layers, thereby improving the luminous intensity through the recombination rate of the holes.

1 is a cross-sectional view of a light emitting device according to the first embodiment.
FIG. 2 is an energy band diagram of the active layer of FIG. 1.
3 is an energy band diagram of an active layer according to a second embodiment.
4 is a graph illustrating a wavelength spectrum of the light emitting device of FIG. 2.
5 is a graph illustrating a wavelength spectrum of the light emitting device of FIG. 3.
6 is a view showing a light emitting device having a horizontal electrode structure using the light emitting device of FIG.
7 is a view illustrating a light emitting device having a vertical electrode structure using the light emitting device of FIG. 1.
8 is a view illustrating a light emitting device package having the light emitting device of FIG. 5.
9 is a diagram illustrating a display device according to an exemplary embodiment.
10 is a diagram illustrating another example of a display device according to an exemplary embodiment.
11 is a view showing a lighting apparatus according to an embodiment.

Hereinafter, a light emitting device according to an embodiment and a method of manufacturing the same will be described in detail with reference to the accompanying drawings. In the description of the embodiments, it is to be understood that each layer (film), region, pattern or structure may be formed "on" or "under" a substrate, each layer The terms " on "and " under " include both being formed" directly "or" indirectly " Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings. The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

1 is a cross-sectional view of a light emitting device according to the first embodiment.

Referring to FIG. 1, the light emitting device 100 includes a substrate 111, a buffer layer 113, a low conductive layer 115, a first conductive semiconductor layer 117, an active layer 119, and a second conductive cladding layer. And a second conductive semiconductor layer 123.

The substrate 111 may be a light transmissive, insulating or conductive substrate, for example, sapphire (Al 2 O 3 ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, Ga 2 O 3 , At least one of LiGaO 3 may be used. A plurality of protrusions 112 may be formed on an upper surface of the substrate 111, and the plurality of protrusions 112 may be formed through etching of the substrate 111 or may have a light extraction structure such as a separate roughness. It can be formed as. The protrusion 112 may include a stripe shape, a hemispherical shape, or a dome shape. The thickness of the substrate 111 may be formed in the range of 30㎛ ~ 150㎛, but is not limited thereto.

A plurality of compound semiconductor layers may be grown on the substrate 111, and the growth equipment of the plurality of compound semiconductor layers may be an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), or plasma laser deposition (PLD). It can be formed by a dual-type thermal evaporator sputtering, metal organic chemical vapor deposition (MOCVD), and the like, but is not limited to such equipment.

A buffer layer 113 may be formed on the substrate 111, and the buffer layer 113 may be formed of at least one layer using group 2 to group 6 compound semiconductors. The buffer layer 113 includes a semiconductor layer using a group III-V group compound semiconductor, for example, In x Al y Ga 1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y A semiconductor having a compositional formula of ≦ 1) includes at least one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, and the like. The buffer layer 113 may be formed in a super lattice structure by alternately arranging different semiconductor layers. The buffer layer 113 may mitigate a difference in lattice constant between the substrate 111 and a nitride-based semiconductor layer. It can be formed to give, and can be defined as a defect control layer. The buffer layer 113 may have a value between lattice constants between the substrate 111 and the nitride-based semiconductor layer. The buffer layer 113 may be formed of an oxide such as a ZnO layer, but is not limited thereto. The buffer layer 113 may be formed in the range of 30 to 500 nm, but is not limited thereto.

A low conductive layer 115 is formed on the buffer layer 113, and the low conductive layer 115 is an undoped semiconductor layer and has a lower electrical conductivity than that of the first conductive semiconductor layer 117. The low conductive layer 115 may be implemented as a GaN-based semiconductor using a group III-V compound semiconductor, and the undoped semiconductor layer may have a first conductivity type even without intentionally doping a conductive dopant. The undoped semiconductor layer may not be formed, but is not limited thereto. The low conductive layer 115 may be formed between the first conductive semiconductor layers 117.

The first conductive semiconductor layer 117 may be formed on the low conductive layer 115. The first conductive semiconductor layer 117 is formed of a Group III-V compound semiconductor doped with a first conductive dopant, and is, for example, In x Al y Ga 1- x- y N (0 ≦ x ≦ 1, 0 Y? 1, 0? X + y? 1). When the first conductive semiconductor layer 117 is an n-type semiconductor layer, the dopant of the first conductive type is an n-type dopant and includes Si, Ge, Sn, Se, and Te.

At least one of the low conductive layer 115 and the first conductive semiconductor layer 117 may have a superlattice structure in which different first and second layers are alternately arranged, and the first layer And the thickness of the second layer may be formed to a number A or more.

A first conductive clad layer (not shown) may be formed between the first conductive semiconductor layer 117 and the active layer 119. The first conductive cladding layer may be formed of a GaN-based semiconductor, and the first conductive cladding layer serves to constrain the carrier. The first clad layer (not shown) may be formed of an InGaN layer or an InGaN / GaN superlattice structure, but is not limited thereto. The first clad layer may be doped with n-type or p-type.

An active layer 119 is formed on the first conductive semiconductor layer 117. The active layer 119 may be formed of at least one of a single well, a single quantum well, a multi well, a multi quantum well (MQW), a quantum line, and a quantum dot structure. The well layer may be a well layer having continuous energy levels. In addition, the well layer may be a quantum well in which the energy level is quantized. In the active layer 119, a quantum well layer W1-W3 and a quantum barrier layer B1-B4 are alternately arranged, and a pair of the quantum well layer W1-W3 and the quantum barrier layer B1-B4 are alternately arranged. Although may be formed in 2 to 30 cycles, in the embodiment shown as formed in four cycles. The quantum well layer (W1-W3) are, for example, semiconductor material having a compositional formula of In x Al y Ga 1 -x- y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) It can be formed as. The quantum barrier layer (B1-B4), for example a semiconductor layer having a wider band gap than the band gap of the quantum well layer (W1-W3), In x Al y Ga 1 -x- y N (0≤x≤ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). The pair of quantum well layers W1-W3 and quantum barrier layers B1-B4 includes, for example, at least one of InGaN / GaN, AlGaN / GaN, InGaN / AlGaN, InGaN / InGaN.

The thickness of the quantum well layers W1-W3 may be formed in the range of 1.5 to 5 nm, for example, in the range of 2 to 4 nm. The thickness of the quantum barrier layer (B1-B4) is thicker than the thickness of the quantum well layer (W1-W3) and can be formed in the range of 5 ~ 30nm, for example can be formed in the range of 5 ~ 7nm. The quantum barrier layer B1-B4 may include an n-type dopant, but is not limited thereto.

A second conductive cladding layer 121 is formed on the active layer 119, and the second conductive cladding layer 121 has a band gap higher than the band gap of the quantum barrier layer 133 of the active layer 119. And a III-V compound semiconductor, for example, a GaN-based semiconductor. For example, the second clad layer 121 may include GaN, AlGaN, InAlGaN, InAlGaN superlattice structure, or the like. The second clad layer 121 may be doped with n-type or p-type.

A second conductive semiconductor layer 123 is formed on the second conductive cladding layer 121, and the second conductive semiconductor layer 123 includes a dopant of a second conductive type. The second conductive semiconductor layer 123 may be formed of any one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, and the like. When the second conductive semiconductor layer 123 is a p-type semiconductor layer, the second conductive dopant may be a p-type dopant and may include Mg, Zn, Ca, Sr, and Ba.

The conductive types of the layers of the light emitting structure 150 may be formed to be opposite to each other. For example, the second conductive semiconductor layers 121 and 123 may be N-type semiconductor layers, and the first conductive semiconductor layer 117 may be P-type semiconductors. It can be implemented in layers. An N-type semiconductor layer, which is a third conductive semiconductor layer having a polarity opposite to that of the second conductive type, may be further formed on the second conductive semiconductor layer 123. The semiconductor light emitting device 100 may define the first conductive semiconductor layer 117, the active layer 119, and the second conductive semiconductor layer 123 as a light emitting structure 150. 150) may be implemented as any one of an NP junction structure, a PN junction structure, an NPN junction structure, and a PNP junction structure. The N-P and P-N junctions have an active layer disposed between the two layers, and the N-P-N junction or P-N-P junction includes at least one active layer between the three layers.

Meanwhile, the compound semiconductor layers 113 to 123 on the substrate 111 may be grown by the following growth equipment. The growth equipment may be, for example, an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporator sputtering, metal organic organic chemical vapor deposition (MOCVD) chemical vapor deposition), but is not limited to such equipment.

In the growth method of the active layer 119, for example, NH 3 , TMGa (or TEGa), TMIn, TMAl using H 2 or / and N 2 as a carrier gas under a predetermined growth temperature (eg, 700 to 950 ° C.). The quantum well layer (W1-W3) made of GaN or InGaN, GaN, AlGaN, InGaN or InAlGaN may be selectively supplied to a source to form a quantum barrier layer (B1-B4). The growth temperature is increased while growing the last quantum well structure for the growth of the second conductive clad layer 121. By raising the growth temperature at this time, the thin film properties of the final quantum well structure can be improved.

In the active layer 119 of the embodiment, a plurality of quantum well layers W1-W3 and a plurality of quantum barrier layers B1-B4 are alternately stacked. The indium composition ratio of the plurality of quantum well layers W1-W3 may be in the range of 10 to 13%, the band gap may be 2.75 eV when the peak wavelength is 450 nm, and 2.95 eV when the peak wavelength is 420 nm. The quantum well layers B1-B4 may emit a predetermined peak wavelength within the visible light band from the ultraviolet band, and the band gap of the quantum well layers W1-W3 may be changed according to the peak wavelength. have.

The quantum barrier layers B1-B4 are formed of a nitride semiconductor having an energy band gap wider than that of the quantum well layers W1-W3.

Hereinafter, for convenience of description, the first quantum barrier layer B1 and the first quantum well layer W1 are defined in order of being close to the first conductive semiconductor layer 117, and the second conductive clad layer 121 is formed. Closer to) increases the ordinal number.

In Figure 2 the vertical axis represents the absolute size (eV) of the energy band gap, the horizontal axis represents the growth direction.

The plurality of quantum barrier layers B1-B4 have indium composition ratios of different concentrations.

That is, among the plurality of quantum barrier layers B1-B4, the first quantum barrier layer B1 has the lowest indium composition ratio, and the second quantum barrier layer B2 is higher than the first quantum barrier layer B1. The third quantum barrier layer B3 has a composition ratio higher than that of the second quantum barrier layer B2. At this time, the last quantum barrier layer (B4) has a low indium composition ratio similar to the first quantum barrier layer (B1), so that the indium composition ratio of the plurality of quantum barrier layers (B1-B4) has the highest central region, both ends Has the lowest formation.

In this case, the plurality of quantum well layers W1-W3 may have the same indium composition ratio.

As described above, by providing barriers having various heights, the probability of injecting holes can be improved to increase the probability of recombination of carriers in the quantum well layers W1-W3.

In detail, the first quantum barrier layer B1 may have an indium composition ratio of 0%, and the thickness T1 may be 5 nm. The second quantum barrier layer B2 may have an indium composition ratio of 1%, the third quantum barrier layer B3 may have an indium composition ratio of 2%, and the fourth quantum barrier layer B4 may have an indium composition ratio of 0%.

At this time, the indium composition ratio of the quantum well layer (W1-W3) may be formed of 10 ~ 13%, it may be the same or different from each other.

In FIG. 2, the indium composition ratio of the quantum barrier layers B1 to B4 is described as up to 2%, but may satisfy 3 to 5%.

Therefore, the energy band gaps G1 and G4 of the first and fourth quantum barrier layers B1 and B4 are formed larger than the other quantum barrier layers B2 and B3, and the quantum barrier layers B2 and B3 of the intermediate region are formed. The band gaps G2 and G3 may have lower shapes.

The thicknesses T1 of the plurality of quantum barrier layers B1-B4 may be identical to each other, may be about 5 nm, and the thicknesses T2 of the plurality of quantum well layers W1-W3 may be identical to each other. And about 3 nm.

In this case, the indium composition ratio may be controlled to have a step in the edge region of each of the quantum barrier layers B1-B4.

That is, in the case of the second quantum barrier layer B2, the stepped region has a thickness of 5 nm, an indium composition ratio of 1%, and an indium composition ratio higher than the intermediate region in both edge regions of the second quantum barrier layer B2. (G21, G22) may be included.

The stepped regions G21 and G22 may have the same composition ratio, but may have different composition ratios.

The stepped regions G21 and G22 of the second quantum barrier layer B2 may have a band gap smaller than that of the middle region of the second quantum barrier layer B2 since the stepped regions G21 and G22 have an indium composition ratio of 2%.

The stepped regions G11, G21, G22, G31, G32, and G41 may be applied to all of the first, third, and fourth quantum barrier layers B1, B3, and B4.

Thus, by forming the quantum well structure stepped to increase the overlap of the wave function of electrons and holes, and by gently forming the band gap of the quantum well structure can improve the luminescence recombination force to improve the current flow. Therefore, the internal quantum efficiency is increased and finally the amount of light can be increased.

The thickness T3 of the stepped regions G11, G21, G22, G31, G32, and G41 of each of the quantum barrier layers B1 to B4 may be 0.5 nm, and may be narrower than this.

3 is a diagram illustrating an energy band diagram of an active layer according to a second embodiment.

Referring to FIG. 3, in the active layer 119, quantum well layers W1-W3 and quantum barrier layers B1-B4 are alternately disposed.

In this case, the indium composition ratio of the quantum barrier layers B1-B4 may be controlled to have different band gaps G1-G4. The indium composition ratio has 0% of the lowest indium composition ratio of the second and third quantum barrier layers B2 and B3 in the central region, and the indium composition ratio of the first and fourth quantum barrier layers B1 and B4 is 1 to 1. May be 2%.

The indium composition ratio of the quantum barrier layers B1-B4 may be up to 5%, and the indium composition ratio of the barrier layers B2 and B3 in the central region may be lowered to form a larger convex shape in FIG. 3.

In the case of the embodiment of FIG. 3, the widths T1, T2, T3 of each barrier layer B1-B4, the stepped regions G11, G21, G22, G31, G32, G41 and the well layers W1-W3 are shown in FIG. Since it is the same as the embodiment 2, the description thereof is omitted.

The light emitting device of FIG. 3 includes stepped regions G11, G21, G22, G31, G32, and G41 having an indium composition ratio higher than that of the center region in the edge region of each barrier layer B1-B4.

The composition ratio of the stepped regions G11, G21, G22, G31, G32, and G41 may be 1 to 2% higher than the intermediate region, and a band gap may be gently formed by giving a step to the edge region.

Hereinafter, the effects of FIGS. 2 and 3 will be described with reference to FIGS. 4 and 5.

The comparative example Ref of FIGS. 4 and 5 shows the internal quantum efficiency IQE of the light emitting device in which the plurality of barrier layers have the same energy band gap.

Since the current density of the general light emitting device is 100 A / cm 2 or less, the difference in the front of the graph current density of FIG. 4 and FIG. 5 is 100 A / cm 2 or less is examined.

In the case of FIG. 4, when the energy band gap has a plurality of quantum barrier layers B1-B4 formed to be concave downward, the internal quantum efficiency is more rapidly increased than the comparative example Ref having the same height.

In the case of FIG. 5, when the energy band gap has a plurality of quantum barrier layers B1-B4 convex upward, the internal quantum efficiency is more rapidly increased than that of the comparative example Ref having the same height.

6 is an example of a horizontal light emitting device using the light emitting device of FIG. 1.

Referring to FIG. 6, in the light emitting device 101, an electrode layer 141 and a second electrode 145 are formed on a light emitting structure 150, and a first electrode 143 is formed on the first conductive semiconductor layer 117. Is formed.

The electrode layer 141 is a current diffusion layer and may be formed of a material having transparency and electrical conductivity. The electrode layer 141 may be formed to have a refractive index lower than that of the compound semiconductor layer.

The electrode layer 141 is formed on an upper surface of the second conductive semiconductor layer 123, and the material may be indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), or indium aluminum (AZO). zinc oxide (IGZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), ZnO, IrOx, RuOx, NiO, etc. Selected, and may be formed of at least one layer. The electrode layer 141 may be formed as a reflective electrode layer, and the material may be selectively formed among, for example, Al, Ag, Pd, Rh, Pt, Ir, and two or more alloys thereof.

The second electrode 145 may be formed on the second conductive semiconductor layer 123 and / or the electrode layer 141, and may include an electrode pad. The second electrode 145 may further include a current spreading pattern having an arm structure or a finger structure. The second electrode 145 may be made of a metal having the characteristics of an ohmic contact, an adhesive layer, and a bonding layer, but is not limited thereto.

A first electrode 143 is formed on a portion of the first conductive semiconductor layer 117. The first electrode 143 and the second electrode 145 are Ti, Ru, Rh, Ir, Mg, Zn, Al, In, Ta, Pd, Co, Ni, Si, Ge, Ag, Au and Au It can be chosen from the optional alloys.

An insulating layer may be further formed on the surface of the light emitting device 101, and the insulating layer may prevent an interlayer short of the light emitting structure 145 and prevent moisture penetration.

7 illustrates an example of a vertical light emitting device using the light emitting device of FIG. 1.

Referring to FIG. 7, a current blocking layer 161, a channel layer 163, and a second electrode 170 are disposed under the light emitting structure 150. The current blocking layer 161 is SiO 2 , SiO x , SiO x N y , Si 3 N 4 , Al 2 O 3 , TiO 2 It may include at least one of the, at least one may be formed between the channel layer 163.

The current blocking layer 161 is disposed to correspond to the thickness direction of the first electrode 181 and the light emitting structure 150 disposed on the light emitting structure 117. The current blocking layer 161 may block a current supplied from the second electrode 170 and diffuse it in another path.

The channel layer 163 is formed along the bottom edge of the second conductive semiconductor layer 123 and may be formed in a ring shape, a loop shape, or a frame shape. The channel layer 163 may include at least one of ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, SiO 2 , SiO x , SiO x N y , Si 3 N 4 , Al 2 O 3 , and TiO 2 . It may include. An inner portion of the channel layer 163 is disposed under the second conductive semiconductor layer 123, and an outer portion of the channel layer 163 is disposed outside the side of the light emitting structure 150.

The second electrode 170 may be formed under the second conductive semiconductor layer 123. The second electrode 170 may include a plurality of conductive layers 165, 167, and 169.

The second electrode 170 includes an ohmic contact layer 165, a reflective layer 167, and a bonding layer 169. The ohmic contact layer 165 may be a low conductive material such as ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, or a metal of Ni or Ag. A reflective layer 167 is formed under the ohmic contact layer 165, and the reflective layer 167 is formed of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, and a combination thereof. It may be formed into a structure including at least one layer of a material selected from the group consisting of. The reflective layer 167 may be contacted under the second conductive semiconductor layer 123, and may be in ohmic contact with a metal, or ohmic contact with a low conductive material such as ITO, but is not limited thereto.

A bonding layer 169 is formed below the reflective layer 167, and the bonding layer 169 may be used as a barrier metal or a bonding metal, and the material may be, for example, Ti, Au, Sn, Ni, Cr, And at least one of Ga, In, Bi, Cu, Ag, and Ta and an optional alloy.

A support member 173 is formed below the bonding layer 169, and the support member 173 may be formed as a conductive member. The materials may include copper (Cu-copper), gold (Au-gold), and nickel. (Ni-nickel), molybdenum (Mo), copper-tungsten (Cu-W), and a carrier wafer (eg, Si, Ge, GaAs, ZnO, SiC, etc.). As another example, the support member 173 may be implemented as a conductive sheet.

Here, the substrate of FIG. 1 is removed. The growth method of the growth substrate may be removed by a physical method (eg, laser lift off) or / and a chemical method (eg, wet etching) to expose the first conductive semiconductor layer 117. Isolation is performed in the direction in which the substrate is removed to form a first electrode 181 on the first conductive semiconductor layer 117.

The upper surface of the first conductive semiconductor layer 117 may be formed of a light extraction structure 117A such as roughness. An outer portion of the channel layer 163 may be exposed to an outer side of the sidewall of the light emitting structure 150, and an inner portion of the channel layer 163 may be in contact with a lower surface of the second conductive semiconductor layer 123.

Accordingly, a light emitting device 102 having a vertical electrode structure having a first electrode 181 on the light emitting structure 150 and a support member 173 below may be manufactured.

8 is a view illustrating a light emitting device package having the light emitting device of FIG. 6.

Referring to FIG. 8, the light emitting device package 200 may include a body 210, a first lead electrode 211 and a second lead electrode 212 at least partially disposed on the body 210, and the body ( The light emitting device 101 electrically connected to the first lead electrode 211 and the second lead electrode 212 on the 210 and a molding surrounding the light emitting device 101 on the body 210. The member 220 is included.

The body 210 may include a silicon material, a synthetic resin material, or a metal material. The body 210 includes a reflector 215 having a cavity therein and an inclined surface around the cavity 210 when viewed from above.

The first lead electrode 211 and the second lead electrode 212 are electrically separated from each other, and may be formed to penetrate the inside of the body 210. That is, some of the first lead electrode 211 and the second lead electrode 212 may be disposed inside the cavity, and the other part may be disposed outside the body 210.

The first lead electrode 211 and the second lead electrode 212 may supply power to the light emitting device 101, and may reflect light generated from the light emitting device 101 to increase light efficiency. It may also function to discharge the heat generated by the light emitting device 101 to the outside.

The light emitting device 101 may be installed on the body 210 or on the first lead electrode 211 or / and the second lead electrode 212.

The wire 216 of the light emitting device 101 may be electrically connected to either the first lead electrode 211 or the second lead electrode 212, but is not limited thereto.

The molding member 220 may surround the light emitting device 101 to protect the light emitting device 101. In addition, the molding member 220 may include a phosphor, and the wavelength of light emitted from the light emitting device 101 may be changed by the phosphor.

The light emitting device or the light emitting device package according to the embodiment may be applied to the light unit. The light unit includes a structure in which a plurality of light emitting devices or light emitting device packages are arranged, and includes a display device shown in FIGS. 9 and 10 and a lighting device shown in FIG. 11. Etc. may be included.

9 is an exploded perspective view of a display device according to an exemplary embodiment.

Referring to FIG. 9, the display device 1000 includes a light guide plate 1041, a light emitting module 1031 providing light to the light guide plate 1041, a reflective member 1022 under the light guide plate 1041, and the light guide plate 1041. A bottom cover 1011 that houses an optical sheet 1051 on the light guide plate 1041, a display panel 1061 on the optical sheet 1051, the light guide plate 1041, a light emitting module 1031, and a reflective member 1022. ), But is not limited thereto.

The bottom cover 1011, the reflective sheet 1022, the light guide plate 1041, and the optical sheet 1051 can be defined as a light unit 1050.

The light guide plate 1041 serves to diffuse the light provided from the light emitting module 1031 to make a surface light source. The light guide plate 1041 is made of a transparent material, for example, acrylic resin-based such as polymethyl metaacrylate (PMMA), polyethylene terephthlate (PET), polycarbonate (PC), cycloolefin copolymer (COC), and polyethylene naphthalate (PEN). It may include one of the resins.

The light emitting module 1031 is disposed on at least one side of the light guide plate 1041 to provide light to at least one side of the light guide plate 1041, and ultimately serves as a light source of the display device.

The light emitting module 1031 may include at least one, and may provide light directly or indirectly at one side of the light guide plate 1041. The light emitting module 1031 may include a board 1033 and a light emitting device package 200 according to the above-described embodiment, and the light emitting device package 200 may be arranged on the board 1033 at predetermined intervals. have. The board may be a printed circuit board, but is not limited thereto. In addition, the board 1033 may include a metal core PCB (MCPCB, Metal Core PCB), flexible PCB (FPCB, Flexible PCB) and the like, but is not limited thereto. When the light emitting device package 200 is mounted on the side surface of the bottom cover 1011 or the heat dissipation plate, the board 1033 may be removed. A part of the heat radiation plate may be in contact with the upper surface of the bottom cover 1011. Therefore, heat generated in the light emitting device package 200 may be discharged to the bottom cover 1011 via the heat dissipation plate.

The plurality of light emitting device packages 200 may be mounted on the board 1033 such that an emission surface on which light is emitted is spaced apart from the light guide plate 1041 by a predetermined distance, but is not limited thereto. The light emitting device package 200 may directly or indirectly provide light to a light incident portion, which is one side of the light guide plate 1041, but is not limited thereto.

The reflective member 1022 may be disposed under the light guide plate 1041. The reflective member 1022 reflects the light incident on the lower surface of the light guide plate 1041 and supplies the reflected light to the display panel 1061 to improve the brightness of the display panel 1061. The reflective member 1022 may be formed of, for example, PET, PC, or PVC resin, but is not limited thereto. The reflective member 1022 may be an upper surface of the bottom cover 1011, but is not limited thereto.

The bottom cover 1011 may house the light guide plate 1041, the light emitting module 1031, the reflective member 1022, and the like. To this end, the bottom cover 1011 may be provided with a housing portion 1012 having a box-like shape with an opened upper surface, but the present invention is not limited thereto. The bottom cover 1011 may be coupled to a top cover (not shown), but is not limited thereto.

The bottom cover 1011 may be formed of a metal material or a resin material, and may be manufactured using a process such as press molding or extrusion molding. In addition, the bottom cover 1011 may include a metal or a non-metal material having good thermal conductivity, but the present invention is not limited thereto.

The display panel 1061 is, for example, an LCD panel, and includes a first and second substrates of transparent materials facing each other, and a liquid crystal layer interposed between the first and second substrates. A polarizing plate may be attached to at least one surface of the display panel 1061, but the present invention is not limited thereto. The display panel 1061 displays information by transmitting or blocking light provided from the light emitting module 1031. The display device 1000 can be applied to video display devices such as portable terminals, monitors of notebook computers, monitors of laptop computers, and televisions.

The optical sheet 1051 is disposed between the display panel 1061 and the light guide plate 1041 and includes at least one light-transmitting sheet. The optical sheet 1051 may include at least one of a sheet such as a diffusion sheet, a horizontal / vertical prism sheet, a brightness enhanced sheet, and the like. The diffusion sheet diffuses incident light, and the horizontal and / or vertical prism sheet concentrates incident light on the display panel 1061. The brightness enhancing sheet reuses the lost light to improve the brightness I will. A protective sheet may be disposed on the display panel 1061, but the present invention is not limited thereto.

The light guide plate 1041 and the optical sheet 1051 may be included as an optical member on the optical path of the light emitting module 1031, but are not limited thereto.

10 is a diagram illustrating a display device having a light emitting device package according to an exemplary embodiment.

Referring to FIG. 10, the display device 1100 includes a bottom cover 1152, a board 1120 on which the light emitting device package 200 disclosed above is arranged, an optical member 1154, and a display panel 1155. .

The board 1120 and the light emitting device package 200 may be defined as a light emitting module 1060. The bottom cover 1152, at least one light emitting module 1060, and the optical member 1154 may be defined as a light unit (not shown).

The bottom cover 1152 may include an accommodating part 1153, but is not limited thereto.

The optical member 1154 may include at least one of a lens, a light guide plate, a diffusion sheet, a horizontal and vertical prism sheet, and a brightness enhancement sheet. The light guide plate may be made of a PC material or a poly methy methacrylate (PMMA) material, and the light guide plate may be removed. The diffusion sheet diffuses the incident light, and the horizontal and vertical prism sheets condense the incident light onto the display panel 1155. The brightness enhancing sheet reuses the lost light to improve the brightness .

The optical member 1154 is disposed on the light emitting module 1060, and performs surface light source, diffusion, condensing, etc. of the light emitted from the light emitting module 1060.

11 is a perspective view of a lighting apparatus according to an embodiment.

Referring to FIG. 11, the lighting device 1500 includes a case 1510, a light emitting module 1530 installed in the case 1510, and a connection terminal installed in the case 1510 and receiving power from an external power source. 1520).

The case 1510 may be formed of a material having good heat dissipation, for example, may be formed of a metal material or a resin material.

The light emitting module 1530 may include a board 1532 and a light emitting device package 200 according to an embodiment mounted on the board 1532. The plurality of light emitting device packages 200 may be arranged in a matrix form or spaced apart at predetermined intervals.

The board 1532 may be a circuit pattern printed on an insulator, and for example, a general printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, FR-4 substrates and the like.

In addition, the board 1532 may be formed of a material that reflects light efficiently, or a surface may be coated with a color such as white, silver, etc., in which the light is efficiently reflected.

At least one light emitting device package 200 may be mounted on the board 1532. Each of the light emitting device packages 200 may include at least one light emitting diode (LED) chip. The LED chip may include a light emitting diode in a visible light band such as red, green, blue, or white, or a UV light emitting diode emitting ultraviolet (UV) light.

The light emitting module 1530 may be arranged to have a combination of various light emitting device packages 200 to obtain color and luminance. For example, a white light emitting diode, a red light emitting diode, and a green light emitting diode may be combined to secure high color rendering (CRI).

The connection terminal 1520 may be electrically connected to the light emitting module 1530 to supply power. The connection terminal 1520 is inserted into and coupled to an external power source in a socket manner, but is not limited thereto. For example, the connection terminal 1520 may be formed in a pin shape and inserted into an external power source, or may be connected to the external power source by a wire.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

111: substrate 113: buffer layer
115: low conductive layer 117: first conductive semiconductor layer
119: active layer 121: second conductive clad layer
123: second conductive semiconductor layer W1-W3: quantum well layer
B1-B4: Quantum Barrier Layer

Claims (13)

A first conductive semiconductor layer,
A second conductive semiconductor layer on the first conductive semiconductor layer, and
An active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein a plurality of well layers and a plurality of barrier layers are alternately disposed;
/ RTI >
And the barrier layers have an inflection point of an energy band gap in a central region. The method of claim 1,
The plurality of barrier layers include a light emitting device in which a barrier layer in a central region has the largest energy band gap, and the barrier layers at both ends have a lowest energy band gap. The method of claim 1,
The plurality of barrier layers include a light emitting device having a smallest energy bandgap at the central layer, and a barrier layer at both ends having the largest energy bandgap. The method according to claim 2 or 3,
The barrier layers at both ends have the same energy bandgap. The method of claim 1,
The band gap of the plurality of well layers is the same light emitting device. The method of claim 1,
The plurality of barrier layers are light emitting devices having a concentration of indium of 5% or less when the dopant is indium. The method of claim 1,
And a step in an energy band gap of an edge region of each of the barrier layers. The method of claim 7, wherein
The step of the edge region has a thickness of less than 0.5nm. 9. The method of claim 8,
In each of the barrier layers, the dopant concentration in the edge region is 1 to 2% higher than the dopant concentration in the intermediate region. The method of claim 1,
The plurality of barrier layers have the same thickness. The method of claim 1,
And a thickness of the plurality of barrier layers is thicker than a thickness of the plurality of well layers. Body Part,
A plurality of electrodes in the body, and
The light emitting device of any one of claims 1 to 11 is electrically connected to the electrode.
Light emitting device package comprising a. Board,
An illumination device comprising the light emitting device package of claim 12 on the substrate.
KR1020110091733A 2011-09-09 2011-09-09 Light emitting device, and light emitting device package KR20130028291A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160016316A (en) * 2014-08-05 2016-02-15 엘지이노텍 주식회사 Light emitting device and lighting system having the same
KR20170082830A (en) * 2016-01-07 2017-07-17 엘지이노텍 주식회사 Light emitting device
KR20180015163A (en) * 2015-06-05 2018-02-12 오스텐도 테크놀로지스 인코포레이티드 A light emitting structure in which carriers are selectively implanted into a plurality of active layers
KR20180082872A (en) * 2017-01-11 2018-07-19 엘지이노텍 주식회사 Semiconductor device and light emitting device package having thereof
KR20180088111A (en) * 2017-01-26 2018-08-03 엘지이노텍 주식회사 Semiconductor device and light emitting device package having thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160016316A (en) * 2014-08-05 2016-02-15 엘지이노텍 주식회사 Light emitting device and lighting system having the same
KR20180015163A (en) * 2015-06-05 2018-02-12 오스텐도 테크놀로지스 인코포레이티드 A light emitting structure in which carriers are selectively implanted into a plurality of active layers
US11329191B1 (en) 2015-06-05 2022-05-10 Ostendo Technologies, Inc. Light emitting structures with multiple uniformly populated active layers
US11335829B2 (en) 2015-06-05 2022-05-17 Ostendo Technologies, Inc. Multi-color light emitting structures with controllable emission color
KR20170082830A (en) * 2016-01-07 2017-07-17 엘지이노텍 주식회사 Light emitting device
KR20180082872A (en) * 2017-01-11 2018-07-19 엘지이노텍 주식회사 Semiconductor device and light emitting device package having thereof
KR20180088111A (en) * 2017-01-26 2018-08-03 엘지이노텍 주식회사 Semiconductor device and light emitting device package having thereof

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