KR20130009927A - 플래시 미디어 제어기 내 메타 데이터 처리 방법 및 장치 - Google Patents

플래시 미디어 제어기 내 메타 데이터 처리 방법 및 장치 Download PDF

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KR20130009927A
KR20130009927A KR1020120076961A KR20120076961A KR20130009927A KR 20130009927 A KR20130009927 A KR 20130009927A KR 1020120076961 A KR1020120076961 A KR 1020120076961A KR 20120076961 A KR20120076961 A KR 20120076961A KR 20130009927 A KR20130009927 A KR 20130009927A
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South Korea
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context
metadata
flash
block
data
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Korean (ko)
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비나이 아쇽 소마나체
티모시 더블유. 스와토쉬
파멜라 에스. 헴프스테드
잭슨 엘. 엘리스
마이클 에스. 힉켄
마틴 에스. 델
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엘에스아이 코포레이션
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1024Latency reduction
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
    • G06F2212/1036Life time enhancement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7207Details relating to flash memory management management of metadata or control data

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
KR1020120076961A 2011-07-14 2012-07-13 플래시 미디어 제어기 내 메타 데이터 처리 방법 및 장치 Withdrawn KR20130009927A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201161507659P 2011-07-14 2011-07-14
US61/507,659 2011-07-14
US13/334,599 US8806112B2 (en) 2011-07-14 2011-12-22 Meta data handling within a flash media controller
US13/334,599 2011-12-22

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KR20130009927A true KR20130009927A (ko) 2013-01-24

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Country Status (6)

Country Link
US (1) US8806112B2 (enrdf_load_stackoverflow)
EP (1) EP2546751A1 (enrdf_load_stackoverflow)
JP (1) JP5960517B2 (enrdf_load_stackoverflow)
KR (1) KR20130009927A (enrdf_load_stackoverflow)
CN (1) CN103034562A (enrdf_load_stackoverflow)
TW (1) TW201303587A (enrdf_load_stackoverflow)

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Publication number Priority date Publication date Assignee Title
US11928056B2 (en) 2020-08-21 2024-03-12 SK Hynix Inc. Memory controller for allocating cache lines and method of operating the same

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Publication number Publication date
US8806112B2 (en) 2014-08-12
JP5960517B2 (ja) 2016-08-02
JP2013025793A (ja) 2013-02-04
EP2546751A1 (en) 2013-01-16
US20130019051A1 (en) 2013-01-17
TW201303587A (zh) 2013-01-16
CN103034562A (zh) 2013-04-10

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