KR20120117317A - Liquid crystal display device - Google Patents

Abstract

PURPOSE: A liquid crystal display device is provided to prevent lowering of recognition resolution of a user when a 3D image is formed by a pattern retarder method. CONSTITUTION: Data lines and gate lines are formed on a display panel(10). The display panel comprises pixels. The pixels are formed on cell areas which are defined by crossing of the data lines and the gate lines. A data driving unit(120) converts inputted image data into a data voltage. The data driving unit outputs the converted data voltage into the data lines. A gate operating unit(110) successively outputs gate pulses to the gate lines.

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

The present invention relates to a liquid crystal display device capable of realizing a stereoscopic image by a pattern retarder method.

BACKGROUND ART Liquid crystal display devices have tended to be gradually widened due to their light weight, thinness, and low power consumption. Liquid crystal displays are widely used as portable computers such as notebook PCs, office automation equipment, audio / video equipment, indoor and outdoor advertising display devices, and the like. The LCD displays an image by controlling an electric field applied to the liquid crystal layer to modulate the light incident from the backlight unit.

In addition, recently, as the demand for a stereoscopic image display device increases, a liquid crystal display device capable of realizing a stereoscopic image has been developed. The stereoscopic image is divided into a stereoscopic technique and an autostereoscopic technique. The binocular parallax method uses a parallax image of the left and right eyes with a large stereoscopic effect, and there are glasses and no glasses, both of which are put to practical use. In the spectacle method, the polarization of the left and right parallax images is displayed on the direct view display device or the projector or displayed in a time division method. The glasses method implements a stereoscopic image using polarized glasses or liquid crystal shutter glasses. In the autostereoscopic method, an optical plate such as a parallax barrier and a lenticular lens is generally used to realize a stereoscopic image by separating an optical axis of a parallax image.

1 is a view showing a liquid crystal display device for implementing a stereoscopic image by a pattern retarder method. Referring to FIG. 1, a liquid crystal display for implementing a stereoscopic image using a pattern retarder method includes polarization characteristics of a patterned retarder PR disposed on a display panel DIS, and polarization glasses worn by a user. The stereoscopic image is realized using the polarization characteristic of (PG). The pattern retarder type stereoscopic image display apparatus displays a left eye image on odd-numbered lines of the display panel DIS and a right eye image on even-numbered lines. The left eye image of the display panel DIS is converted to the left eye polarization when passing through the pattern retarder PR, and the right eye image is converted to the right eye polarization when passing through the pattern retarder PR. The left eye polarizing filter of the polarizing glasses PG passes only the left eye polarized light and the right eye polarizing filter passes only the right eye polarized light. Therefore, the user sees only the left eye image through the left eye, and only the right eye image through the right eye.

In addition, the liquid crystal display device implemented by the pattern retarder method as shown in FIG. 1 has been developed with a high definition of UD (Ultra Definition) to further improve display quality of two-dimensional and three-dimensional images. The liquid crystal display of UD has a resolution of 3840 x 2160. Currently, commercially available FHD (Full High Definition) liquid crystal displays have a resolution of 1920 × 1080. Accordingly, the liquid crystal display of the UD has a higher resolution twice as horizontally and vertically than the liquid crystal display of the FHD. However, a liquid crystal display device that implements a stereoscopic image using a pattern retarder method may have a problem in that a user's cognitive resolution is degraded when the stereoscopic image is implemented, even when the UD is implemented at a high resolution. In this case, the user may feel that the stereoscopic image is viewed at a resolution lower than that of the display panel.

The present invention provides a liquid crystal display device that can prevent a user's perceived resolution from being lowered when a stereoscopic image is implemented using a pattern retarder method.

According to an exemplary embodiment of the present invention, a liquid crystal display includes: a display panel including a data line, a gate line intersecting the data line, and a pixel formed in a cell region defined by an intersection of the data line and the gate line; A data driver converting the input image data into a data voltage and outputting the data voltage to the data lines; A gate driver sequentially outputting gate pulses synchronized with the data voltages to the gate lines; And the display panel includes 4k-3 (k is a natural number satisfying 1 ≦ k ≦ m / 4, m is the number of lines of the display panel) and 4k-1 lines. And a fourth color subpixel, a third color and a complementary color, a fifth color subpixel, a first color and a complementary color, and a second color and a complementary color, on the 4k-2 and 4k lines. Pixels including six sub-pixels are formed.

The present invention forms pixels including subpixels of the first to third colors in odd lines of the display panel, and arranges pixels including subpixels of the fourth to sixth colors in even lines of the display panel. . As a result, according to the present invention, since the display image of the odd lines and the display image of the even lines are distinguished, it is possible to prevent the user from lowering the perceived resolution. In addition, in the present invention, since the color coordinate range is extended by the subpixels of the first to sixth colors, color reproducibility and color expression power may be enhanced.

1 is a view showing a liquid crystal display device for implementing a stereoscopic image by a pattern retarder method.
2 is a block diagram schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention.
3 is an exploded perspective view illustrating a display panel, a pattern retarder, and polarizing glasses.
4 is an equivalent circuit diagram illustrating some of the pixels of the display panel in detail.
5 is a waveform diagram illustrating a gate pulse and a data voltage supplied to the pixels of FIG. 4.
6 is a diagram illustrating an arrangement of pixels and a pattern retarder of a display panel according to an exemplary embodiment of the present invention.
7 is a graph showing the color coordinates of the prior art and the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Like reference numerals throughout the specification denote substantially identical components. In the following description, when it is determined that a detailed description of known functions or configurations related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

Component names used in the following description may be selected in consideration of ease of specification, and may be different from actual product part names.

2 is a block diagram schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention. 3 is an exploded perspective view illustrating a display panel, a pattern retarder, and polarizing glasses. 2 and 3, the liquid crystal display of the present invention includes a display panel 10, polarizing glasses 20, a gate driver 110, a data driver 120, a data converter 130, and a timing controller ( 140, and host system 150, and the like.

The display panel 10 displays an image under the control of the timing controller 140. In the display panel 10, a liquid crystal layer is formed between two glass substrates. On the lower glass substrate of the display panel 10, the data lines D and the gate lines G (or scan lines) are formed to cross each other, and the data lines D and the gate lines G may be intersected with each other. In the cell regions defined by the TFT array, a TFT array in which pixels are arranged in a matrix form is formed. Each pixel of the display panel 10 is connected to a thin film transistor and is driven by an electric field between the pixel electrode and the common electrode.

The display panel 10 displays an image at a resolution of UD (Ultra Definition) so as to further improve display quality of two-dimensional and three-dimensional images. UD means 3840 × 2160 resolution. In this case, 3840 × 2160 pixels are formed in the display panel 10. In addition, since the pixel includes three subpixels, 3840 × 2160 × 3 subpixels are formed in the display panel 10. 3840 × 3 data lines D are formed in the display panel 10, and 2160 gate lines G are formed in the display panel 10.

A color filter array including a black matrix, a color filter, a common electrode, and the like is formed on the upper glass substrate of the display panel 10. The common electrode is formed on the upper glass substrate in a vertical electric field driving method such as twisted nematic (TN) mode and vertical alignment (VA) mode, and a horizontal electric field driving such as IPS (In Plane Switching) mode and FFS (Fringe Field Switching) mode. In the method, the pixel electrode is formed on the lower glass substrate. The liquid crystal mode of the display panel 10 may be implemented not only in the IPS mode as shown in FIG. 5 but also in any liquid crystal mode such as a TN mode, a VA mode, and an FFS mode. The structure of the TFT array and the color filter array of the display panel 10 will be described later with reference to FIGS. 4 and 5.

As the display panel 10, a transmissive liquid crystal display panel that modulates light from the backlight unit may be selected. The backlight unit includes a light source, a light guide plate (or diffusion plate), and a plurality of optical sheets that are turned on in accordance with a driving current supplied from the backlight unit driving unit. The backlight unit may be implemented as a direct type backlight unit or an edge type backlight unit. The light sources of the backlight unit may include one of a hot cathode fluorescent lamp (HCFL), a cold cathode fluorescent lamp (CCFL), an external electrode fluorescent lamp (EEFL), a light emitting diode (LED), or two or more light sources. .

The backlight unit driver generates a driving current for turning on light sources of the backlight unit. The backlight unit driver turns on / off a driving current supplied to the light sources under the control of the backlight controller. The backlight controller outputs the backlight control data in which the backlight brightness and the lighting timing are adjusted according to the global / local dimming signal DIM input from the host system in the SPI (Serial Pheripheral Interface) data format.

Referring to FIG. 3, an upper polarizing plate 11a is attached to an upper glass substrate of the display panel 10, and a lower polarizing plate 11b is attached to a lower glass substrate. The light transmission axis r1 of the upper polarizing plate 11a and the light transmission axis r2 of the lower polarizing plate 11b are orthogonal to each other. In addition, an alignment film for setting a pre-tilt angle of the liquid crystal is formed on the upper glass substrate and the lower glass substrate. A spacer is formed between the upper glass substrate and the lower glass substrate of the display panel 10 to maintain a cell gap of the liquid crystal layer.

In the 2D mode, the fourth k-3 of the display panel 10 (k may be a natural number satisfying 1 ≦ k ≦ m / 4, m may be defined as the number of lines in the display panel, and m may be defined as 2160 in the case of UD) and The pixels of the 4k-2 line and the pixels of the 4k-1 and 4k lines display a 2D image. In the 3D mode, the pixels of the 4k-3 and 4k-2 lines of the display panel 10 display the left eye image (or the right eye image) and the pixels of the 4k-1 and 4k lines display the right eye image (or the left eye image). ). Light of the image displayed on the pixels of the display panel 10 is incident on the patterned retarder 30 disposed on the display panel 10 through the upper polarizing film.

The first retarder 31 is formed in the lines of the pattern retarder 30 corresponding to the fourth k-3 and fourth k-2 lines of the display panel 10. A second retarder 32 is formed in the lines of the pattern retarder 30 corresponding to the fourth k-1 and fourth k lines of the display panel 10. Therefore, the pixels of the 4k-3 and 4k-2 lines of the display panel 10 are opposed to the first retarder 31 of the pattern retarder 30, and the 4k-1 and The pixels of the fourth k line are opposed to the second retarder 32 of the pattern retarder 30.

The first retarder 31 delays the phase value of the light from the display panel 10 by + λ / 4 (λ is the wavelength of light). The second retarder 32 delays the phase value of the light from the display panel 10 by -λ / 4. That is, the optical axis r3 of the first retarder 31 and the optical axis r4 of the second retarder 32 are perpendicular to each other. The first retarder 31 of the pattern retarder 30 may be implemented to pass only the first circularly polarized light (left circularly polarized light). The second retarder 32 may be implemented to pass only the second circularly polarized light (right polarized light).

The left eye polarization filter of the polarizing glasses 20 has the same optical axis as the first retarder 31 of the pattern retarder 30. The right eye polarization filter of the polarizing glasses 20 has the same optical axis as the second retarder 32 of the pattern retarder 30. For example, the left eye polarization filter of the polarizing glasses 20 may be selected as a left circular polarization filter, and the right eye polarization filter of the polarizing glasses 20 may be selected as a right circular polarization filter. The user should wear polarized glasses when viewing 3D images and take off the polarized glasses when viewing 2D images.

As a result, in the stereoscopic image display apparatus of the pattern retarder method, the left eye image displayed on the pixels of the 4k-3 and 4k-2 lines of the display panel 10 passes through the first retarder 31 and is left circularly polarized. The right eye image displayed on the pixels of the 4k-1 and 4k lines passes through the second retarder 32 and is converted into right circularly polarized light. The left circularly polarized light reaches the user's left eye through the left eye polarization filter of the polarizing glasses 20, and the right circularly polarized light passes through the right eye polarization filter of the polarizing glasses 20 to reach the right eye of the user. Therefore, the user sees only the left eye image through the left eye, and only the right eye image through the right eye.

The data driver 120 includes a plurality of source drive ICs. The source drive ICs convert the image data RGB input from the timing controller 140 into positive / negative gamma compensation voltages to generate positive / negative analog data voltages. In addition, the source drive ICs convert the complementary color image data (YCM) input from the data converter 130 into positive / negative gamma compensation voltages to generate positive / negative analog data voltages. The positive / negative analog data voltages output from the source drive ICs are supplied to the data lines D of the display panel 10.

The pixels of the 4k-3 and 4k-1 lines of the display panel 10 are supplied with the positive / negative analog data voltages of the image data RGB and the pixels of the 4k-2 and 4k lines. Are supplied with positive / negative analog data voltages of complementary color image data (YCM). Detailed description thereof will be described later with reference to FIGS. 4 and 5.

The gate driver 110 sequentially supplies gate pulses synchronized with the data voltage to the gate lines G of the display panel 10 under the control of the timing controller 140. The gate driver 110 may be composed of a plurality of gate drive integrated circuits each including a shift register, a level shifter for converting an output signal of the shift register into a swing width suitable for TFT driving of the liquid crystal cell, have. Alternatively, the gate driver 110 may be directly formed on the lower substrate of the display panel 10 by using a gate drive IC in panel (GIP) method. In the GIP method, the level shifter may be mounted on a printed circuit board (PCB), and the shift register may be formed on a lower substrate of the display panel 10.

The data converter 130 receives image data RGB from the timing controller 140. The data converter 130 converts the image data RGB input from the timing controller 140 and outputs the complementary color image data YCM to the data driver 120. The image data RGB includes data of the first to third colors, and the complementary color image data YCM includes data of the fourth to sixth colors. Hereinafter, the first color is red (red), the second color is green (green), the third color is blue (blue), the fourth color is yellow (yellow), the fifth color is cyan (cyan), The six colors were explained mainly on the magenta.

The R (Red, red) data of the image data RGB is complementary to the C (Cyan, cyan) data of the complementary image data YCM. Further, G (Green, green) data of the image data RGB is complementary to M (Magenta, magenta (magenta)) data of the complementary color image data YCM, and B ( Blue and blue data are complementary with Y (Yellow, Yellow) data of the complementary color image data YCM. When the input image data is 8 bits, the complementary color image data YCM may be calculated by Equation 1 from the image data RGB.

The timing controller 140 may control the gate driver 110 based on the image data RGB output from the host system 150, the timing signals Vsync, Hsync, DE, and CLK, and the mode signal MODE. ) And a data driver control signal to the data driver 120. The gate driver control signal includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (Gate Output Enable, GOE), and the like. The gate start pulse (GSP) controls the timing of the first gate pulse. The gate shift clock GSC is a clock signal for shifting the gate start pulse GSP. The gate output enable signal GOE controls the output timing of the gate driver 110.

The data driver control signal includes a source start pulse (SSP), a source sampling clock (SSC), a source output enable signal (SOE), a polarity control signal (POL), and the like. . The source start pulse SSP controls the data sampling start time of the data driver 120. The source sampling clock is a clock signal that controls the sampling operation of the data driver 120 based on the rising or falling edge. If the digital video data to be input to the data driver 120 is transmitted using a mini LVDS (Low Voltage Differential Signaling) interface standard, the source start pulse SSP and the source sampling clock SSC may be omitted. The polarity control signal POL inverts the polarity of the data voltage output from the data driver 120 every L (L is a natural number) horizontal period period. The source output enable signal SOE controls the output timing of the data driver 120.

The host system 150 supplies the image data RGB to the timing controller 140 through an interface such as a low voltage differential signaling (LVDS) interface and a transition minimized differential signaling (TMDS) interface. In addition, the host system 150 supplies timing signals Vsync, Hsync, DE, and CLK, a mode signal MODE, and the like to the timing controller 140.

4 is an equivalent circuit diagram showing some of the pixels of FIG. 2 in detail. In FIG. 4, the liquid crystal mode of the display panel 10 is described as being implemented in the IPS mode, but the liquid crystal mode of the display panel 10 is not limited thereto and may be implemented in a TN mode, a VA mode, an FFS mode, or the like. It may be.

Referring to FIG. 4, gate lines G _{4k -4} to G _{4k -1} and data lines D _{3s -2} to D _{3s +1} are formed on the lower substrate of the display panel 10, and gate lines ( Pixel electrodes 11 and common electrodes 12 are formed in the liquid crystal cell region defined by the intersection of G _{4k -4} to G _{4k -1} and the data lines D _{3s -2} to D _{3s + 1} . The scan transistor T is turned on in response to a gate pulse from the gate lines G _{4k -4} to G _{4k -1} to _convert the data voltages of the data lines D _{3s -2} to D _{3s +1} into the pixel electrode ( 11) to supply them. The gate electrode of the scan transistor T is connected to the gate lines G _{4k -4} to G _{4k -1} , the source electrode is connected to the data lines D _{3s -2} to D _{3s +1} , and the drain electrode is a pixel. Connected to the electrodes 11. The common electrodes 12 are connected to a common line Vcom formed between the RGB pixels and the YCM pixels. The pixel electrode 11 and the common electrode 12 are formed to be parallel to each other. The liquid crystal in the liquid crystal cell region is rotated by an electric field between the pixel electrode 11 and the common electrode 12 to display an image.

Color filters CF are formed on the upper substrate of the display panel 10. The color filters CF are formed in a region corresponding to the liquid crystal cell region on the lower substrate of the display panel 10. The black matrix BM is formed in a region corresponding to the region where the gate lines G _{4k- 4} to G _{4k- 1} and the scan transistor T are formed on the lower substrate of the display panel 10.

The color filters CF include RGB color filters CF (RGB) and YCM color filters CF (YCM). The R color filter R is formed in the region corresponding to the liquid crystal cell region of the R subpixel, and the G color filter G is formed in the region corresponding to the liquid crystal cell region of the G subpixel, and the B color filter B Is formed in a region corresponding to the liquid crystal cell region of the B subpixel. The Y color filter Y is formed in a region corresponding to the liquid crystal cell region of the Y subpixel, the C color filter C is formed in a region corresponding to the liquid crystal cell region of the C subpixel, and the M color filter M Is formed in a region corresponding to the liquid crystal cell region of the M subpixel.

5 is a waveform diagram illustrating a gate pulse and a data voltage supplied to the pixels of FIG. 4. An operation of pixels of the display panel 10 according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 4 and 5.

Figures 4 and 5, the first 4k-4 gate lines (G _{4k -4),} the first 4k-4 the gate pulse (GP _4k-4) is supplied, a 4k-3 gate lines (G _{4k -3)} The 4k-3 gate pulse GP _{4k -3} is supplied to the 4k-3 gate pulse. A 4k-2 gate pulse GP _{4k -2} is supplied to the 4k-2 gate line G _{4k -2} , and a 4k-1 gate pulse GP is supplied to the 4k-1 gate line G _{4k -1} . _{4k -1} ) is supplied. The gate pulse GP is generated for approximately one horizontal period.

Also, the source drive IC of the data driving unit 120, the 3s-2 (s in the case of a natural number, satisfying the UD 1≤s≤n / 3 n can be defined as 3840 × 3) data lines (D _{3s −2} ), the Y data voltage and the R data voltage are alternately supplied. In addition, the source drive ICs of the data driver 120 alternately supply the C data voltage and the G data voltage to the 3s-1 data line D _{3s -1} , and the M data voltage to the 3s data line D _3s . And B data voltage are supplied alternately. In FIG. 5, a description has been given of a dot inversion method in which data voltages of positive and negative polarities are alternately applied for each dot, but the present invention is not limited thereto. In the dot inversion scheme, the source drive ICs alternately apply positive and negative data voltages approximately every one horizontal period.

The source drive ICs of the data driver 120 supply the Y data voltage to the 3s-2 data line D _{3s -2} during the period synchronized with the 4k-4 gate pulse GP _{4k -4} , and the 3s- The C data voltage is supplied to one data line D _{3s -1} , and the M data voltage is supplied to the third s data line D _3s . Therefore, the Y subpixel, C subpixel, and M subpixel connected to the fourth k-4 gate line display an image.

The source drive ICs of the data driver 120 supply an R data voltage to the third s-2 data line D _{3s -2} during the period synchronized with the fourth k-3 gate pulse GP _{4k -3} , and the third s- The first data line D _{3s -1} is supplied with the G data voltage, and the third data line D _3s is supplied with the B data voltage. Therefore, the R subpixel, G subpixel, and B subpixel connected to the fourth k-3 gate line display an image.

The source drive ICs of the data driver 120 supply the Y data voltage to the third s-2 data line D _{3s -2} during the period synchronized with the fourth k-2 gate pulse GP _{4k -2} , and the third s- The C data voltage is supplied to one data line D _{3s -1} , and the M data voltage is supplied to the third s data line D _3s . Therefore, the Y subpixel, C subpixel, and M subpixel connected to the fourth k-2 gate line display an image.

The source drive ICs of the data driver 120 supply an R data voltage to the third s-2 data line D _{3s -2} during the period synchronized with the fourth k-1 gate pulse GP _{4k -1} , and the third s- The first data line D _{3s -1} is supplied with the G data voltage, and the third data line D _3s is supplied with the B data voltage. Therefore, the R subpixel, G subpixel, and B subpixel connected to the 4k-1 gate line display an image.

6 is a diagram illustrating an arrangement of pixels and a pattern retarder of a display panel according to an exemplary embodiment of the present invention. Referring to FIG. 6, some of the pixels of the display panel 10 and the first retarder 31 and the second retarder 32 of the pattern retarder 30 are shown.

RGB pixels are formed on the 4k-3 and 4k-1 lines of the display panel 10, and YCM pixels are formed on the 4k-2 and 4k lines. Each of the RGB pixels includes an R subpixel, a G subpixel, and a B subpixel, and each of the YCM pixels includes a Y subpixel, a C subpixel, and an M subpixel. Accordingly, the first through nth (n is the number of column lines of the display panel) R subpixels, the first through nth G subpixels, and the first through the fourth k-3 and fourth k-1 lines of the display panel 10. To nth B subpixels are formed. Further, first to nth Y subpixels, first to nth C subpixels, and first to nth Mth subpixels are formed on the fourth k-2 and fourth k lines of the display panel 10.

In the 2D mode, image data RGB is supplied to the RGB pixels of the 4k-3 and 4k-1 lines of the display panel 10, and complementary image data is provided to the YCM pixels of the 4k-2 and 4k lines. (YCM) is supplied. R image data is supplied to R subpixels of lines 4k-3 and 4k-1 of the display panel 10, G image data is supplied to G subpixels, and B image data is supplied to B subpixels. Supplied. Y image data is supplied to the Y subpixels of the 4k-2 and 4k lines of the display panel 10, C image data is supplied to the C subpixels, and M image data is supplied to the M subpixels. .

In the 3D mode, the left eye image data RGB _L is supplied to the RGB pixels of the 4k-3 line of the display panel 10, and the right eye image data RGB _R is supplied to the RGB pixels of the 4k-1 line. do. The left eye complementary color image data YCM _L is supplied to YCM pixels of the 4k-2 line of the display panel 10, and the right eye complementary color image data YCM _R is supplied to the YCM pixels of the 4kk line. R left eye image data is supplied to R subpixels of a 4k-3 line of the display panel 10, G left eye image data is supplied to G subpixels, and B left eye image data is supplied to B subpixels. . R right eye image data is supplied to R subpixels of a 4k-1 line of the display panel 10, G right eye image data is supplied to G subpixels, and B right eye image data is supplied to B subpixels. . Y left eye image data is supplied to the Y subpixels of the 4k-2 line of the display panel 10, C left eye image data is supplied to the C subpixels, and M left eye image data is supplied to the M subpixels. . The Y right eye image data is supplied to the Y subpixels of the fourth k line of the display panel 10, the C right eye image data is supplied to the C subpixels, and the M right eye image data is supplied to the M subpixels.

In particular, the left eye image data of the second p-1 (p is a natural number satisfying 1 ≦ p ≦ m / 4) is supplied to the RGB pixels of the fourth k-3 line of the display panel 10 in the 3D mode. The left eye image data of the second p line is supplied to the YCM pixels of the 4k-2 line. In addition, the right eye image data of the second p-1 line is supplied to the RGB pixels of the 4k-1 line of the display panel 10 in the 3D mode, and the right eye image data of the second p line is supplied to the YCM pixels of the 4k line. Supplied.

Therefore, the left eye image of the second p-1 line displayed on the RGB pixels of the 4k-3 line is converted into the left circularly polarized light through the first retarder 31 and passes through the left eye polarization filter of the polarizing glasses 20. To reach the user's left eye. The left eye image of the second p line displayed on the YCM pixels of the 4k-2 line is converted into the left circularly polarized light through the first retarder 31 and passed through the left eye polarization filter of the polarizing glasses 20 to the left eye of the user. Will be reached. In addition, the right eye image of the second p-1 line displayed on the RGB pixels of the 4k-1 line is converted into the right circularly polarized light through the second retarder 32 and passes through the right eye polarization filter of the polarizing glasses 20. To reach the right eye of the user. The right eye image of the second p line displayed on the YCM pixels of the 4k line passes through the second retarder 32 to be converted into right circularly polarized light, and passes through the right eye polarization filter of the polarizing glasses 20 to reach the right eye of the user. Done.

In the prior art, the pixels of the 4k-3, 4k-2, 4k-1, and 4k lines are all formed of RGB pixels. In this case, since the left eye image of the second p-1 line displayed on the RGB pixels of the 4k-3 line and the left eye image of the second p line displayed on the RGB pixels of the 4k-2 line are similar, It is recognized that only one of the left eye image of the second p-1 line displayed on the -3 line RGB pixels and the left eye image of the second p line displayed on the RGB pixels of the 4k-2 line is displayed. In addition, since the right eye image of the second p-1 line displayed on the RGB pixels of the 4k-1 line and the right eye image of the second p line displayed on the RGB pixels of the 4k Line are similar, the user may view the 4k-1 line. It is recognized that only one of the right eye image of the second p-1 line displayed on the RGB pixels of and the right eye image of the second p line of the RGB pixels of the 4k line are displayed. Therefore, the resolution perceived by the user may be reduced to 1/2 of the resolution of the display panel 10.

In contrast, in the present invention, the pixels of the 4k-3 and 4k-1 lines are formed of RGB pixels, and the pixels of the 4k-2 and 4k line are formed of YCM pixels. In this case, the user may distinguish the left eye image of the second p-1 line displayed on the RGB pixels of the 4k-3 line from the left eye image of the second p line displayed on the YCM pixels of the 4k-2 line. Also, the user may distinguish the right eye image of the second p-1 line displayed on the RGB pixels of the 4k-1 line from the right eye image of the second p line displayed on the YCM pixels of the 4k Line. That is, the resolution perceived by the user is the same as the resolution of the display panel 10. Therefore, the present invention can prevent the user from lowering the perceived resolution.

7 is a graph showing the color coordinates of the prior art and the present invention. Referring to FIG. 7, the color coordinate range A of the prior art and the color coordinate range B of the present invention which can be expressed by the display device (or the reproduction device) are shown. In the prior art, the pixels of the 4k-3, 4k-2, 4k-1, and 4k lines are all formed of RGB pixels. Therefore, the color coordinate range A of the prior art corresponds to a range that can be expressed in RGB color.

In contrast, in the present invention, the pixels of the 4k-3 and 4k-1 lines are formed of RGB pixels, and the pixels of the 4k-2 and 4k line are formed of YCM pixels. Therefore, the color coordinate range B of the present invention corresponds to a range that can be expressed by an RGB color and a YCM color that is a complementary color of the RGB color. That is, the color coordinate range B of the present invention is wider than the color coordinate range A of the prior art as shown in FIG. Therefore, the present invention can not only increase the color reproducibility than the prior art, but also enhance the color expression power.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the present invention should not be limited to the details described in the detailed description, but should be defined by the claims.

10: display panel 11a: upper polarizing plate
11b: lower polarizer 20: polarized glasses
30: pattern retarder 31: first retarder
32: second retarder 110: gate driver
120: data driver 130: data converter
140: timing controller 150: host system

Claims (7)

A display panel including a data line, a gate line intersecting the data line, and a pixel formed in a cell region defined by an intersection of the data line and the gate line;
A data driver converting the input image data into a data voltage and outputting the data voltage to the data lines;
A gate driver sequentially outputting gate pulses synchronized with the data voltages to the gate lines; And
The display panel includes subpixels of the first to third colors in the fourth k-3 (k is a natural number satisfying 1 ≦ k ≦ m / 4 and m is the number of lines of the display panel) and the fourth k-1 lines. Including pixels are formed, a fourth color subpixel having a third color and a complementary color, a fifth color subpixel having a first color and a complementary color, and a sixth color having a second color and a complementary color on the 4k-2 and 4k lines; And pixels including subpixels of color are formed. The method of claim 1,
Sub pixels of the first to third colors formed on the fourth k-3 lines and sub pixels of the fourth to sixth colors formed on the fourth k-2 lines display a left eye image,
And the subpixels of the first to third colors formed on the fourth k-1 lines and the subpixels of the fourth to sixth colors formed on the fourth k lines to display a right eye image. The method of claim 2,
A first retarder corresponding to the fourth k-3 lines and the fourth k-2 lines and converting the left eye image into left circularly polarized light; And
And a pattern retarder corresponding to the fourth k-1 lines and the fourth k lines and including a second retarder for converting the right eye image into right circularly polarized light. The method of claim 2,
The data driver may include:
The left eye image data of a second p-1 line (p is a natural number satisfying 1 ≦ p ≦ m / 4) is supplied to the 4k-3 lines in synchronization with a fourth k-3 gate pulse, and the 4k-2 line is provided. Supplies left eye image data of a second p line to the lines in synchronization with a 4k-2 gate pulse,
The right eye image data of the second p-1 line is supplied to the 4k-1 lines in synchronization with a 4k-1 gate pulse, and the right eye image data of the second p line is synchronized with the 4k gate pulses to the 4k lines. Liquid crystal display, characterized in that for supplying. The method of claim 2,
The data driver may include:
The data voltage of the first color and the data voltage of the fourth color are alternately supplied to the 3s-2 (s is a natural number satisfying 1≤s≤n / 3, n is the number of column lines of the display panel). The data voltage of the second color and the data color of the fifth color are alternately supplied to the 3s-1 data lines, and the data voltage of the third color and the data voltage of the sixth color are alternately supplied to the 3s data lines. Liquid crystal display, characterized in that for supplying. The method of claim 1,
A color filter of a first color corresponding to the subpixels of the first color is formed on the upper substrate of the display panel, and a color filter of a second color corresponding to the subpixels of the second color is formed. A color filter of a third color corresponding to subpixels of a third color is formed, and a color filter of a fourth color corresponding to the subpixels of the fourth color is formed, and the subpixels of the fifth color are formed. And a color filter of a corresponding fifth color, and a color filter of a sixth color corresponding to the subpixels of the sixth color. The method of claim 1,
The first color is red, the second color is green, the third color is blue,
And wherein the fourth color is yellow, the fifth color is cyan, and the sixth color is magenta.

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